1 ; Test high-part i64->i128 multiplications.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -asm-verbose=0 | FileCheck %s
7 ; Check zero-extended multiplication in which only the high part is used.
8 define i64 @f1(i64 %dummy, i64 %a, i64 %b) {
10 ; CHECK-NOT: {{%r[234]}}
11 ; CHECK: mlgr %r2, %r4
13 %ax = zext i64 %a to i128
14 %bx = zext i64 %b to i128
15 %mulx = mul i128 %ax, %bx
16 %highx = lshr i128 %mulx, 64
17 %high = trunc i128 %highx to i64
21 ; Check sign-extended multiplication in which only the high part is used.
22 ; This needs a rather convoluted sequence.
23 define i64 @f2(i64 %dummy, i64 %a, i64 %b) {
25 ; CHECK-DAG: srag [[RES1:%r[0-5]]], %r3, 63
26 ; CHECK-DAG: srag [[RES2:%r[0-5]]], %r4, 63
27 ; CHECK-DAG: ngr [[RES1]], %r4
28 ; CHECK-DAG: ngr [[RES2]], %r3
29 ; CHECK-DAG: agr [[RES2]], [[RES1]]
30 ; CHECK-DAG: mlgr %r2, %r4
31 ; CHECK: sgr %r2, [[RES2]]
33 %ax = sext i64 %a to i128
34 %bx = sext i64 %b to i128
35 %mulx = mul i128 %ax, %bx
36 %highx = lshr i128 %mulx, 64
37 %high = trunc i128 %highx to i64
41 ; Check zero-extended multiplication in which only part of the high half
43 define i64 @f3(i64 %dummy, i64 %a, i64 %b) {
45 ; CHECK-NOT: {{%r[234]}}
46 ; CHECK: mlgr %r2, %r4
47 ; CHECK: srlg %r2, %r2, 3
49 %ax = zext i64 %a to i128
50 %bx = zext i64 %b to i128
51 %mulx = mul i128 %ax, %bx
52 %highx = lshr i128 %mulx, 67
53 %high = trunc i128 %highx to i64
57 ; Check zero-extended multiplication in which the result is split into
58 ; high and low halves.
59 define i64 @f4(i64 %dummy, i64 %a, i64 %b) {
61 ; CHECK-NOT: {{%r[234]}}
62 ; CHECK: mlgr %r2, %r4
66 %ax = zext i64 %a to i128
67 %bx = zext i64 %b to i128
68 %mulx = mul i128 %ax, %bx
69 %highx = lshr i128 %mulx, 64
70 %high = trunc i128 %highx to i64
71 %low = trunc i128 %mulx to i64
72 %or = or i64 %high, %low
76 ; Check division by a constant, which should use multiplication instead.
77 define i64 @f5(i64 %dummy, i64 %a) {
80 ; CHECK: srlg %r2, %r2,
82 %res = udiv i64 %a, 1234
86 ; Check MLG with no displacement.
87 define i64 @f6(i64 %dummy, i64 %a, ptr %src) {
89 ; CHECK-NOT: {{%r[234]}}
90 ; CHECK: mlg %r2, 0(%r4)
92 %b = load i64, ptr %src
93 %ax = zext i64 %a to i128
94 %bx = zext i64 %b to i128
95 %mulx = mul i128 %ax, %bx
96 %highx = lshr i128 %mulx, 64
97 %high = trunc i128 %highx to i64
101 ; Check the high end of the aligned MLG range.
102 define i64 @f7(i64 %dummy, i64 %a, ptr %src) {
104 ; CHECK: mlg %r2, 524280(%r4)
106 %ptr = getelementptr i64, ptr %src, i64 65535
107 %b = load i64, ptr %ptr
108 %ax = zext i64 %a to i128
109 %bx = zext i64 %b to i128
110 %mulx = mul i128 %ax, %bx
111 %highx = lshr i128 %mulx, 64
112 %high = trunc i128 %highx to i64
116 ; Check the next doubleword up, which requires separate address logic.
117 ; Other sequences besides this one would be OK.
118 define i64 @f8(i64 %dummy, i64 %a, ptr %src) {
120 ; CHECK: agfi %r4, 524288
121 ; CHECK: mlg %r2, 0(%r4)
123 %ptr = getelementptr i64, ptr %src, i64 65536
124 %b = load i64, ptr %ptr
125 %ax = zext i64 %a to i128
126 %bx = zext i64 %b to i128
127 %mulx = mul i128 %ax, %bx
128 %highx = lshr i128 %mulx, 64
129 %high = trunc i128 %highx to i64
133 ; Check the high end of the negative aligned MLG range.
134 define i64 @f9(i64 %dummy, i64 %a, ptr %src) {
136 ; CHECK: mlg %r2, -8(%r4)
138 %ptr = getelementptr i64, ptr %src, i64 -1
139 %b = load i64, ptr %ptr
140 %ax = zext i64 %a to i128
141 %bx = zext i64 %b to i128
142 %mulx = mul i128 %ax, %bx
143 %highx = lshr i128 %mulx, 64
144 %high = trunc i128 %highx to i64
148 ; Check the low end of the MLG range.
149 define i64 @f10(i64 %dummy, i64 %a, ptr %src) {
151 ; CHECK: mlg %r2, -524288(%r4)
153 %ptr = getelementptr i64, ptr %src, i64 -65536
154 %b = load i64, ptr %ptr
155 %ax = zext i64 %a to i128
156 %bx = zext i64 %b to i128
157 %mulx = mul i128 %ax, %bx
158 %highx = lshr i128 %mulx, 64
159 %high = trunc i128 %highx to i64
163 ; Check the next doubleword down, which needs separate address logic.
164 ; Other sequences besides this one would be OK.
165 define i64 @f11(ptr %dest, i64 %a, ptr %src) {
167 ; CHECK: agfi %r4, -524296
168 ; CHECK: mlg %r2, 0(%r4)
170 %ptr = getelementptr i64, ptr %src, i64 -65537
171 %b = load i64, ptr %ptr
172 %ax = zext i64 %a to i128
173 %bx = zext i64 %b to i128
174 %mulx = mul i128 %ax, %bx
175 %highx = lshr i128 %mulx, 64
176 %high = trunc i128 %highx to i64
180 ; Check that MLG allows an index.
181 define i64 @f12(ptr %dest, i64 %a, i64 %src, i64 %index) {
183 ; CHECK: mlg %r2, 524287(%r5,%r4)
185 %add1 = add i64 %src, %index
186 %add2 = add i64 %add1, 524287
187 %ptr = inttoptr i64 %add2 to ptr
188 %b = load i64, ptr %ptr
189 %ax = zext i64 %a to i128
190 %bx = zext i64 %b to i128
191 %mulx = mul i128 %ax, %bx
192 %highx = lshr i128 %mulx, 64
193 %high = trunc i128 %highx to i64
197 ; Check that multiplications of spilled values can use MLG rather than MLGR.
198 define i64 @f13(ptr %ptr0) {
200 ; CHECK: brasl %r14, foo@PLT
201 ; CHECK: mlg {{%r[0-9]+}}, 160(%r15)
203 %ptr1 = getelementptr i64, ptr %ptr0, i64 2
204 %ptr2 = getelementptr i64, ptr %ptr0, i64 4
205 %ptr3 = getelementptr i64, ptr %ptr0, i64 6
206 %ptr4 = getelementptr i64, ptr %ptr0, i64 8
207 %ptr5 = getelementptr i64, ptr %ptr0, i64 10
208 %ptr6 = getelementptr i64, ptr %ptr0, i64 12
209 %ptr7 = getelementptr i64, ptr %ptr0, i64 14
210 %ptr8 = getelementptr i64, ptr %ptr0, i64 16
211 %ptr9 = getelementptr i64, ptr %ptr0, i64 18
213 %val0 = load i64, ptr %ptr0
214 %val1 = load i64, ptr %ptr1
215 %val2 = load i64, ptr %ptr2
216 %val3 = load i64, ptr %ptr3
217 %val4 = load i64, ptr %ptr4
218 %val5 = load i64, ptr %ptr5
219 %val6 = load i64, ptr %ptr6
220 %val7 = load i64, ptr %ptr7
221 %val8 = load i64, ptr %ptr8
222 %val9 = load i64, ptr %ptr9
224 %ret = call i64 @foo()
226 %retx = zext i64 %ret to i128
227 %val0x = zext i64 %val0 to i128
228 %mul0d = mul i128 %retx, %val0x
229 %mul0x = lshr i128 %mul0d, 64
231 %val1x = zext i64 %val1 to i128
232 %mul1d = mul i128 %mul0x, %val1x
233 %mul1x = lshr i128 %mul1d, 64
235 %val2x = zext i64 %val2 to i128
236 %mul2d = mul i128 %mul1x, %val2x
237 %mul2x = lshr i128 %mul2d, 64
239 %val3x = zext i64 %val3 to i128
240 %mul3d = mul i128 %mul2x, %val3x
241 %mul3x = lshr i128 %mul3d, 64
243 %val4x = zext i64 %val4 to i128
244 %mul4d = mul i128 %mul3x, %val4x
245 %mul4x = lshr i128 %mul4d, 64
247 %val5x = zext i64 %val5 to i128
248 %mul5d = mul i128 %mul4x, %val5x
249 %mul5x = lshr i128 %mul5d, 64
251 %val6x = zext i64 %val6 to i128
252 %mul6d = mul i128 %mul5x, %val6x
253 %mul6x = lshr i128 %mul6d, 64
255 %val7x = zext i64 %val7 to i128
256 %mul7d = mul i128 %mul6x, %val7x
257 %mul7x = lshr i128 %mul7d, 64
259 %val8x = zext i64 %val8 to i128
260 %mul8d = mul i128 %mul7x, %val8x
261 %mul8x = lshr i128 %mul8d, 64
263 %val9x = zext i64 %val9 to i128
264 %mul9d = mul i128 %mul8x, %val9x
265 %mul9x = lshr i128 %mul9d, 64
267 %mul9 = trunc i128 %mul9x to i64