1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2 ; Test 64-bit addition in which the second operand is constant.
4 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
9 define zeroext i1 @f1(i64 %dummy, i64 %a, ptr %res) {
12 ; CHECK-NEXT: algfi %r3, 1
14 ; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35
15 ; CHECK-NEXT: stg %r3, 0(%r4)
17 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
18 %val = extractvalue {i64, i1} %t, 0
19 %obit = extractvalue {i64, i1} %t, 1
20 store i64 %val, ptr %res
24 ; Check the high end of the ALGFI range.
25 define zeroext i1 @f2(i64 %dummy, i64 %a, ptr %res) {
28 ; CHECK-NEXT: algfi %r3, 4294967295
30 ; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35
31 ; CHECK-NEXT: stg %r3, 0(%r4)
33 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 4294967295)
34 %val = extractvalue {i64, i1} %t, 0
35 %obit = extractvalue {i64, i1} %t, 1
36 store i64 %val, ptr %res
40 ; Check the next value up, which must be loaded into a register first.
41 define zeroext i1 @f3(i64 %dummy, i64 %a, ptr %res) {
44 ; CHECK-NEXT: llihl %r0, 1
45 ; CHECK-NEXT: algr %r0, %r3
47 ; CHECK-NEXT: risbg %r2, %r1, 63, 191, 35
48 ; CHECK-NEXT: stg %r0, 0(%r4)
50 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 4294967296)
51 %val = extractvalue {i64, i1} %t, 0
52 %obit = extractvalue {i64, i1} %t, 1
53 store i64 %val, ptr %res
57 ; Likewise for negative values.
58 define zeroext i1 @f4(i64 %dummy, i64 %a, ptr %res) {
61 ; CHECK-NEXT: lghi %r0, -1
62 ; CHECK-NEXT: algr %r0, %r3
64 ; CHECK-NEXT: risbg %r2, %r1, 63, 191, 35
65 ; CHECK-NEXT: stg %r0, 0(%r4)
67 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 -1)
68 %val = extractvalue {i64, i1} %t, 0
69 %obit = extractvalue {i64, i1} %t, 1
70 store i64 %val, ptr %res
74 ; Check using the overflow result for a branch.
75 define void @f5(i64 %dummy, i64 %a, ptr %res) {
78 ; CHECK-NEXT: algfi %r3, 1
79 ; CHECK-NEXT: stg %r3, 0(%r4)
80 ; CHECK-NEXT: jgnle foo@PLT
81 ; CHECK-NEXT: .LBB4_1: # %exit
83 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
84 %val = extractvalue {i64, i1} %t, 0
85 %obit = extractvalue {i64, i1} %t, 1
86 store i64 %val, ptr %res
87 br i1 %obit, label %call, label %exit
97 ; ... and the same with the inverted direction.
98 define void @f6(i64 %dummy, i64 %a, ptr %res) {
101 ; CHECK-NEXT: algfi %r3, 1
102 ; CHECK-NEXT: stg %r3, 0(%r4)
103 ; CHECK-NEXT: jgle foo@PLT
104 ; CHECK-NEXT: .LBB5_1: # %exit
105 ; CHECK-NEXT: br %r14
106 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
107 %val = extractvalue {i64, i1} %t, 0
108 %obit = extractvalue {i64, i1} %t, 1
109 store i64 %val, ptr %res
110 br i1 %obit, label %exit, label %call
120 declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone