| blob | cf423227f23bcacd91cc1d6658fc9a8b2e8c61f8 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
5 define <2 x i256> @test_shl(<2 x i256> %In) {
6 ; X32-LABEL: test_shl:
7 ; X32: # %bb.0:
8 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
9 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
10 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
11 ; X32-NEXT: shldl $2, %ecx, %edx
12 ; X32-NEXT: movl %edx, 60(%eax)
13 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
14 ; X32-NEXT: shldl $2, %edx, %ecx
15 ; X32-NEXT: movl %ecx, 56(%eax)
16 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
17 ; X32-NEXT: shldl $2, %ecx, %edx
18 ; X32-NEXT: movl %edx, 52(%eax)
19 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
20 ; X32-NEXT: shldl $2, %edx, %ecx
21 ; X32-NEXT: movl %ecx, 48(%eax)
22 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
23 ; X32-NEXT: shldl $2, %ecx, %edx
24 ; X32-NEXT: movl %edx, 44(%eax)
25 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
26 ; X32-NEXT: shldl $2, %edx, %ecx
27 ; X32-NEXT: movl %ecx, 40(%eax)
28 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
29 ; X32-NEXT: shldl $2, %ecx, %edx
30 ; X32-NEXT: movl %edx, 36(%eax)
31 ; X32-NEXT: shll $2, %ecx
32 ; X32-NEXT: movl %ecx, 32(%eax)
33 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
34 ; X32-NEXT: shll $31, %ecx
35 ; X32-NEXT: movl %ecx, 28(%eax)
36 ; X32-NEXT: movl $0, 24(%eax)
37 ; X32-NEXT: movl $0, 20(%eax)
38 ; X32-NEXT: movl $0, 16(%eax)
39 ; X32-NEXT: movl $0, 12(%eax)
40 ; X32-NEXT: movl $0, 8(%eax)
41 ; X32-NEXT: movl $0, 4(%eax)
42 ; X32-NEXT: movl $0, (%eax)
43 ; X32-NEXT: retl $4
44 ;
45 ; X64-LABEL: test_shl:
46 ; X64: # %bb.0:
47 ; X64-NEXT: movq %rdi, %rax
48 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rcx
49 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rdx
50 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rdi
51 ; X64-NEXT: shldq $2, %rdx, %rcx
52 ; X64-NEXT: shldq $2, %rdi, %rdx
53 ; X64-NEXT: shldq $2, %r9, %rdi
54 ; X64-NEXT: shlq $63, %rsi
55 ; X64-NEXT: shlq $2, %r9
56 ; X64-NEXT: movq %rcx, 56(%rax)
57 ; X64-NEXT: movq %rdx, 48(%rax)
58 ; X64-NEXT: movq %rdi, 40(%rax)
59 ; X64-NEXT: movq %r9, 32(%rax)
60 ; X64-NEXT: movq %rsi, 24(%rax)
61 ; X64-NEXT: xorps %xmm0, %xmm0
62 ; X64-NEXT: movaps %xmm0, (%rax)
63 ; X64-NEXT: movq $0, 16(%rax)
64 ; X64-NEXT: retq
65 %Amt = insertelement <2 x i256> <i256 1, i256 2>, i256 255, i32 0
66 %Out = shl <2 x i256> %In, %Amt
67 ret <2 x i256> %Out
68 }
70 define <2 x i256> @test_srl(<2 x i256> %In) {
71 ; X32-LABEL: test_srl:
72 ; X32: # %bb.0:
73 ; X32-NEXT: pushl %ebp
74 ; X32-NEXT: .cfi_def_cfa_offset 8
75 ; X32-NEXT: pushl %ebx
76 ; X32-NEXT: .cfi_def_cfa_offset 12
77 ; X32-NEXT: pushl %edi
78 ; X32-NEXT: .cfi_def_cfa_offset 16
79 ; X32-NEXT: pushl %esi
80 ; X32-NEXT: .cfi_def_cfa_offset 20
81 ; X32-NEXT: subl $8, %esp
82 ; X32-NEXT: .cfi_def_cfa_offset 28
83 ; X32-NEXT: .cfi_offset %esi, -20
84 ; X32-NEXT: .cfi_offset %edi, -16
85 ; X32-NEXT: .cfi_offset %ebx, -12
86 ; X32-NEXT: .cfi_offset %ebp, -8
87 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
88 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
89 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
90 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
91 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
92 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
93 ; X32-NEXT: movl %ebp, %esi
94 ; X32-NEXT: shldl $28, %edx, %esi
95 ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
96 ; X32-NEXT: shldl $28, %ebx, %edx
97 ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
98 ; X32-NEXT: shldl $28, %ecx, %ebx
99 ; X32-NEXT: movl %ecx, %esi
100 ; X32-NEXT: shldl $28, %edi, %esi
101 ; X32-NEXT: shldl $28, %eax, %edi
102 ; X32-NEXT: movl %eax, %edx
103 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
104 ; X32-NEXT: shldl $28, %eax, %edx
105 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
106 ; X32-NEXT: shrdl $4, %eax, %ecx
107 ; X32-NEXT: shrl $4, %ebp
108 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
109 ; X32-NEXT: movl %ebp, 60(%eax)
110 ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
111 ; X32-NEXT: movl %ebp, 56(%eax)
112 ; X32-NEXT: movl (%esp), %ebp # 4-byte Reload
113 ; X32-NEXT: movl %ebp, 52(%eax)
114 ; X32-NEXT: movl %ebx, 48(%eax)
115 ; X32-NEXT: movl %esi, 44(%eax)
116 ; X32-NEXT: movl %edi, 40(%eax)
117 ; X32-NEXT: movl %edx, 36(%eax)
118 ; X32-NEXT: movl %ecx, 32(%eax)
119 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
120 ; X32-NEXT: shrl $31, %ecx
121 ; X32-NEXT: movl %ecx, (%eax)
122 ; X32-NEXT: movl $0, 28(%eax)
123 ; X32-NEXT: movl $0, 24(%eax)
124 ; X32-NEXT: movl $0, 20(%eax)
125 ; X32-NEXT: movl $0, 16(%eax)
126 ; X32-NEXT: movl $0, 12(%eax)
127 ; X32-NEXT: movl $0, 8(%eax)
128 ; X32-NEXT: movl $0, 4(%eax)
129 ; X32-NEXT: addl $8, %esp
130 ; X32-NEXT: .cfi_def_cfa_offset 20
131 ; X32-NEXT: popl %esi
132 ; X32-NEXT: .cfi_def_cfa_offset 16
133 ; X32-NEXT: popl %edi
134 ; X32-NEXT: .cfi_def_cfa_offset 12
135 ; X32-NEXT: popl %ebx
136 ; X32-NEXT: .cfi_def_cfa_offset 8
137 ; X32-NEXT: popl %ebp
138 ; X32-NEXT: .cfi_def_cfa_offset 4
139 ; X32-NEXT: retl $4
140 ;
141 ; X64-LABEL: test_srl:
142 ; X64: # %bb.0:
143 ; X64-NEXT: movq %rdi, %rax
144 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rcx
145 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rdx
146 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rsi
147 ; X64-NEXT: shrdq $4, %rsi, %r9
148 ; X64-NEXT: shrdq $4, %rdx, %rsi
149 ; X64-NEXT: shrdq $4, %rcx, %rdx
150 ; X64-NEXT: shrq $63, %r8
151 ; X64-NEXT: shrq $4, %rcx
152 ; X64-NEXT: movq %rcx, 56(%rdi)
153 ; X64-NEXT: movq %rdx, 48(%rdi)
154 ; X64-NEXT: movq %rsi, 40(%rdi)
155 ; X64-NEXT: movq %r9, 32(%rdi)
156 ; X64-NEXT: movq %r8, (%rdi)
157 ; X64-NEXT: xorps %xmm0, %xmm0
158 ; X64-NEXT: movaps %xmm0, 16(%rdi)
159 ; X64-NEXT: movq $0, 8(%rdi)
160 ; X64-NEXT: retq
161 %Amt = insertelement <2 x i256> <i256 3, i256 4>, i256 255, i32 0
162 %Out = lshr <2 x i256> %In, %Amt
163 ret <2 x i256> %Out
164 }
166 define <2 x i256> @test_sra(<2 x i256> %In) {
167 ; X32-LABEL: test_sra:
168 ; X32: # %bb.0:
169 ; X32-NEXT: pushl %ebp
170 ; X32-NEXT: .cfi_def_cfa_offset 8
171 ; X32-NEXT: pushl %ebx
172 ; X32-NEXT: .cfi_def_cfa_offset 12
173 ; X32-NEXT: pushl %edi
174 ; X32-NEXT: .cfi_def_cfa_offset 16
175 ; X32-NEXT: pushl %esi
176 ; X32-NEXT: .cfi_def_cfa_offset 20
177 ; X32-NEXT: subl $8, %esp
178 ; X32-NEXT: .cfi_def_cfa_offset 28
179 ; X32-NEXT: .cfi_offset %esi, -20
180 ; X32-NEXT: .cfi_offset %edi, -16
181 ; X32-NEXT: .cfi_offset %ebx, -12
182 ; X32-NEXT: .cfi_offset %ebp, -8
183 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
184 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
185 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
186 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
187 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
188 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
189 ; X32-NEXT: movl %ebp, %esi
190 ; X32-NEXT: shldl $26, %edx, %esi
191 ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
192 ; X32-NEXT: shldl $26, %ebx, %edx
193 ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
194 ; X32-NEXT: shldl $26, %ecx, %ebx
195 ; X32-NEXT: movl %ecx, %esi
196 ; X32-NEXT: shldl $26, %edi, %esi
197 ; X32-NEXT: shldl $26, %eax, %edi
198 ; X32-NEXT: movl %eax, %edx
199 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
200 ; X32-NEXT: shldl $26, %eax, %edx
201 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
202 ; X32-NEXT: shrdl $6, %eax, %ecx
203 ; X32-NEXT: sarl $6, %ebp
204 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
205 ; X32-NEXT: movl %ebp, 60(%eax)
206 ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
207 ; X32-NEXT: movl %ebp, 56(%eax)
208 ; X32-NEXT: movl (%esp), %ebp # 4-byte Reload
209 ; X32-NEXT: movl %ebp, 52(%eax)
210 ; X32-NEXT: movl %ebx, 48(%eax)
211 ; X32-NEXT: movl %esi, 44(%eax)
212 ; X32-NEXT: movl %edi, 40(%eax)
213 ; X32-NEXT: movl %edx, 36(%eax)
214 ; X32-NEXT: movl %ecx, 32(%eax)
215 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
216 ; X32-NEXT: sarl $31, %ecx
217 ; X32-NEXT: movl %ecx, 28(%eax)
218 ; X32-NEXT: movl %ecx, 24(%eax)
219 ; X32-NEXT: movl %ecx, 20(%eax)
220 ; X32-NEXT: movl %ecx, 16(%eax)
221 ; X32-NEXT: movl %ecx, 12(%eax)
222 ; X32-NEXT: movl %ecx, 8(%eax)
223 ; X32-NEXT: movl %ecx, 4(%eax)
224 ; X32-NEXT: movl %ecx, (%eax)
225 ; X32-NEXT: addl $8, %esp
226 ; X32-NEXT: .cfi_def_cfa_offset 20
227 ; X32-NEXT: popl %esi
228 ; X32-NEXT: .cfi_def_cfa_offset 16
229 ; X32-NEXT: popl %edi
230 ; X32-NEXT: .cfi_def_cfa_offset 12
231 ; X32-NEXT: popl %ebx
232 ; X32-NEXT: .cfi_def_cfa_offset 8
233 ; X32-NEXT: popl %ebp
234 ; X32-NEXT: .cfi_def_cfa_offset 4
235 ; X32-NEXT: retl $4
236 ;
237 ; X64-LABEL: test_sra:
238 ; X64: # %bb.0:
239 ; X64-NEXT: movq %rdi, %rax
240 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rcx
241 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rdx
242 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rsi
243 ; X64-NEXT: shrdq $6, %rsi, %r9
244 ; X64-NEXT: shrdq $6, %rdx, %rsi
245 ; X64-NEXT: shrdq $6, %rcx, %rdx
246 ; X64-NEXT: sarq $63, %r8
247 ; X64-NEXT: sarq $6, %rcx
248 ; X64-NEXT: movq %rcx, 56(%rdi)
249 ; X64-NEXT: movq %rdx, 48(%rdi)
250 ; X64-NEXT: movq %rsi, 40(%rdi)
251 ; X64-NEXT: movq %r9, 32(%rdi)
252 ; X64-NEXT: movq %r8, 24(%rdi)
253 ; X64-NEXT: movq %r8, 16(%rdi)
254 ; X64-NEXT: movq %r8, 8(%rdi)
255 ; X64-NEXT: movq %r8, (%rdi)
256 ; X64-NEXT: retq
257 %Amt = insertelement <2 x i256> <i256 5, i256 6>, i256 255, i32 0
258 %Out = ashr <2 x i256> %In, %Amt
259 ret <2 x i256> %Out
260 }