1 ; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each
2 ; pass. Ignore it with 'grep -v'.
3 ; RUN: llc -mtriple=x86_64-- -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 \
4 ; RUN: | grep -v 'Verify generated machine code' | FileCheck %s
5 ; RUN: llc -mtriple=x86_64-- -O2 -debug-pass=Structure < %s -o /dev/null 2>&1 \
6 ; RUN: | grep -v 'Verify generated machine code' | FileCheck %s
7 ; RUN: llc -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \
8 ; RUN: | grep -v 'Verify generated machine code' | FileCheck %s
9 ; RUN: llc -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \
10 ; RUN: | FileCheck %s --check-prefix=FPM
14 ; CHECK-LABEL: Pass Arguments:
15 ; CHECK-NEXT: Target Library Information
16 ; CHECK-NEXT: Target Pass Configuration
17 ; CHECK-NEXT: Machine Module Information
18 ; CHECK-NEXT: Target Transform Information
19 ; CHECK-NEXT: Type-Based Alias Analysis
20 ; CHECK-NEXT: Scoped NoAlias Alias Analysis
21 ; CHECK-NEXT: Assumption Cache Tracker
22 ; CHECK-NEXT: Profile summary info
23 ; CHECK-NEXT: Create Garbage Collector Module Metadata
24 ; CHECK-NEXT: Machine Branch Probability Analysis
25 ; CHECK-NEXT: Default Regalloc Eviction Advisor
26 ; CHECK-NEXT: Default Regalloc Priority Advisor
27 ; CHECK-NEXT: ModulePass Manager
28 ; CHECK-NEXT: Pre-ISel Intrinsic Lowering
29 ; CHECK-NEXT: FunctionPass Manager
30 ; CHECK-NEXT: Expand large div/rem
31 ; CHECK-NEXT: Expand large fp convert
32 ; CHECK-NEXT: Expand Atomic instructions
33 ; CHECK-NEXT: Lower AMX intrinsics
34 ; CHECK-NEXT: Lower AMX type for load/store
35 ; CHECK-NEXT: Module Verifier
36 ; CHECK-NEXT: Dominator Tree Construction
37 ; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
38 ; CHECK-NEXT: Natural Loop Information
39 ; CHECK-NEXT: Canonicalize natural loops
40 ; CHECK-NEXT: Scalar Evolution Analysis
41 ; CHECK-NEXT: Loop Pass Manager
42 ; CHECK-NEXT: Canonicalize Freeze Instructions in Loops
43 ; CHECK-NEXT: Induction Variable Users
44 ; CHECK-NEXT: Loop Strength Reduction
45 ; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
46 ; CHECK-NEXT: Function Alias Analysis Results
47 ; CHECK-NEXT: Merge contiguous icmps into a memcmp
48 ; CHECK-NEXT: Natural Loop Information
49 ; CHECK-NEXT: Lazy Branch Probability Analysis
50 ; CHECK-NEXT: Lazy Block Frequency Analysis
51 ; CHECK-NEXT: Expand memcmp() to load/stores
52 ; CHECK-NEXT: Lower Garbage Collection Instructions
53 ; CHECK-NEXT: Shadow Stack GC Lowering
54 ; CHECK-NEXT: Lower constant intrinsics
55 ; CHECK-NEXT: Remove unreachable blocks from the CFG
56 ; CHECK-NEXT: Natural Loop Information
57 ; CHECK-NEXT: Post-Dominator Tree Construction
58 ; CHECK-NEXT: Branch Probability Analysis
59 ; CHECK-NEXT: Block Frequency Analysis
60 ; CHECK-NEXT: Constant Hoisting
61 ; CHECK-NEXT: Replace intrinsics with calls to vector library
62 ; CHECK-NEXT: Partially inline calls to library functions
63 ; CHECK-NEXT: Expand vector predication intrinsics
64 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
65 ; CHECK-NEXT: Expand reduction intrinsics
66 ; CHECK-NEXT: Natural Loop Information
67 ; CHECK-NEXT: TLS Variable Hoist
68 ; CHECK-NEXT: Interleaved Access Pass
69 ; CHECK-NEXT: X86 Partial Reduction
70 ; CHECK-NEXT: Expand indirectbr instructions
71 ; CHECK-NEXT: Natural Loop Information
72 ; CHECK-NEXT: CodeGen Prepare
73 ; CHECK-NEXT: Dominator Tree Construction
74 ; CHECK-NEXT: Exception handling preparation
75 ; CHECK-NEXT: Prepare callbr
76 ; CHECK-NEXT: Safe Stack instrumentation pass
77 ; CHECK-NEXT: Insert stack protectors
78 ; CHECK-NEXT: Module Verifier
79 ; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
80 ; CHECK-NEXT: Function Alias Analysis Results
81 ; CHECK-NEXT: Natural Loop Information
82 ; CHECK-NEXT: Post-Dominator Tree Construction
83 ; CHECK-NEXT: Branch Probability Analysis
84 ; CHECK-NEXT: Assignment Tracking Analysis
85 ; CHECK-NEXT: Lazy Branch Probability Analysis
86 ; CHECK-NEXT: Lazy Block Frequency Analysis
87 ; CHECK-NEXT: X86 DAG->DAG Instruction Selection
88 ; CHECK-NEXT: MachineDominator Tree Construction
89 ; CHECK-NEXT: Local Dynamic TLS Access Clean-up
90 ; CHECK-NEXT: X86 PIC Global Base Reg Initialization
91 ; CHECK-NEXT: Argument Stack Rebase
92 ; CHECK-NEXT: Finalize ISel and expand pseudo-instructions
93 ; CHECK-NEXT: X86 Domain Reassignment Pass
94 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
95 ; CHECK-NEXT: Early Tail Duplication
96 ; CHECK-NEXT: Optimize machine instruction PHIs
97 ; CHECK-NEXT: Slot index numbering
98 ; CHECK-NEXT: Merge disjoint stack slots
99 ; CHECK-NEXT: Local Stack Slot Allocation
100 ; CHECK-NEXT: Remove dead machine instructions
101 ; CHECK-NEXT: MachineDominator Tree Construction
102 ; CHECK-NEXT: Machine Natural Loop Construction
103 ; CHECK-NEXT: Machine Trace Metrics
104 ; CHECK-NEXT: Early If-Conversion
105 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
106 ; CHECK-NEXT: Machine InstCombiner
107 ; CHECK-NEXT: X86 cmov Conversion
108 ; CHECK-NEXT: MachineDominator Tree Construction
109 ; CHECK-NEXT: Machine Natural Loop Construction
110 ; CHECK-NEXT: Machine Block Frequency Analysis
111 ; CHECK-NEXT: Early Machine Loop Invariant Code Motion
112 ; CHECK-NEXT: MachineDominator Tree Construction
113 ; CHECK-NEXT: Machine Block Frequency Analysis
114 ; CHECK-NEXT: Machine Common Subexpression Elimination
115 ; CHECK-NEXT: MachinePostDominator Tree Construction
116 ; CHECK-NEXT: Machine Cycle Info Analysis
117 ; CHECK-NEXT: Machine code sinking
118 ; CHECK-NEXT: Peephole Optimizations
119 ; CHECK-NEXT: Remove dead machine instructions
120 ; CHECK-NEXT: Live Range Shrink
121 ; CHECK-NEXT: X86 Fixup SetCC
122 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
123 ; CHECK-NEXT: X86 LEA Optimize
124 ; CHECK-NEXT: X86 Optimize Call Frame
125 ; CHECK-NEXT: X86 Avoid Store Forwarding Block
126 ; CHECK-NEXT: X86 speculative load hardening
127 ; CHECK-NEXT: MachineDominator Tree Construction
128 ; CHECK-NEXT: X86 EFLAGS copy lowering
129 ; CHECK-NEXT: X86 DynAlloca Expander
130 ; CHECK-NEXT: MachineDominator Tree Construction
131 ; CHECK-NEXT: Machine Natural Loop Construction
132 ; CHECK-NEXT: Tile Register Pre-configure
133 ; CHECK-NEXT: Detect Dead Lanes
134 ; CHECK-NEXT: Process Implicit Definitions
135 ; CHECK-NEXT: Remove unreachable machine basic blocks
136 ; CHECK-NEXT: Live Variable Analysis
137 ; CHECK-NEXT: Eliminate PHI nodes for register allocation
138 ; CHECK-NEXT: Two-Address instruction pass
139 ; CHECK-NEXT: Slot index numbering
140 ; CHECK-NEXT: Live Interval Analysis
141 ; CHECK-NEXT: Register Coalescer
142 ; CHECK-NEXT: Rename Disconnected Subregister Components
143 ; CHECK-NEXT: Machine Instruction Scheduler
144 ; CHECK-NEXT: Machine Block Frequency Analysis
145 ; CHECK-NEXT: Debug Variable Analysis
146 ; CHECK-NEXT: Live Stack Slot Analysis
147 ; CHECK-NEXT: Virtual Register Map
148 ; CHECK-NEXT: Live Register Matrix
149 ; CHECK-NEXT: Bundle Machine CFG Edges
150 ; CHECK-NEXT: Spill Code Placement Analysis
151 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
152 ; CHECK-NEXT: Machine Optimization Remark Emitter
153 ; CHECK-NEXT: Greedy Register Allocator
154 ; CHECK-NEXT: Tile Register Configure
155 ; CHECK-NEXT: Greedy Register Allocator
156 ; CHECK-NEXT: Virtual Register Rewriter
157 ; CHECK-NEXT: Register Allocation Pass Scoring
158 ; CHECK-NEXT: Stack Slot Coloring
159 ; CHECK-NEXT: Machine Copy Propagation Pass
160 ; CHECK-NEXT: Machine Loop Invariant Code Motion
161 ; CHECK-NEXT: X86 Lower Tile Copy
162 ; CHECK-NEXT: Bundle Machine CFG Edges
163 ; CHECK-NEXT: X86 FP Stackifier
164 ; CHECK-NEXT: MachineDominator Tree Construction
165 ; CHECK-NEXT: Machine Dominance Frontier Construction
166 ; CHECK-NEXT: X86 Load Value Injection (LVI) Load Hardening
167 ; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
168 ; CHECK-NEXT: Fixup Statepoint Caller Saved
169 ; CHECK-NEXT: PostRA Machine Sink
170 ; CHECK-NEXT: Machine Block Frequency Analysis
171 ; CHECK-NEXT: MachinePostDominator Tree Construction
172 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
173 ; CHECK-NEXT: Machine Optimization Remark Emitter
174 ; CHECK-NEXT: Shrink Wrapping analysis
175 ; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization
176 ; CHECK-NEXT: Machine Late Instructions Cleanup Pass
177 ; CHECK-NEXT: Control Flow Optimizer
178 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
179 ; CHECK-NEXT: Tail Duplication
180 ; CHECK-NEXT: Machine Copy Propagation Pass
181 ; CHECK-NEXT: Post-RA pseudo instruction expansion pass
182 ; CHECK-NEXT: X86 pseudo instruction expansion pass
183 ; CHECK-NEXT: Insert KCFI indirect call checks
184 ; CHECK-NEXT: MachineDominator Tree Construction
185 ; CHECK-NEXT: Machine Natural Loop Construction
186 ; CHECK-NEXT: Post RA top-down list latency scheduler
187 ; CHECK-NEXT: Analyze Machine Code For Garbage Collection
188 ; CHECK-NEXT: Machine Block Frequency Analysis
189 ; CHECK-NEXT: MachinePostDominator Tree Construction
190 ; CHECK-NEXT: Branch Probability Basic Block Placement
191 ; CHECK-NEXT: Insert fentry calls
192 ; CHECK-NEXT: Insert XRay ops
193 ; CHECK-NEXT: Implement the 'patchable-function' attribute
194 ; CHECK-NEXT: ReachingDefAnalysis
195 ; CHECK-NEXT: X86 Execution Dependency Fix
196 ; CHECK-NEXT: BreakFalseDeps
197 ; CHECK-NEXT: X86 Indirect Branch Tracking
198 ; CHECK-NEXT: X86 vzeroupper inserter
199 ; CHECK-NEXT: MachineDominator Tree Construction
200 ; CHECK-NEXT: Machine Natural Loop Construction
201 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
202 ; CHECK-NEXT: X86 Byte/Word Instruction Fixup
203 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
204 ; CHECK-NEXT: X86 Atom pad short functions
205 ; CHECK-NEXT: X86 LEA Fixup
206 ; CHECK-NEXT: X86 Fixup Inst Tuning
207 ; CHECK-NEXT: X86 Fixup Vector Constants
208 ; CHECK-NEXT: Compressing EVEX instrs to VEX encoding when possible
209 ; CHECK-NEXT: X86 Discriminate Memory Operands
210 ; CHECK-NEXT: X86 Insert Cache Prefetches
211 ; CHECK-NEXT: X86 insert wait instruction
212 ; CHECK-NEXT: Contiguously Lay Out Funclets
213 ; CHECK-NEXT: StackMap Liveness Analysis
214 ; CHECK-NEXT: Live DEBUG_VALUE analysis
215 ; CHECK-NEXT: Machine Sanitizer Binary Metadata
216 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
217 ; CHECK-NEXT: Machine Optimization Remark Emitter
218 ; CHECK-NEXT: Stack Frame Layout Analysis
219 ; CHECK-NEXT: X86 Speculative Execution Side Effect Suppression
220 ; CHECK-NEXT: X86 Indirect Thunks
221 ; CHECK-NEXT: X86 Return Thunks
222 ; CHECK-NEXT: Check CFA info and insert CFI instructions if needed
223 ; CHECK-NEXT: X86 Load Value Injection (LVI) Ret-Hardening
224 ; CHECK-NEXT: Pseudo Probe Inserter
225 ; CHECK-NEXT: Unpack machine instruction bundles
226 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
227 ; CHECK-NEXT: Machine Optimization Remark Emitter
228 ; CHECK-NEXT: X86 Assembly Printer
229 ; CHECK-NEXT: Free MachineFunction
231 ; We should only have one function pass manager.
232 ; In the past, module passes have accidentally been added into the middle of
233 ; the codegen pipeline, implicitly creating new function pass managers.
234 ; FPM: FunctionPass Manager
235 ; FPM-NOT: FunctionPass Manager