| blob | 7373cd32df98d49b66fc2f9f54d8bbf1da2e423a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefix=X86-SSE2
3 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefix=X86-AVX
4 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefix=X86-AVX
5 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64-SSE
6 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefix=X64-AVX
7 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefix=X64-AVX
8 ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64-SSE
9 ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefix=X64-AVX
10 ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefix=X64-AVX
12 define <1 x iXLen> @lrint_v1f32(<1 x float> %x) {
13 ; X86-SSE2-LABEL: lrint_v1f32:
14 ; X86-SSE2: # %bb.0:
15 ; X86-SSE2-NEXT: cvtss2si {{[0-9]+}}(%esp), %eax
16 ; X86-SSE2-NEXT: retl
17 ;
18 ; X86-AVX-LABEL: lrint_v1f32:
19 ; X86-AVX: # %bb.0:
20 ; X86-AVX-NEXT: vcvtss2si {{[0-9]+}}(%esp), %eax
21 ; X86-AVX-NEXT: retl
22 %a = call <1 x iXLen> @llvm.lrint.v1iXLen.v1f32(<1 x float> %x)
23 ret <1 x iXLen> %a
24 }
25 declare <1 x iXLen> @llvm.lrint.v1iXLen.v1f32(<1 x float>)
27 define <2 x iXLen> @lrint_v2f32(<2 x float> %x) {
28 ; X86-SSE2-LABEL: lrint_v2f32:
29 ; X86-SSE2: # %bb.0:
30 ; X86-SSE2-NEXT: movaps %xmm0, %xmm1
31 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3],xmm0[3,3]
32 ; X86-SSE2-NEXT: cvtss2si %xmm1, %eax
33 ; X86-SSE2-NEXT: movd %eax, %xmm1
34 ; X86-SSE2-NEXT: movaps %xmm0, %xmm2
35 ; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]
36 ; X86-SSE2-NEXT: cvtss2si %xmm2, %eax
37 ; X86-SSE2-NEXT: movd %eax, %xmm2
38 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
39 ; X86-SSE2-NEXT: cvtss2si %xmm0, %eax
40 ; X86-SSE2-NEXT: movd %eax, %xmm1
41 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
42 ; X86-SSE2-NEXT: cvtss2si %xmm0, %eax
43 ; X86-SSE2-NEXT: movd %eax, %xmm0
44 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
45 ; X86-SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
46 ; X86-SSE2-NEXT: movdqa %xmm1, %xmm0
47 ; X86-SSE2-NEXT: retl
48 ;
49 ; X86-AVX-LABEL: lrint_v2f32:
50 ; X86-AVX: # %bb.0:
51 ; X86-AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
52 ; X86-AVX-NEXT: vcvtss2si %xmm1, %eax
53 ; X86-AVX-NEXT: vcvtss2si %xmm0, %ecx
54 ; X86-AVX-NEXT: vmovd %ecx, %xmm1
55 ; X86-AVX-NEXT: vpinsrd $1, %eax, %xmm1, %xmm1
56 ; X86-AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]
57 ; X86-AVX-NEXT: vcvtss2si %xmm2, %eax
58 ; X86-AVX-NEXT: vpinsrd $2, %eax, %xmm1, %xmm1
59 ; X86-AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
60 ; X86-AVX-NEXT: vcvtss2si %xmm0, %eax
61 ; X86-AVX-NEXT: vpinsrd $3, %eax, %xmm1, %xmm0
62 ; X86-AVX-NEXT: retl
63 %a = call <2 x iXLen> @llvm.lrint.v2iXLen.v2f32(<2 x float> %x)
64 ret <2 x iXLen> %a
65 }
66 declare <2 x iXLen> @llvm.lrint.v2iXLen.v2f32(<2 x float>)
68 define <4 x iXLen> @lrint_v4f32(<4 x float> %x) {
69 ; X86-SSE2-LABEL: lrint_v4f32:
70 ; X86-SSE2: # %bb.0:
71 ; X86-SSE2-NEXT: movaps %xmm0, %xmm1
72 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,3],xmm0[3,3]
73 ; X86-SSE2-NEXT: cvtss2si %xmm1, %eax
74 ; X86-SSE2-NEXT: movd %eax, %xmm1
75 ; X86-SSE2-NEXT: movaps %xmm0, %xmm2
76 ; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]
77 ; X86-SSE2-NEXT: cvtss2si %xmm2, %eax
78 ; X86-SSE2-NEXT: movd %eax, %xmm2
79 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
80 ; X86-SSE2-NEXT: cvtss2si %xmm0, %eax
81 ; X86-SSE2-NEXT: movd %eax, %xmm1
82 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
83 ; X86-SSE2-NEXT: cvtss2si %xmm0, %eax
84 ; X86-SSE2-NEXT: movd %eax, %xmm0
85 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
86 ; X86-SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
87 ; X86-SSE2-NEXT: movdqa %xmm1, %xmm0
88 ; X86-SSE2-NEXT: retl
89 ;
90 ; X86-AVX-LABEL: lrint_v4f32:
91 ; X86-AVX: # %bb.0:
92 ; X86-AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
93 ; X86-AVX-NEXT: vcvtss2si %xmm1, %eax
94 ; X86-AVX-NEXT: vcvtss2si %xmm0, %ecx
95 ; X86-AVX-NEXT: vmovd %ecx, %xmm1
96 ; X86-AVX-NEXT: vpinsrd $1, %eax, %xmm1, %xmm1
97 ; X86-AVX-NEXT: vshufpd {{.*#+}} xmm2 = xmm0[1,0]
98 ; X86-AVX-NEXT: vcvtss2si %xmm2, %eax
99 ; X86-AVX-NEXT: vpinsrd $2, %eax, %xmm1, %xmm1
100 ; X86-AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
101 ; X86-AVX-NEXT: vcvtss2si %xmm0, %eax
102 ; X86-AVX-NEXT: vpinsrd $3, %eax, %xmm1, %xmm0
103 ; X86-AVX-NEXT: retl
104 %a = call <4 x iXLen> @llvm.lrint.v4iXLen.v4f32(<4 x float> %x)
105 ret <4 x iXLen> %a
106 }
107 declare <4 x iXLen> @llvm.lrint.v4iXLen.v4f32(<4 x float>)
109 define <8 x iXLen> @lrint_v8f32(<8 x float> %x) {
110 ; X86-SSE2-LABEL: lrint_v8f32:
111 ; X86-SSE2: # %bb.0:
112 ; X86-SSE2-NEXT: movaps %xmm0, %xmm2
113 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
114 ; X86-SSE2-NEXT: cvtss2si %xmm0, %eax
115 ; X86-SSE2-NEXT: movd %eax, %xmm0
116 ; X86-SSE2-NEXT: movaps %xmm2, %xmm3
117 ; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm2[1]
118 ; X86-SSE2-NEXT: cvtss2si %xmm3, %eax
119 ; X86-SSE2-NEXT: movd %eax, %xmm3
120 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
121 ; X86-SSE2-NEXT: cvtss2si %xmm2, %eax
122 ; X86-SSE2-NEXT: movd %eax, %xmm0
123 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,1,1]
124 ; X86-SSE2-NEXT: cvtss2si %xmm2, %eax
125 ; X86-SSE2-NEXT: movd %eax, %xmm2
126 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
127 ; X86-SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
128 ; X86-SSE2-NEXT: movaps %xmm1, %xmm2
129 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,3],xmm1[3,3]
130 ; X86-SSE2-NEXT: cvtss2si %xmm2, %eax
131 ; X86-SSE2-NEXT: movd %eax, %xmm2
132 ; X86-SSE2-NEXT: movaps %xmm1, %xmm3
133 ; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm1[1]
134 ; X86-SSE2-NEXT: cvtss2si %xmm3, %eax
135 ; X86-SSE2-NEXT: movd %eax, %xmm3
136 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
137 ; X86-SSE2-NEXT: cvtss2si %xmm1, %eax
138 ; X86-SSE2-NEXT: movd %eax, %xmm2
139 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,1,1]
140 ; X86-SSE2-NEXT: cvtss2si %xmm1, %eax
141 ; X86-SSE2-NEXT: movd %eax, %xmm1
142 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
143 ; X86-SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
144 ; X86-SSE2-NEXT: movdqa %xmm2, %xmm1
145 ; X86-SSE2-NEXT: retl
146 %a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8f32(<8 x float> %x)
147 ret <8 x iXLen> %a
148 }
149 declare <8 x iXLen> @llvm.lrint.v8iXLen.v8f32(<8 x float>)
151 define <16 x iXLen> @lrint_v16iXLen_v16f32(<16 x float> %x) {
152 %a = call <16 x iXLen> @llvm.lrint.v16iXLen.v16f32(<16 x float> %x)
153 ret <16 x iXLen> %a
154 }
155 declare <16 x iXLen> @llvm.lrint.v16iXLen.v16f32(<16 x float>)
157 define <1 x i64> @lrint_v1f64(<1 x double> %x) {
158 ; X86-SSE2-LABEL: lrint_v1f64:
159 ; X86-SSE2: # %bb.0:
160 ; X86-SSE2-NEXT: pushl %ebp
161 ; X86-SSE2-NEXT: .cfi_def_cfa_offset 8
162 ; X86-SSE2-NEXT: .cfi_offset %ebp, -8
163 ; X86-SSE2-NEXT: movl %esp, %ebp
164 ; X86-SSE2-NEXT: .cfi_def_cfa_register %ebp
165 ; X86-SSE2-NEXT: andl $-8, %esp
166 ; X86-SSE2-NEXT: subl $8, %esp
167 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
168 ; X86-SSE2-NEXT: movsd %xmm0, (%esp)
169 ; X86-SSE2-NEXT: fldl (%esp)
170 ; X86-SSE2-NEXT: fistpll (%esp)
171 ; X86-SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
172 ; X86-SSE2-NEXT: movd %xmm0, %eax
173 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
174 ; X86-SSE2-NEXT: movd %xmm0, %edx
175 ; X86-SSE2-NEXT: movl %ebp, %esp
176 ; X86-SSE2-NEXT: popl %ebp
177 ; X86-SSE2-NEXT: .cfi_def_cfa %esp, 4
178 ; X86-SSE2-NEXT: retl
179 ;
180 ; X86-AVX-LABEL: lrint_v1f64:
181 ; X86-AVX: # %bb.0:
182 ; X86-AVX-NEXT: pushl %ebp
183 ; X86-AVX-NEXT: .cfi_def_cfa_offset 8
184 ; X86-AVX-NEXT: .cfi_offset %ebp, -8
185 ; X86-AVX-NEXT: movl %esp, %ebp
186 ; X86-AVX-NEXT: .cfi_def_cfa_register %ebp
187 ; X86-AVX-NEXT: andl $-8, %esp
188 ; X86-AVX-NEXT: subl $8, %esp
189 ; X86-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
190 ; X86-AVX-NEXT: vmovsd %xmm0, (%esp)
191 ; X86-AVX-NEXT: fldl (%esp)
192 ; X86-AVX-NEXT: fistpll (%esp)
193 ; X86-AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
194 ; X86-AVX-NEXT: vmovd %xmm0, %eax
195 ; X86-AVX-NEXT: vpextrd $1, %xmm0, %edx
196 ; X86-AVX-NEXT: movl %ebp, %esp
197 ; X86-AVX-NEXT: popl %ebp
198 ; X86-AVX-NEXT: .cfi_def_cfa %esp, 4
199 ; X86-AVX-NEXT: retl
200 ;
201 ; X64-SSE-LABEL: lrint_v1f64:
202 ; X64-SSE: # %bb.0:
203 ; X64-SSE-NEXT: cvtsd2si %xmm0, %rax
204 ; X64-SSE-NEXT: retq
205 ;
206 ; X64-AVX-LABEL: lrint_v1f64:
207 ; X64-AVX: # %bb.0:
208 ; X64-AVX-NEXT: vcvtsd2si %xmm0, %rax
209 ; X64-AVX-NEXT: retq
210 %a = call <1 x i64> @llvm.lrint.v1i64.v1f64(<1 x double> %x)
211 ret <1 x i64> %a
212 }
213 declare <1 x i64> @llvm.lrint.v1i64.v1f64(<1 x double>)
215 define <2 x i64> @lrint_v2f64(<2 x double> %x) {
216 ; X86-SSE2-LABEL: lrint_v2f64:
217 ; X86-SSE2: # %bb.0:
218 ; X86-SSE2-NEXT: pushl %ebp
219 ; X86-SSE2-NEXT: .cfi_def_cfa_offset 8
220 ; X86-SSE2-NEXT: .cfi_offset %ebp, -8
221 ; X86-SSE2-NEXT: movl %esp, %ebp
222 ; X86-SSE2-NEXT: .cfi_def_cfa_register %ebp
223 ; X86-SSE2-NEXT: andl $-8, %esp
224 ; X86-SSE2-NEXT: subl $16, %esp
225 ; X86-SSE2-NEXT: movhps %xmm0, (%esp)
226 ; X86-SSE2-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
227 ; X86-SSE2-NEXT: fldl (%esp)
228 ; X86-SSE2-NEXT: fistpll (%esp)
229 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
230 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
231 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
232 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
233 ; X86-SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
234 ; X86-SSE2-NEXT: movl %ebp, %esp
235 ; X86-SSE2-NEXT: popl %ebp
236 ; X86-SSE2-NEXT: .cfi_def_cfa %esp, 4
237 ; X86-SSE2-NEXT: retl
238 ;
239 ; X86-AVX-LABEL: lrint_v2f64:
240 ; X86-AVX: # %bb.0:
241 ; X86-AVX-NEXT: pushl %ebp
242 ; X86-AVX-NEXT: .cfi_def_cfa_offset 8
243 ; X86-AVX-NEXT: .cfi_offset %ebp, -8
244 ; X86-AVX-NEXT: movl %esp, %ebp
245 ; X86-AVX-NEXT: .cfi_def_cfa_register %ebp
246 ; X86-AVX-NEXT: andl $-8, %esp
247 ; X86-AVX-NEXT: subl $16, %esp
248 ; X86-AVX-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)
249 ; X86-AVX-NEXT: vmovhps %xmm0, (%esp)
250 ; X86-AVX-NEXT: fldl {{[0-9]+}}(%esp)
251 ; X86-AVX-NEXT: fistpll {{[0-9]+}}(%esp)
252 ; X86-AVX-NEXT: fldl (%esp)
253 ; X86-AVX-NEXT: fistpll (%esp)
254 ; X86-AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
255 ; X86-AVX-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
256 ; X86-AVX-NEXT: vpinsrd $2, (%esp), %xmm0, %xmm0
257 ; X86-AVX-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0
258 ; X86-AVX-NEXT: movl %ebp, %esp
259 ; X86-AVX-NEXT: popl %ebp
260 ; X86-AVX-NEXT: .cfi_def_cfa %esp, 4
261 ; X86-AVX-NEXT: retl
262 ;
263 ; X64-SSE-LABEL: lrint_v2f64:
264 ; X64-SSE: # %bb.0:
265 ; X64-SSE-NEXT: cvtsd2si %xmm0, %rax
266 ; X64-SSE-NEXT: movq %rax, %xmm1
267 ; X64-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
268 ; X64-SSE-NEXT: cvtsd2si %xmm0, %rax
269 ; X64-SSE-NEXT: movq %rax, %xmm0
270 ; X64-SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
271 ; X64-SSE-NEXT: movdqa %xmm1, %xmm0
272 ; X64-SSE-NEXT: retq
273 ;
274 ; X64-AVX-LABEL: lrint_v2f64:
275 ; X64-AVX: # %bb.0:
276 ; X64-AVX-NEXT: vcvtsd2si %xmm0, %rax
277 ; X64-AVX-NEXT: vmovq %rax, %xmm1
278 ; X64-AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm0[1,0]
279 ; X64-AVX-NEXT: vcvtsd2si %xmm0, %rax
280 ; X64-AVX-NEXT: vmovq %rax, %xmm0
281 ; X64-AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
282 ; X64-AVX-NEXT: retq
283 %a = call <2 x i64> @llvm.lrint.v2i64.v2f64(<2 x double> %x)
284 ret <2 x i64> %a
285 }
286 declare <2 x i64> @llvm.lrint.v2i64.v2f64(<2 x double>)
288 define <4 x i64> @lrint_v4f64(<4 x double> %x) {
289 ; X86-SSE2-LABEL: lrint_v4f64:
290 ; X86-SSE2: # %bb.0:
291 ; X86-SSE2-NEXT: pushl %ebp
292 ; X86-SSE2-NEXT: .cfi_def_cfa_offset 8
293 ; X86-SSE2-NEXT: .cfi_offset %ebp, -8
294 ; X86-SSE2-NEXT: movl %esp, %ebp
295 ; X86-SSE2-NEXT: .cfi_def_cfa_register %ebp
296 ; X86-SSE2-NEXT: andl $-8, %esp
297 ; X86-SSE2-NEXT: subl $32, %esp
298 ; X86-SSE2-NEXT: movhps %xmm0, {{[0-9]+}}(%esp)
299 ; X86-SSE2-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
300 ; X86-SSE2-NEXT: movhps %xmm1, (%esp)
301 ; X86-SSE2-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
302 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
303 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
304 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
305 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
306 ; X86-SSE2-NEXT: fldl (%esp)
307 ; X86-SSE2-NEXT: fistpll (%esp)
308 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
309 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
310 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
311 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
312 ; X86-SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
313 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
314 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
315 ; X86-SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]
316 ; X86-SSE2-NEXT: movl %ebp, %esp
317 ; X86-SSE2-NEXT: popl %ebp
318 ; X86-SSE2-NEXT: .cfi_def_cfa %esp, 4
319 ; X86-SSE2-NEXT: retl
320 ;
321 ; X64-SSE-LABEL: lrint_v4f64:
322 ; X64-SSE: # %bb.0:
323 ; X64-SSE-NEXT: cvtsd2si %xmm0, %rax
324 ; X64-SSE-NEXT: movq %rax, %xmm2
325 ; X64-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
326 ; X64-SSE-NEXT: cvtsd2si %xmm0, %rax
327 ; X64-SSE-NEXT: movq %rax, %xmm0
328 ; X64-SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
329 ; X64-SSE-NEXT: cvtsd2si %xmm1, %rax
330 ; X64-SSE-NEXT: movq %rax, %xmm3
331 ; X64-SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]
332 ; X64-SSE-NEXT: cvtsd2si %xmm1, %rax
333 ; X64-SSE-NEXT: movq %rax, %xmm0
334 ; X64-SSE-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm0[0]
335 ; X64-SSE-NEXT: movdqa %xmm2, %xmm0
336 ; X64-SSE-NEXT: movdqa %xmm3, %xmm1
337 ; X64-SSE-NEXT: retq
338 %a = call <4 x i64> @llvm.lrint.v4i64.v4f64(<4 x double> %x)
339 ret <4 x i64> %a
340 }
341 declare <4 x i64> @llvm.lrint.v4i64.v4f64(<4 x double>)
343 define <8 x i64> @lrint_v8f64(<8 x double> %x) {
344 ; X86-SSE2-LABEL: lrint_v8f64:
345 ; X86-SSE2: # %bb.0:
346 ; X86-SSE2-NEXT: pushl %ebp
347 ; X86-SSE2-NEXT: .cfi_def_cfa_offset 8
348 ; X86-SSE2-NEXT: .cfi_offset %ebp, -8
349 ; X86-SSE2-NEXT: movl %esp, %ebp
350 ; X86-SSE2-NEXT: .cfi_def_cfa_register %ebp
351 ; X86-SSE2-NEXT: andl $-16, %esp
352 ; X86-SSE2-NEXT: subl $80, %esp
353 ; X86-SSE2-NEXT: movaps 8(%ebp), %xmm3
354 ; X86-SSE2-NEXT: movhps %xmm0, {{[0-9]+}}(%esp)
355 ; X86-SSE2-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
356 ; X86-SSE2-NEXT: movhps %xmm1, {{[0-9]+}}(%esp)
357 ; X86-SSE2-NEXT: movlps %xmm1, {{[0-9]+}}(%esp)
358 ; X86-SSE2-NEXT: movhps %xmm2, {{[0-9]+}}(%esp)
359 ; X86-SSE2-NEXT: movlps %xmm2, {{[0-9]+}}(%esp)
360 ; X86-SSE2-NEXT: movhps %xmm3, {{[0-9]+}}(%esp)
361 ; X86-SSE2-NEXT: movlps %xmm3, {{[0-9]+}}(%esp)
362 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
363 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
364 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
365 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
366 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
367 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
368 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
369 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
370 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
371 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
372 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
373 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
374 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
375 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
376 ; X86-SSE2-NEXT: fldl {{[0-9]+}}(%esp)
377 ; X86-SSE2-NEXT: fistpll {{[0-9]+}}(%esp)
378 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
379 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
380 ; X86-SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
381 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
382 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
383 ; X86-SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]
384 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
385 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
386 ; X86-SSE2-NEXT: movlhps {{.*#+}} xmm2 = xmm2[0],xmm3[0]
387 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm4 = mem[0],zero
388 ; X86-SSE2-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
389 ; X86-SSE2-NEXT: movlhps {{.*#+}} xmm3 = xmm3[0],xmm4[0]
390 ; X86-SSE2-NEXT: movl %ebp, %esp
391 ; X86-SSE2-NEXT: popl %ebp
392 ; X86-SSE2-NEXT: .cfi_def_cfa %esp, 4
393 ; X86-SSE2-NEXT: retl
394 ;
395 ; X64-SSE-LABEL: lrint_v8f64:
396 ; X64-SSE: # %bb.0:
397 ; X64-SSE-NEXT: cvtsd2si %xmm0, %rax
398 ; X64-SSE-NEXT: movq %rax, %xmm4
399 ; X64-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
400 ; X64-SSE-NEXT: cvtsd2si %xmm0, %rax
401 ; X64-SSE-NEXT: movq %rax, %xmm0
402 ; X64-SSE-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm0[0]
403 ; X64-SSE-NEXT: cvtsd2si %xmm1, %rax
404 ; X64-SSE-NEXT: movq %rax, %xmm5
405 ; X64-SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1,1]
406 ; X64-SSE-NEXT: cvtsd2si %xmm1, %rax
407 ; X64-SSE-NEXT: movq %rax, %xmm0
408 ; X64-SSE-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm0[0]
409 ; X64-SSE-NEXT: cvtsd2si %xmm2, %rax
410 ; X64-SSE-NEXT: movq %rax, %xmm6
411 ; X64-SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]
412 ; X64-SSE-NEXT: cvtsd2si %xmm2, %rax
413 ; X64-SSE-NEXT: movq %rax, %xmm0
414 ; X64-SSE-NEXT: punpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm0[0]
415 ; X64-SSE-NEXT: cvtsd2si %xmm3, %rax
416 ; X64-SSE-NEXT: movq %rax, %xmm7
417 ; X64-SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1,1]
418 ; X64-SSE-NEXT: cvtsd2si %xmm3, %rax
419 ; X64-SSE-NEXT: movq %rax, %xmm0
420 ; X64-SSE-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm0[0]
421 ; X64-SSE-NEXT: movdqa %xmm4, %xmm0
422 ; X64-SSE-NEXT: movdqa %xmm5, %xmm1
423 ; X64-SSE-NEXT: movdqa %xmm6, %xmm2
424 ; X64-SSE-NEXT: movdqa %xmm7, %xmm3
425 ; X64-SSE-NEXT: retq
426 %a = call <8 x i64> @llvm.lrint.v8i64.v8f64(<8 x double> %x)
427 ret <8 x i64> %a
428 }
429 declare <8 x i64> @llvm.lrint.v8i64.v8f64(<8 x double>)