1 # RUN: llc %s -o - -experimental-debug-variable-locations \
2 # RUN: -start-before=x86-flags-copy-lowering -stop-after=virtregrewriter \
3 # RUN: -mtriple x86_64-unknown-unknown \
6 # This test is for stack spill folding -- the INC32r near the end of the MIR
7 # below show be morphed into an INC32m by the register allocator, making it
8 # load-operate-store to %stack.0. We should track this fact in the substitution
9 # table, by adding a substitution to the memory-operand operand number.
11 # The INC32r is a tied-def instruction.
13 # NB: This test would more ideally start at phi-node-elimination, where
14 # register allocation begins, however for some reason the INC32r gets
15 # transformed into a different instruction if we do that. Start at the last
16 # optimisation pass before regalloc instead.
18 # CHECK: debugValueSubstitutions:
19 # CHECK-NEXT: - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 1000000, subreg: 0 }
21 # CHECK: INC32m %stack.0, {{.*}} debug-instr-number 2,
23 ; ModuleID = 'reduced.ll'
24 source_filename = "reduced.ll"
25 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
27 %"class.llvm::APInt" = type { i32, %union.anon }
28 %union.anon = type { i64 }
30 define void @_ZNK4llvm5APInt5magicEv() local_unnamed_addr align 2 !dbg !7 {
35 !llvm.module.flags = !{!3, !4, !5}
38 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
39 !1 = !DIFile(filename: "test.c", directory: ".")
41 !3 = !{i32 7, !"Dwarf Version", i32 4}
42 !4 = !{i32 2, !"Debug Info Version", i32 3}
43 !5 = !{i32 1, !"wchar_size", i32 4}
45 !7 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 3, type: !8, scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
46 !8 = !DISubroutineType(types: !9)
48 !10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
49 !11 = !DIBasicType(name: "short", size: 16, encoding: DW_ATE_signed)
50 !12 = !DILocalVariable(name: "bar", arg: 1, scope: !7, file: !1, line: 3, type: !11)
51 !13 = !DILocation(line: 0, scope: !7)
52 !14 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
53 !15 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 7)
57 name: _ZNK4llvm5APInt5magicEv
59 tracksRegLiveness: true
62 - { id: 0, class: gr64 }
63 - { id: 1, class: gr32 }
64 - { id: 2, class: gr64 }
65 - { id: 3, class: gr32 }
66 - { id: 4, class: gr64 }
67 - { id: 5, class: gr32 }
68 - { id: 6, class: gr32 }
69 - { id: 7, class: gr32 }
70 - { id: 8, class: gr64 }
71 - { id: 9, class: gr32 }
72 - { id: 10, class: gr64 }
73 - { id: 11, class: gr32 }
74 - { id: 12, class: gr64 }
75 - { id: 13, class: gr32 }
76 - { id: 14, class: gr64 }
77 - { id: 15, class: gr32 }
78 - { id: 16, class: gr64 }
79 - { id: 17, class: gr64 }
80 - { id: 18, class: gr64 }
81 - { id: 19, class: gr32 }
82 - { id: 20, class: gr8 }
83 - { id: 21, class: gr32 }
84 - { id: 22, class: gr64 }
85 - { id: 23, class: gr64 }
86 - { id: 24, class: gr64 }
87 - { id: 25, class: gr64 }
88 - { id: 26, class: gr64 }
89 - { id: 27, class: gr32 }
90 - { id: 28, class: gr8 }
91 - { id: 29, class: gr64 }
92 - { id: 30, class: gr64 }
93 - { id: 31, class: gr64 }
94 - { id: 32, class: gr64 }
95 - { id: 33, class: gr64 }
96 - { id: 34, class: gr64 }
97 - { id: 35, class: gr64 }
98 - { id: 36, class: gr64 }
99 - { id: 37, class: gr64 }
100 - { id: 38, class: gr8 }
104 machineFunctionInfo: {}
107 %15:gr32 = IMPLICIT_DEF
108 %14:gr64 = IMPLICIT_DEF
109 %17:gr64 = IMPLICIT_DEF
110 %18:gr64 = IMPLICIT_DEF
111 %19:gr32 = MOV32r0 implicit-def dead $eflags
112 %22:gr64 = IMPLICIT_DEF
113 %23:gr64 = IMPLICIT_DEF
114 %24:gr64 = IMPLICIT_DEF
115 %25:gr64 = IMPLICIT_DEF
116 %26:gr64 = IMPLICIT_DEF
117 %30:gr64 = IMPLICIT_DEF
118 %31:gr64 = IMPLICIT_DEF
119 %32:gr64 = IMPLICIT_DEF
120 %33:gr64 = IMPLICIT_DEF
121 %34:gr64 = IMPLICIT_DEF
122 %35:gr64 = IMPLICIT_DEF
123 %36:gr64 = IMPLICIT_DEF
124 %37:gr64 = IMPLICIT_DEF
125 %21:gr32 = IMPLICIT_DEF
128 %0:gr64 = PHI %14, %bb.0, %12, %bb.5
129 %1:gr32 = PHI %15, %bb.0, %11, %bb.5
130 %2:gr64 = PHI %14, %bb.0, %10, %bb.5
131 %3:gr32 = PHI %15, %bb.0, %9, %bb.5
132 %4:gr64 = PHI %14, %bb.0, %8, %bb.5
133 %5:gr32 = PHI %15, %bb.0, %7, %bb.5, debug-location !13
134 %6:gr32 = PHI %15, %bb.0, %13, %bb.5, debug-location !13
135 %16:gr64 = ADD64rr %4, %4, implicit-def dead $eflags, debug-location !13
136 MOV32mr %17, 1, $noreg, 0, $noreg, %5, debug-location !13 :: (store (s32) into `i32* undef`, align 8)
137 MOV64mr %18, 1, $noreg, 0, $noreg, killed %16, debug-location !13 :: (store (s64) into `i64* undef`)
138 %20:gr8 = COPY %19.sub_8bit
139 TEST8rr %20, %20, implicit-def $eflags, debug-location !13
140 JCC_1 %bb.3, 5, implicit $eflags, debug-location !13
141 JMP_1 %bb.2, debug-location !13
146 successors: %bb.4, %bb.5
148 %7:gr32 = PHI %5, %bb.1, %21, %bb.2, debug-location !13
149 MOV32mr %22, 1, $noreg, 0, $noreg, %7, debug-location !13 :: (store (s32) into `i32* undef`, align 8)
150 %8:gr64 = MOV64rm %23, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s64) from `i64* undef`)
151 MOV32mr %24, 1, $noreg, 0, $noreg, %3, debug-location !13 :: (store (s32) into `i32* undef`, align 8)
152 MOV64mi32 %25, 1, $noreg, 0, $noreg, 0, debug-location !13 :: (store (s64) into `i64* undef`)
153 %28:gr8 = COPY %19.sub_8bit
154 TEST8rr %28, %28, implicit-def $eflags, debug-location !13
155 JCC_1 %bb.5, 5, implicit $eflags, debug-location !13
156 JMP_1 %bb.4, debug-location !13
159 %29:gr64 = ADD64rr %2, %2, implicit-def dead $eflags, debug-location !13
160 MOV64mr %30, 1, $noreg, 0, $noreg, killed %29, debug-location !13 :: (store (s64) into `i64* undef`)
163 %9:gr32 = MOV32rm %26, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s32) from `i32* undef`, align 8)
164 %10:gr64 = MOV64rm %31, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s64) from `i64* undef`)
165 %12:gr64 = ADD64rr %0, %0, implicit-def dead $eflags, debug-location !13
166 MOV32mr %32, 1, $noreg, 0, $noreg, %1, debug-location !13 :: (store (s32) into `i32* undef`, align 8)
167 MOV64mr %33, 1, $noreg, 0, $noreg, %12, debug-location !13 :: (store (s64) into `i64* undef`)
168 %11:gr32 = MOV32rm %34, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s32) from `i32* undef`, align 8)
169 ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !13
170 $rdi = COPY %35, debug-location !13
171 $rsi = COPY %36, debug-location !13
172 CALL64r %37, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit-def $rsp, implicit-def $ssp, implicit-def $al, debug-location !13
173 ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !13
174 %13:gr32 = INC32r %6, implicit-def dead $eflags, debug-instr-number 1, debug-location !13
175 DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !13
\r
176 JMP_1 %bb.1, debug-location !13