Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / test / MC / AArch64 / FP8_SVE2 / fmlal-diagnostics.s
blob627ec0f044bb999c51b836c56dbba97a7aa90013
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+ssve-fp8fma 2>&1 < %s| FileCheck %s
3 // ------------------------------------------------------------------------- //
4 // z register out of range for index
5 fmlalb z0.h, z1.b, z8.b[0]
6 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
7 // CHECK-NEXT: fmlalb z0.h, z1.b, z8.b[0]
8 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
10 fmlalt z0.h, z1.b, z8.b[0]
11 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
12 // CHECK-NEXT: fmlalt z0.h, z1.b, z8.b[0]
13 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
15 // ------------------------------------------------------------------------- //
16 // Index out of bounds
18 fmlalb z0.h, z1.b, z7.b[-1]
19 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 15].
20 // CHECK-NEXT: fmlalb z0.h, z1.b, z7.b[-1]
21 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
23 fmlalt z0.h, z1.b, z7.b[16]
24 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 15].
25 // CHECK-NEXT: fmlalt z0.h, z1.b, z7.b[16]
26 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
28 // ------------------------------------------------------------------------- //
29 // Invalid element width
31 fmlalb z0.h, z1.h, z2.h[0]
32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
33 // CHECK-NEXT: fmlalb z0.h, z1.h, z2.h[0]
34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
36 fmlalb z0.h, z1.h, z2.h
37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
38 // CHECK-NEXT: fmlalb z0.h, z1.h, z2.h
39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
41 fmlalt z0.s, z1.b, z2.b[0]
42 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
43 // CHECK-NEXT: fmlalt z0.s, z1.b, z2.b[0]
44 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
46 fmlalt z0.s, z1.b, z2.b
47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
48 // CHECK-NEXT: fmlalt z0.s, z1.b, z2.b
49 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
51 // --------------------------------------------------------------------------//
52 // Negative tests for instructions that are incompatible with movprfx
54 movprfx z0.b, p0/z, z0.b
55 fmlalb z0.h, z1.b, z7.b[0]
56 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
57 // CHECK-NEXT: fmlalb z0.h, z1.b, z7.b[0]
58 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
60 movprfx z29.b, p0/z, z7.b
61 fmlalt z29.h, z30.b, z31.b
62 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
63 // CHECK-NEXT: fmlalt z29.h, z30.b, z31.b
64 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: