llvm/test/MC/AArch64/SME2/add-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+sme-i16i64 2>&1 < %s | FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // Out of range index offset
   5
   6 add za.s[w8, 8], {z20.s-z21.s}, z10.s
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
   8 // CHECK-NEXT: add za.s[w8, 8], {z20.s-z21.s}, z10.s
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 add za.d[w8, -1, vgx4], {z0.s-z3.s}, z0.s
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
  13 // CHECK-NEXT: add za.d[w8, -1, vgx4], {z0.s-z3.s}, z0.s
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16 add     za.s[w8, 8], {z0.s - z1.s}, {z2.s - z3.s}
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
  18 // CHECK-NEXT: add     za.s[w8, 8], {z0.s - z1.s}, {z2.s - z3.s}
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  20
  21 add     za.s[w8, -1], {z0.s - z3.s}, {z4.s - z7.s}
  22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
  23 // CHECK-NEXT: add     za.s[w8, -1], {z0.s - z3.s}, {z4.s - z7.s}
  24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  25
  26 add za.d[w8, 8, vgx4], {z0.s-z3.s}
  27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
  28 // CHECK-NEXT: za.d[w8, 8, vgx4], {z0.s-z3.s}
  29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  30
  31 add za.d[w8, -1, vgx4], {z0.s-z3.s}
  32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
  33 // CHECK-NEXT: za.d[w8, -1, vgx4], {z0.s-z3.s}
  34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  35
  36
  37 // --------------------------------------------------------------------------//
  38 // Invalid vector select register
  39
  40 add za.d[w7, 0], {z0.d-z3.d}, z0.d
  41 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
  42 // CHECK-NEXT: add za.d[w7, 0], {z0.d-z3.d}, z0.d
  43 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  44
  45 add za.s[w12, 0], {z0.s-z1.s}, z0.s
  46 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
  47 // CHECK-NEXT: add za.s[w12, 0], {z0.s-z1.s}, z0.s
  48 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  49
  50 add     za.s[w7, 0], {z0.s - z1.s}, {z2.s - z3.s}
  51 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
  52 // CHECK-NEXT: add     za.s[w7, 0], {z0.s - z1.s}, {z2.s - z3.s}
  53 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:$
  54
  55 // --------------------------------------------------------------------------//
  56 // Invalid Matrix Operand
  57
  58 add za.h[w8, #0], {z0.h-z3.h}, z4.h
  59 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .d
  60 // CHECK-NEXT: add za.h[w8, #0], {z0.h-z3.h}, z4.h
  61 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  62
  63 add za.h[w8, 0, vgx2], {z0.s, z1.s}
  64 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .d
  65 // CHECK-NEXT: za.h[w8, 0, vgx2], {z0.s, z1.s}
  66 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  67
  68 // --------------------------------------------------------------------------//
  69 // Invalid vector grouping
  70
  71 add za.s[w8, 0, vgx4], {z0.s-z1.s}, z0.s
  72 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  73 // CHECK-NEXT: za.s[w8, 0, vgx4], {z0.s-z1.s}, z0.s
  74 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  75
  76 add za.d[w8, 0, vgx2], {z0.d-z3.d}, z0.d
  77 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  78 // CHECK-NEXT: za.d[w8, 0, vgx2], {z0.d-z3.d}, z0.d
  79 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  80
  81 // --------------------------------------------------------------------------//
  82 // Invalid vector list.
  83
  84 add za.d[w8, 0], {z0.d,z2.d}, {z0.d,z2.d}
  85 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  86 // CHECK-NEXT: add za.d[w8, 0], {z0.d,z2.d}, {z0.d,z2.d}
  87 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  88
  89 add za.s[w10, 3, vgx2], {z10.s-z11.s}, {z21.s-z22.s}
  90 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
  91 // CHECK-NEXT: add za.s[w10, 3, vgx2], {z10.s-z11.s}, {z21.s-z22.s}
  92 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  93
  94 add za.d[w11, 7, vgx4], {z12.d-z15.d}, {z9.d-z12.d}
  95 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
  96 // CHECK-NEXT: add za.d[w11, 7, vgx4], {z12.d-z15.d}, {z9.d-z12.d}
  97 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  98
  99 add za.s[w10, 3], {z10.b-z11.b}, {z20.b-z21.b}
 100 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 101 // CHECK-NEXT: add za.s[w10, 3], {z10.b-z11.b}, {z20.b-z21.b}
 102 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 103
 104 add     za.d[w11, 7], {z28.h - z31.h}, {z28.h - z31.h}
 105 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 106 // CHECK-NEXT: add     za.d[w11, 7], {z28.h - z31.h}, {z28.h - z31.h}
 107 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 108
 109 // --------------------------------------------------------------------------//
 110 // The tied operands must match, even for vector groups.
 111
 112 add {z0.s-z1.s}, {z2.s-z3.s}, z15.s
 113 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register list
 114 // CHECK-NEXT: add {z0.s-z1.s}, {z2.s-z3.s}, z15.s
 115 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 116
 117 add {z0.s,z1.s}, {z2.s,z3.s}, z15.s
 118 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register list
 119 // CHECK-NEXT: add {z0.s,z1.s}, {z2.s,z3.s}, z15.s
 120 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 121
 122 add {z0.s,z1.s}, {z0.s,z2.s}, z15.s
 123 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 124 // CHECK-NEXT: add {z0.s,z1.s}, {z0.s,z2.s}, z15.s
 125 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 126
 127 add {z0.s,z1.s}, {z0.s,z1.s,z2.s}, z15.s
 128 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 129 // CHECK-NEXT: add {z0.s,z1.s}, {z0.s,z1.s,z2.s}, z15.s
 130 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 131
 132 add {z0.s,z1.s}, {z0.d,z1.d}, z15.s
 133 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 134 // CHECK-NEXT: add {z0.s,z1.s}, {z0.d,z1.d}, z15.s
 135 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 136