llvm/test/MC/AArch64/SME2/sqrshr-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // Invalid vector list
   5
   6 sqrshr z0.b, {z0.s-z4.s}, #32
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
   8 // CHECK-NEXT: sqrshr z0.b, {z0.s-z4.s}, #32
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 sqrshr z0.h, {z10.s-z12.s}, #15
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  13 // CHECK-NEXT: sqrshr z0.h, {z10.s-z12.s}, #15
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16 sqrshr z0.h, {z1.d-z4.d}, #1
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
  18 // CHECK-NEXT: sqrshr z0.h, {z1.d-z4.d}, #1
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  20
  21 sqrshr z0.h, {z1.s-z2.s}, #1
  22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
  23 // CHECK-NEXT: sqrshr z0.h, {z1.s-z2.s}, #1
  24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  25
  26 // --------------------------------------------------------------------------//
  27 // Invalid immediate
  28
  29 sqrshr z31.h, {z28.d-z31.d}, #65
  30 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 64].
  31 // CHECK-NEXT: sqrshr z31.h, {z28.d-z31.d}, #65
  32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  33
  34 sqrshr z31.h, {z28.s-z29.s}, #0
  35 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16].
  36 // CHECK-NEXT: sqrshr z31.h, {z28.s-z29.s}, #0
  37 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  38
  39 sqrshr z31.b, {z28.s-z31.s}, #33
  40 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 32].
  41 // CHECK-NEXT: sqrshr z31.b, {z28.s-z31.s}, #33
  42 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  43
  44 // --------------------------------------------------------------------------//
  45 // Invalid Register Suffix
  46
  47 sqrshr z23.s, {z12.s-z15.s}, #15
  48 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  49 // CHECK-NEXT: sqrshr z23.s, {z12.s-z15.s}, #15
  50 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  51
  52 sqrshr z23.b, {z12.d-z15.d}, #15
  53 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  54 // CHECK-NEXT: sqrshr z23.b, {z12.d-z15.d}, #15
  55 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: