llvm/test/MC/AArch64/SME2/uqrshr.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   4 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
   6 // RUN:        | llvm-objdump --no-print-imm-hex -d --mattr=+sme2 - \
   7 // RUN:        | FileCheck %s --check-prefix=CHECK-INST
   8 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
   9 // RUN:        | llvm-objdump --no-print-imm-hex -d --mattr=-sme2 - \
  10 // RUN:        | FileCheck %s --check-prefix=CHECK-UNKNOWN
  11 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
  12 // RUN:        | sed '/.text/d' | sed 's/.*encoding: //g' \
  13 // RUN:        | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
  14 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
  15
  16
  17 uqrshr  z0.h, {z0.s - z1.s}, #16  // 11000001-11100000-11010100-00100000
  18 // CHECK-INST: uqrshr  z0.h, { z0.s, z1.s }, #16
  19 // CHECK-ENCODING: [0x20,0xd4,0xe0,0xc1]
  20 // CHECK-ERROR: instruction requires: sme2
  21 // CHECK-UNKNOWN: c1e0d420 <unknown>
  22
  23 uqrshr  z21.h, {z10.s - z11.s}, #11  // 11000001-11100101-11010101-01110101
  24 // CHECK-INST: uqrshr  z21.h, { z10.s, z11.s }, #11
  25 // CHECK-ENCODING: [0x75,0xd5,0xe5,0xc1]
  26 // CHECK-ERROR: instruction requires: sme2
  27 // CHECK-UNKNOWN: c1e5d575 <unknown>
  28
  29 uqrshr  z23.h, {z12.s - z13.s}, #8  // 11000001-11101000-11010101-10110111
  30 // CHECK-INST: uqrshr  z23.h, { z12.s, z13.s }, #8
  31 // CHECK-ENCODING: [0xb7,0xd5,0xe8,0xc1]
  32 // CHECK-ERROR: instruction requires: sme2
  33 // CHECK-UNKNOWN: c1e8d5b7 <unknown>
  34
  35 uqrshr  z31.h, {z30.s - z31.s}, #1  // 11000001-11101111-11010111-11111111
  36 // CHECK-INST: uqrshr  z31.h, { z30.s, z31.s }, #1
  37 // CHECK-ENCODING: [0xff,0xd7,0xef,0xc1]
  38 // CHECK-ERROR: instruction requires: sme2
  39 // CHECK-UNKNOWN: c1efd7ff <unknown>
  40
  41
  42 uqrshr  z0.b, {z0.s - z3.s}, #32  // 11000001-01100000-11011000-00100000
  43 // CHECK-INST: uqrshr  z0.b, { z0.s - z3.s }, #32
  44 // CHECK-ENCODING: [0x20,0xd8,0x60,0xc1]
  45 // CHECK-ERROR: instruction requires: sme2
  46 // CHECK-UNKNOWN: c160d820 <unknown>
  47
  48 uqrshr  z21.b, {z8.s - z11.s}, #11  // 11000001-01110101-11011001-00110101
  49 // CHECK-INST: uqrshr  z21.b, { z8.s - z11.s }, #11
  50 // CHECK-ENCODING: [0x35,0xd9,0x75,0xc1]
  51 // CHECK-ERROR: instruction requires: sme2
  52 // CHECK-UNKNOWN: c175d935 <unknown>
  53
  54 uqrshr  z23.b, {z12.s - z15.s}, #24  // 11000001-01101000-11011001-10110111
  55 // CHECK-INST: uqrshr  z23.b, { z12.s - z15.s }, #24
  56 // CHECK-ENCODING: [0xb7,0xd9,0x68,0xc1]
  57 // CHECK-ERROR: instruction requires: sme2
  58 // CHECK-UNKNOWN: c168d9b7 <unknown>
  59
  60 uqrshr  z31.b, {z28.s - z31.s}, #1  // 11000001-01111111-11011011-10111111
  61 // CHECK-INST: uqrshr  z31.b, { z28.s - z31.s }, #1
  62 // CHECK-ENCODING: [0xbf,0xdb,0x7f,0xc1]
  63 // CHECK-ERROR: instruction requires: sme2
  64 // CHECK-UNKNOWN: c17fdbbf <unknown>
  65
  66
  67 uqrshr  z0.h, {z0.d - z3.d}, #64  // 11000001-10100000-11011000-00100000
  68 // CHECK-INST: uqrshr  z0.h, { z0.d - z3.d }, #64
  69 // CHECK-ENCODING: [0x20,0xd8,0xa0,0xc1]
  70 // CHECK-ERROR: instruction requires: sme2
  71 // CHECK-UNKNOWN: c1a0d820 <unknown>
  72
  73 uqrshr  z21.h, {z8.d - z11.d}, #11  // 11000001-11110101-11011001-00110101
  74 // CHECK-INST: uqrshr  z21.h, { z8.d - z11.d }, #11
  75 // CHECK-ENCODING: [0x35,0xd9,0xf5,0xc1]
  76 // CHECK-ERROR: instruction requires: sme2
  77 // CHECK-UNKNOWN: c1f5d935 <unknown>
  78
  79 uqrshr  z23.h, {z12.d - z15.d}, #24  // 11000001-11101000-11011001-10110111
  80 // CHECK-INST: uqrshr  z23.h, { z12.d - z15.d }, #24
  81 // CHECK-ENCODING: [0xb7,0xd9,0xe8,0xc1]
  82 // CHECK-ERROR: instruction requires: sme2
  83 // CHECK-UNKNOWN: c1e8d9b7 <unknown>
  84
  85 uqrshr  z31.h, {z28.d - z31.d}, #1  // 11000001-11111111-11011011-10111111
  86 // CHECK-INST: uqrshr  z31.h, { z28.d - z31.d }, #1
  87 // CHECK-ENCODING: [0xbf,0xdb,0xff,0xc1]
  88 // CHECK-ERROR: instruction requires: sme2
  89 // CHECK-UNKNOWN: c1ffdbbf <unknown>
  90