Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / ld1b.s
blob86c3c20a0405d2da33b6d43262bc1d10601c66f7
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
10 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
12 ld1b z0.b, p0/z, [x0]
13 // CHECK-INST: ld1b { z0.b }, p0/z, [x0]
14 // CHECK-ENCODING: [0x00,0xa0,0x00,0xa4]
15 // CHECK-ERROR: instruction requires: sve or sme
16 // CHECK-UNKNOWN: a400a000 <unknown>
18 ld1b z0.h, p0/z, [x0]
19 // CHECK-INST: ld1b { z0.h }, p0/z, [x0]
20 // CHECK-ENCODING: [0x00,0xa0,0x20,0xa4]
21 // CHECK-ERROR: instruction requires: sve or sme
22 // CHECK-UNKNOWN: a420a000 <unknown>
24 ld1b z0.s, p0/z, [x0]
25 // CHECK-INST: ld1b { z0.s }, p0/z, [x0]
26 // CHECK-ENCODING: [0x00,0xa0,0x40,0xa4]
27 // CHECK-ERROR: instruction requires: sve or sme
28 // CHECK-UNKNOWN: a440a000 <unknown>
30 ld1b z0.d, p0/z, [x0]
31 // CHECK-INST: ld1b { z0.d }, p0/z, [x0]
32 // CHECK-ENCODING: [0x00,0xa0,0x60,0xa4]
33 // CHECK-ERROR: instruction requires: sve or sme
34 // CHECK-UNKNOWN: a460a000 <unknown>
36 ld1b { z0.b }, p0/z, [x0]
37 // CHECK-INST: ld1b { z0.b }, p0/z, [x0]
38 // CHECK-ENCODING: [0x00,0xa0,0x00,0xa4]
39 // CHECK-ERROR: instruction requires: sve or sme
40 // CHECK-UNKNOWN: a400a000 <unknown>
42 ld1b { z0.h }, p0/z, [x0]
43 // CHECK-INST: ld1b { z0.h }, p0/z, [x0]
44 // CHECK-ENCODING: [0x00,0xa0,0x20,0xa4]
45 // CHECK-ERROR: instruction requires: sve or sme
46 // CHECK-UNKNOWN: a420a000 <unknown>
48 ld1b { z0.s }, p0/z, [x0]
49 // CHECK-INST: ld1b { z0.s }, p0/z, [x0]
50 // CHECK-ENCODING: [0x00,0xa0,0x40,0xa4]
51 // CHECK-ERROR: instruction requires: sve or sme
52 // CHECK-UNKNOWN: a440a000 <unknown>
54 ld1b { z0.d }, p0/z, [x0]
55 // CHECK-INST: ld1b { z0.d }, p0/z, [x0]
56 // CHECK-ENCODING: [0x00,0xa0,0x60,0xa4]
57 // CHECK-ERROR: instruction requires: sve or sme
58 // CHECK-UNKNOWN: a460a000 <unknown>
60 ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
61 // CHECK-INST: ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
62 // CHECK-ENCODING: [0xff,0xbf,0x0f,0xa4]
63 // CHECK-ERROR: instruction requires: sve or sme
64 // CHECK-UNKNOWN: a40fbfff <unknown>
66 ld1b { z21.b }, p5/z, [x10, #5, mul vl]
67 // CHECK-INST: ld1b { z21.b }, p5/z, [x10, #5, mul vl]
68 // CHECK-ENCODING: [0x55,0xb5,0x05,0xa4]
69 // CHECK-ERROR: instruction requires: sve or sme
70 // CHECK-UNKNOWN: a405b555 <unknown>
72 ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
73 // CHECK-INST: ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
74 // CHECK-ENCODING: [0xff,0xbf,0x2f,0xa4]
75 // CHECK-ERROR: instruction requires: sve or sme
76 // CHECK-UNKNOWN: a42fbfff <unknown>
78 ld1b { z21.h }, p5/z, [x10, #5, mul vl]
79 // CHECK-INST: ld1b { z21.h }, p5/z, [x10, #5, mul vl]
80 // CHECK-ENCODING: [0x55,0xb5,0x25,0xa4]
81 // CHECK-ERROR: instruction requires: sve or sme
82 // CHECK-UNKNOWN: a425b555 <unknown>
84 ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
85 // CHECK-INST: ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
86 // CHECK-ENCODING: [0xff,0xbf,0x4f,0xa4]
87 // CHECK-ERROR: instruction requires: sve or sme
88 // CHECK-UNKNOWN: a44fbfff <unknown>
90 ld1b { z21.s }, p5/z, [x10, #5, mul vl]
91 // CHECK-INST: ld1b { z21.s }, p5/z, [x10, #5, mul vl]
92 // CHECK-ENCODING: [0x55,0xb5,0x45,0xa4]
93 // CHECK-ERROR: instruction requires: sve or sme
94 // CHECK-UNKNOWN: a445b555 <unknown>
96 ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
97 // CHECK-INST: ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
98 // CHECK-ENCODING: [0xff,0xbf,0x6f,0xa4]
99 // CHECK-ERROR: instruction requires: sve or sme
100 // CHECK-UNKNOWN: a46fbfff <unknown>
102 ld1b { z21.d }, p5/z, [x10, #5, mul vl]
103 // CHECK-INST: ld1b { z21.d }, p5/z, [x10, #5, mul vl]
104 // CHECK-ENCODING: [0x55,0xb5,0x65,0xa4]
105 // CHECK-ERROR: instruction requires: sve or sme
106 // CHECK-UNKNOWN: a465b555 <unknown>
108 ld1b { z0.b }, p0/z, [sp, x0]
109 // CHECK-INST: ld1b { z0.b }, p0/z, [sp, x0]
110 // CHECK-ENCODING: [0xe0,0x43,0x00,0xa4]
111 // CHECK-ERROR: instruction requires: sve or sme
112 // CHECK-UNKNOWN: a40043e0 <unknown>
114 ld1b { z0.b }, p0/z, [x0, x0]
115 // CHECK-INST: ld1b { z0.b }, p0/z, [x0, x0]
116 // CHECK-ENCODING: [0x00,0x40,0x00,0xa4]
117 // CHECK-ERROR: instruction requires: sve or sme
118 // CHECK-UNKNOWN: a4004000 <unknown>
120 ld1b { z0.b }, p0/z, [x0, x0, lsl #0]
121 // CHECK-INST: ld1b { z0.b }, p0/z, [x0, x0]
122 // CHECK-ENCODING: [0x00,0x40,0x00,0xa4]
123 // CHECK-ERROR: instruction requires: sve or sme
124 // CHECK-UNKNOWN: a4004000 <unknown>
126 ld1b { z5.h }, p3/z, [x17, x16]
127 // CHECK-INST: ld1b { z5.h }, p3/z, [x17, x16]
128 // CHECK-ENCODING: [0x25,0x4e,0x30,0xa4]
129 // CHECK-ERROR: instruction requires: sve or sme
130 // CHECK-UNKNOWN: a4304e25 <unknown>
132 ld1b { z21.s }, p5/z, [x10, x21]
133 // CHECK-INST: ld1b { z21.s }, p5/z, [x10, x21]
134 // CHECK-ENCODING: [0x55,0x55,0x55,0xa4]
135 // CHECK-ERROR: instruction requires: sve or sme
136 // CHECK-UNKNOWN: a4555555 <unknown>
138 ld1b { z23.d }, p3/z, [x13, x8]
139 // CHECK-INST: ld1b { z23.d }, p3/z, [x13, x8]
140 // CHECK-ENCODING: [0xb7,0x4d,0x68,0xa4]
141 // CHECK-ERROR: instruction requires: sve or sme
142 // CHECK-UNKNOWN: a4684db7 <unknown>