llvm/test/MC/AArch64/SVE2p1/pmov-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 2>&1 < %s | FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // Invalid vector lane indices
   5
   6 pmov p0.b, z0[1]
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected lane specifier '[0]'
   8 // CHECK-NEXT: pmov p0.b, z0[1]
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 pmov p0.h, z0[2]
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
  13 // CHECK-NEXT: pmov p0.h, z0[2]
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16 pmov p0.h, z0[-1]
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
  18 // CHECK-NEXT: pmov p0.h, z0[-1]
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  20
  21 pmov p0.s, z0[4]
  22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
  23 // CHECK-NEXT: pmov p0.s, z0[4]
  24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  25
  26 pmov p0.s, z0[-1]
  27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
  28 // CHECK-NEXT: pmov p0.s, z0[-1]
  29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  30
  31 pmov p0.d, z0[8]
  32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
  33 // CHECK-NEXT: pmov p0.d, z0[8]
  34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  35
  36 pmov p0.d, z0[-1]
  37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
  38 // CHECK-NEXT: pmov p0.d, z0[-1]
  39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  40
  41
  42
  43 pmov z0[2], p0.h
  44 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
  45 // CHECK-NEXT: pmov z0[2], p0.h
  46 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  47
  48 pmov z0[-1], p0.h
  49 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
  50 // CHECK-NEXT: pmov z0[-1], p0.h
  51 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  52
  53 pmov z0[4], p0.s
  54 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
  55 // CHECK-NEXT: pmov z0[4], p0.s
  56 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  57
  58 pmov z0[-1], p0.s
  59 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
  60 // CHECK-NEXT: pmov z0[-1], p0.s
  61 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  62
  63 pmov z0[8], p0.d
  64 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
  65 // CHECK-NEXT: pmov z0[8], p0.d
  66 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  67
  68 pmov z0[-1], p0.d
  69 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
  70 // CHECK-NEXT: pmov z0[-1], p0.d
  71 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  72