Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / test / MC / AMDGPU / gfx940_err.s
blob515b89513a8048fe5a826a8eaf3ed9410dab39f5
1 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck --check-prefix=GFX940 --implicit-check-not=error: %s
3 v_mac_f32 v0, v1, v2
4 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
6 v_mac_f32_e64 v5, v1, v2
7 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
9 v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
10 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
12 v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
13 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
15 v_mac_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
16 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
18 v_mad_f32 v0, v1, v2, v3
19 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
21 v_madak_f32 v0, v1, v2, 0
22 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
24 v_madmk_f32 v0, v1, 0, v2
25 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
27 v_mad_legacy_f32 v0, v1, v2, v3
28 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
30 v_mov_b64 v[2:3], v[4:5] row_shl:1
31 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: DP ALU dpp only supports row_newbcast
33 v_mov_b64 v[2:3], -v[4:5]
34 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
36 v_mov_b64 v[2:3], |v[4:5]|
37 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
39 v_mov_b64 v[2:3], v[4:5] dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD
40 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
42 v_mov_b64_sdwa v[2:3], v[4:5]
43 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: sdwa variant of this instruction is not supported
45 buffer_invl2
46 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
48 global_load_dword v2, v[2:3], off glc
49 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
51 global_load_dword v2, v[2:3], off slc
52 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
54 global_load_dword v2, v[2:3], off scc
55 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
57 s_load_dword s2, s[2:3], 0x0 sc0
58 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
60 buffer_atomic_swap v5, off, s[8:11], s3 glc
61 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
63 buffer_atomic_swap v5, off, s[8:11], s3 slc
64 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
66 buffer_wbl2 glc
67 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
69 buffer_wbl2 scc
70 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
72 v_dot2_u32_u16 v0, 1, v0, s2 op_sel:[0,1,0,1] op_sel_hi:[0,0,1,1]
73 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid op_sel operand
75 v_cvt_f32_fp8 v1, sext(v3) src0_sel:BYTE_1
76 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
78 v_cvt_pk_f32_bf8 v[2:3], sext(v3) src0_sel:BYTE_1
79 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
81 v_cvt_sr_bf8_f32 v1, v2, -v3
82 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
84 v_cvt_sr_fp8_f32 v1, v2, -v3
85 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
87 v_cvt_sr_fp8_f32 v1, v2, v3 clamp
88 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
90 v_cvt_sr_fp8_f32 v1, v2, v3 mul:2
91 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
93 v_cvt_pk_fp8_f32 v1, v2, v3 clamp
94 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
96 v_cvt_pk_fp8_f32 v1, v2, v3 mul:2
97 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
99 s_getreg_b32 s1, hwreg(HW_REG_FLAT_SCR_LO)
100 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: specified hardware register is not supported on this GPU
102 s_getreg_b32 s1, hwreg(HW_REG_FLAT_SCR_HI)
103 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: specified hardware register is not supported on this GPU
105 s_getreg_b32 s1, hwreg(HW_REG_XNACK_MASK)
106 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: specified hardware register is not supported on this GPU
108 s_getreg_b32 s1, hwreg(HW_REG_HW_ID1)
109 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: specified hardware register is not supported on this GPU
111 s_getreg_b32 s1, hwreg(HW_REG_HW_ID2)
112 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: specified hardware register is not supported on this GPU
114 s_getreg_b32 s1, hwreg(HW_REG_POPS_PACKER)
115 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: specified hardware register is not supported on this GPU
117 ds_ordered_count v5, v1 offset:65535 gds
118 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
120 exp pos0 v3, v2, v1, v0
121 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
123 global_load_dword v[2:3], off lds
124 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
126 scratch_load_dword v2, off lds
127 // GFX940: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction