llvm/test/MC/AMDGPU/hsa-gfx940-v3.s

   1 // RUN: llvm-mc --amdhsa-code-object-version=3 -triple amdgcn-amd-amdhsa -mcpu=gfx940 < %s | FileCheck --check-prefix=ASM %s
   2 // RUN: llvm-mc --amdhsa-code-object-version=3 -triple amdgcn-amd-amdhsa -mcpu=gfx940 -filetype=obj < %s > %t
   3 // RUN: llvm-readelf -S -r -s %t | FileCheck --check-prefix=READOBJ %s
   4 // RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
   5
   6 // READOBJ: Section Headers
   7 // READOBJ: .text   PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9]+}} AX {{[0-9]+}} {{[0-9]+}} 256
   8 // READOBJ: .rodata PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}}        000080 {{[0-9]+}}  A {{[0-9]+}} {{[0-9]+}} 64
   9
  10 // READOBJ: Relocation section '.rela.rodata' at offset
  11 // READOBJ: 0000000000000010 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 10
  12 // READOBJ: 0000000000000050 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 110
  13
  14 // READOBJ: Symbol table '.symtab' contains {{[0-9]+}} entries:
  15 // READOBJ-DAG: {{[0-9]+}}: 0000000000000100  0 FUNC    LOCAL  PROTECTED 2 complete
  16 // READOBJ-DAG: {{[0-9]+}}: 0000000000000040 64 OBJECT  LOCAL  DEFAULT   3 complete.kd
  17 // READOBJ-DAG: {{[0-9]+}}: 0000000000000000  0 FUNC    LOCAL  PROTECTED 2 minimal
  18 // READOBJ-DAG: {{[0-9]+}}: 0000000000000000 64 OBJECT  LOCAL  DEFAULT   3 minimal.kd
  19
  20 // OBJDUMP: Contents of section .rodata
  21 // Note, relocation for KERNEL_CODE_ENTRY_BYTE_OFFSET is not resolved here.
  22 // minimal
  23 // OBJDUMP-NEXT: 0000 00000000 00000000 00000000 00000000
  24 // OBJDUMP-NEXT: 0010 00000000 00000000 00000000 00000000
  25 // OBJDUMP-NEXT: 0020 00000000 00000000 00000000 00000000
  26 // OBJDUMP-NEXT: 0030 0000ac00 80000000 00000000 00000000
  27 // complete
  28 // OBJDUMP-NEXT: 0040 01000000 01000000 08000000 00000000
  29 // OBJDUMP-NEXT: 0050 00000000 00000000 00000000 00000000
  30 // OBJDUMP-NEXT: 0060 00000000 00000000 00000000 00000100
  31 // OBJDUMP-NEXT: 0070 01510104 150f007f 5e008100 00000000
  32
  33 .text
  34 // ASM: .text
  35
  36 .amdgcn_target "amdgcn-amd-amdhsa--gfx940+xnack+sram-ecc"
  37 // ASM: .amdgcn_target "amdgcn-amd-amdhsa--gfx940+xnack+sram-ecc"
  38
  39 .p2align 8
  40 .type minimal,@function
  41 minimal:
  42   s_endpgm
  43
  44 .p2align 8
  45 .type complete,@function
  46 complete:
  47   s_endpgm
  48
  49 .rodata
  50 // ASM: .rodata
  51
  52 // Test that only specifying required directives is allowed, and that defaulted
  53 // values are omitted.
  54 .p2align 6
  55 .amdhsa_kernel minimal
  56   .amdhsa_next_free_vgpr 0
  57   .amdhsa_next_free_sgpr 0
  58   .amdhsa_accum_offset 4
  59 .end_amdhsa_kernel
  60
  61 // ASM: .amdhsa_kernel minimal
  62 // ASM: .amdhsa_next_free_vgpr 0
  63 // ASM-NEXT: .amdhsa_next_free_sgpr 0
  64 // ASM-NEXT: .amdhsa_accum_offset 4
  65 // ASM: .amdhsa_tg_split 0
  66 // ASM: .end_amdhsa_kernel
  67
  68 // Test that we can specify all available directives with non-default values.
  69 .p2align 6
  70 .amdhsa_kernel complete
  71   .amdhsa_group_segment_fixed_size 1
  72   .amdhsa_private_segment_fixed_size 1
  73   .amdhsa_user_sgpr_dispatch_ptr 1
  74   .amdhsa_user_sgpr_queue_ptr 1
  75   .amdhsa_user_sgpr_kernarg_segment_ptr 1
  76   .amdhsa_user_sgpr_dispatch_id 1
  77   .amdhsa_kernarg_size 8
  78   .amdhsa_user_sgpr_kernarg_preload_length  1
  79   .amdhsa_user_sgpr_kernarg_preload_offset  1
  80   .amdhsa_user_sgpr_private_segment_size 1
  81   .amdhsa_enable_private_segment 1
  82   .amdhsa_system_sgpr_workgroup_id_x 0
  83   .amdhsa_system_sgpr_workgroup_id_y 1
  84   .amdhsa_system_sgpr_workgroup_id_z 1
  85   .amdhsa_system_sgpr_workgroup_info 1
  86   .amdhsa_system_vgpr_workitem_id 1
  87   .amdhsa_next_free_vgpr 9
  88   .amdhsa_next_free_sgpr 27
  89   .amdhsa_accum_offset 4
  90   .amdhsa_reserve_vcc 0
  91   .amdhsa_float_round_mode_32 1
  92   .amdhsa_float_round_mode_16_64 1
  93   .amdhsa_float_denorm_mode_32 1
  94   .amdhsa_float_denorm_mode_16_64 0
  95   .amdhsa_dx10_clamp 0
  96   .amdhsa_ieee_mode 0
  97   .amdhsa_fp16_overflow 1
  98   .amdhsa_tg_split 1
  99   .amdhsa_exception_fp_ieee_invalid_op 1
 100   .amdhsa_exception_fp_denorm_src 1
 101   .amdhsa_exception_fp_ieee_div_zero 1
 102   .amdhsa_exception_fp_ieee_overflow 1
 103   .amdhsa_exception_fp_ieee_underflow 1
 104   .amdhsa_exception_fp_ieee_inexact 1
 105   .amdhsa_exception_int_div_zero 1
 106 .end_amdhsa_kernel
 107
 108 // ASM: .amdhsa_kernel complete
 109 // ASM-NEXT: .amdhsa_group_segment_fixed_size 1
 110 // ASM-NEXT: .amdhsa_private_segment_fixed_size 1
 111 // ASM-NEXT: .amdhsa_kernarg_size 8
 112 // ASM-NEXT: .amdhsa_user_sgpr_count 10
 113 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_ptr 1
 114 // ASM-NEXT: .amdhsa_user_sgpr_queue_ptr 1
 115 // ASM-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 1
 116 // ASM-NEXT: .amdhsa_user_sgpr_dispatch_id 1
 117 // ASM-NEXT: .amdhsa_user_sgpr_kernarg_preload_length  1
 118 // ASM-NEXT: .amdhsa_user_sgpr_kernarg_preload_offset  1
 119 // ASM-NEXT: .amdhsa_user_sgpr_private_segment_size 1
 120 // ASM-NEXT: .amdhsa_enable_private_segment 1
 121 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_x 0
 122 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_y 1
 123 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_z 1
 124 // ASM-NEXT: .amdhsa_system_sgpr_workgroup_info 1
 125 // ASM-NEXT: .amdhsa_system_vgpr_workitem_id 1
 126 // ASM-NEXT: .amdhsa_next_free_vgpr 9
 127 // ASM-NEXT: .amdhsa_next_free_sgpr 27
 128 // ASM-NEXT: .amdhsa_accum_offset 4
 129 // ASM-NEXT: .amdhsa_reserve_vcc 0
 130 // ASM-NEXT: .amdhsa_reserve_xnack_mask 1
 131 // ASM-NEXT: .amdhsa_float_round_mode_32 1
 132 // ASM-NEXT: .amdhsa_float_round_mode_16_64 1
 133 // ASM-NEXT: .amdhsa_float_denorm_mode_32 1
 134 // ASM-NEXT: .amdhsa_float_denorm_mode_16_64 0
 135 // ASM-NEXT: .amdhsa_dx10_clamp 0
 136 // ASM-NEXT: .amdhsa_ieee_mode 0
 137 // ASM-NEXT: .amdhsa_fp16_overflow 1
 138 // ASM-NEXT: .amdhsa_tg_split 1
 139 // ASM-NEXT: .amdhsa_exception_fp_ieee_invalid_op 1
 140 // ASM-NEXT: .amdhsa_exception_fp_denorm_src 1
 141 // ASM-NEXT: .amdhsa_exception_fp_ieee_div_zero 1
 142 // ASM-NEXT: .amdhsa_exception_fp_ieee_overflow 1
 143 // ASM-NEXT: .amdhsa_exception_fp_ieee_underflow 1
 144 // ASM-NEXT: .amdhsa_exception_fp_ieee_inexact 1
 145 // ASM-NEXT: .amdhsa_exception_int_div_zero 1
 146 // ASM-NEXT: .end_amdhsa_kernel
 147
 148 .section .foo
 149
 150 .byte .amdgcn.gfx_generation_number
 151 // ASM: .byte 9
 152
 153 .byte .amdgcn.next_free_vgpr
 154 // ASM: .byte 0
 155 .byte .amdgcn.next_free_sgpr
 156 // ASM: .byte 0
 157
 158 v_mov_b32_e32 v7, s10
 159
 160 .byte .amdgcn.next_free_vgpr
 161 // ASM: .byte 8
 162 .byte .amdgcn.next_free_sgpr
 163 // ASM: .byte 11
 164
 165 .set .amdgcn.next_free_vgpr, 0
 166 .set .amdgcn.next_free_sgpr, 0
 167
 168 .byte .amdgcn.next_free_vgpr
 169 // ASM: .byte 0
 170 .byte .amdgcn.next_free_sgpr
 171 // ASM: .byte 0
 172
 173 v_mov_b32_e32 v16, s3
 174
 175 .byte .amdgcn.next_free_vgpr
 176 // ASM: .byte 17
 177 .byte .amdgcn.next_free_sgpr
 178 // ASM: .byte 4