llvm/test/MC/ARM/coff-relocations.s

   1 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
   2 @ RUN:   | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-RELOCATION
   3
   4 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
   5 @ RUN:   | llvm-objdump --no-print-imm-hex -d - | FileCheck %s --check-prefix=CHECK-ENCODING
   6
   7 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
   8 @ RUN:   | llvm-objdump -s - | FileCheck %s --check-prefix=CHECK-DATA
   9
  10         .syntax unified
  11         .text
  12         .thumb
  13
  14         .global target
  15
  16         .thumb_func
  17 branch24t_0:
  18         b target
  19
  20 @ CHECK-ENCODING-LABEL: <branch24t_0>:
  21 @ CHECK-ENCODING-NEXT: b.w {{.+}} @ imm = #0
  22
  23         .thumb_func
  24 branch24t_1:
  25         bl target
  26
  27 @ CHECK-ENCODING-LABEL: <branch24t_1>:
  28 @ CHECK-ENCODING-NEXR: bl {{.+}} @ imm = #0
  29
  30         .thumb_func
  31 branch20t:
  32         bcc target
  33
  34 @ CHECK-ENCODING-LABEL: <branch20t>:
  35 @ CHECK-ENCODING-NEXT: blo.w {{.+}} @ imm = #0
  36
  37         .thumb_func
  38 blx23t:
  39         blx target
  40
  41 @ CHECK-ENCODING-LABEL: <blx23t>:
  42 @ CHECK-ENCODING-NEXT: blx {{.+}} @ imm = #0
  43
  44         .thumb_func
  45 mov32t:
  46         movw r0, :lower16:target
  47         movt r0, :upper16:target
  48         blx r0
  49
  50 @ CHECK-ENCODING-LABEL: <mov32t>:
  51 @ CHECK-ENCODING-NEXT: movw r0, #0
  52 @ CHECK-ENCODING-NEXT: movt r0, #0
  53 @ CHECK-ENCODING-NEXT: blx r0
  54
  55         .thumb_func
  56 addr32:
  57         ldr r0, .Laddr32
  58         bx r0
  59         trap
  60 .Laddr32:
  61         .long target
  62
  63 @ CHECK-ENCODING-LABEL: <addr32>:
  64 @ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
  65 @ CHECK-ENCODING-NEXT: bx r0
  66 @ CHECK-ENCODING-NEXT: trap
  67 @ CHECK-ENCODING-NEXT: movs r0, r0
  68 @ CHECK-ENCODING-NEXT: movs r0, r0
  69
  70         .thumb_func
  71 addr32nb:
  72         ldr r0, .Laddr32nb
  73         bx r0
  74         trap
  75 .Laddr32nb:
  76         .long target(imgrel)
  77
  78 @ CHECK-ENCODING-LABEL: <addr32nb>:
  79 @ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
  80 @ CHECK-ENCODING-NEXT: bx r0
  81 @ CHECK-ENCODING-NEXT: trap
  82 @ CHECK-ENCODING-NEXT: movs r0, r0
  83 @ CHECK-ENCODING-NEXT: movs r0, r0
  84
  85        .thumb_func
  86 secrel:
  87         ldr r0, .Lsecrel
  88         bx r0
  89         trap
  90 .Lsecrel:
  91         .long target(secrel32)
  92
  93         .section .rdata, "dr"
  94 .Ltable:
  95         .word addr32nb - .Ltable
  96         .word secrel - .Ltable
  97
  98 @ CHECK-ENCODING-LABEL: <secrel>:
  99 @ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
 100 @ CHECK-ENCODING-NEXT: bx r0
 101 @ CHECK-ENCODING-NEXT: trap
 102 @ CHECK-ENCODING-NEXT: movs r0, r0
 103 @ CHECK-ENCODING-NEXT: movs r0, r0
 104
 105 @ CHECK-RELOCATION: Relocations [
 106 @ CHECK-RELOCATION:   Section (1) .text {
 107 @ CHECK-RELOCATION:     0x0 IMAGE_REL_ARM_BRANCH24T
 108 @ CHECK-RELOCATION:     0x4 IMAGE_REL_ARM_BRANCH24T
 109 @ CHECK-RELOCATION:     0x8 IMAGE_REL_ARM_BRANCH20T
 110 @ CHECK-RELOCATION:     0xC IMAGE_REL_ARM_BLX23T
 111 @ CHECK-RELOCATION:     0x10 IMAGE_REL_ARM_MOV32T
 112 @ CHECK-RELOCATION:     0x20 IMAGE_REL_ARM_ADDR32
 113 @ CHECK-RELOCATION:     0x2C IMAGE_REL_ARM_ADDR32NB
 114 @ CHECK-RELOCATION:     0x38 IMAGE_REL_ARM_SECREL
 115 @ CHECK-RELOCATION:   }
 116 @ CHECK-RELOCATION:   Section (4) .rdata {
 117 @ CHECK-RELOCATION:     0x0 IMAGE_REL_ARM_REL32
 118 @ CHECK-RELOCATION:     0x4 IMAGE_REL_ARM_REL32
 119 @ CHECK-RELOCATION:   }
 120 @ CHECK-RELOCATION: ]
 121
 122 @ CHECK-DATA: Contents of section .rdata:
 123 @ CHECK-DATA-NEXT: 0000 04000000 08000000