llvm/test/MC/AsmParser/directive_seh.s

   1 # RUN: llvm-mc -triple x86_64-pc-win32 %s | FileCheck %s
   2
   3 #   Round trip via intel syntax printing and back.
   4 # RUN: llvm-mc -triple x86_64-pc-win32 %s -output-asm-variant=1 | \
   5 # RUN:     llvm-mc -triple x86_64-pc-win32 -x86-asm-syntax=intel | FileCheck %s
   6
   7     .text
   8     .globl func
   9     .def func; .scl 2; .type 32; .endef
  10     .seh_proc func
  11 # CHECK: .seh_proc func
  12 func:
  13     .seh_pushframe @code
  14 # CHECK: .seh_pushframe @code
  15     subq $24, %rsp
  16     .seh_stackalloc 24
  17 # CHECK: .seh_stackalloc 24
  18     movq %rsi, 16(%rsp)
  19     .seh_savereg %rsi, 16
  20 # CHECK: .seh_savereg %rsi, 16
  21     .seh_savereg 6, 16
  22 # CHECK: .seh_savereg %rsi, 16
  23     movups %xmm8, (%rsp)
  24     .seh_savexmm %xmm8, 0
  25 # CHECK: .seh_savexmm %xmm8, 0
  26     .seh_savexmm 8, 0
  27 # CHECK: .seh_savexmm %xmm8, 0
  28     pushq %rbx
  29     .seh_pushreg %rbx
  30 # CHECK: .seh_pushreg %rbx
  31     .seh_pushreg 3
  32 # CHECK: .seh_pushreg %rbx
  33     mov %rsp, %rbx
  34     .seh_setframe 3, 0
  35 # CHECK: .seh_setframe %rbx, 0
  36     .seh_endprologue
  37 # CHECK: .seh_endprologue
  38     .seh_handler __C_specific_handler, @except
  39 # CHECK: .seh_handler __C_specific_handler, @except
  40     .seh_handlerdata
  41 # CHECK-NOT: .section{{.*}}.xdata
  42 # CHECK: .seh_handlerdata
  43     .long 0
  44     .text
  45     .seh_startchained
  46     .seh_endprologue
  47     .seh_endchained
  48 # CHECK: .text
  49 # CHECK: .seh_startchained
  50 # CHECK: .seh_endprologue
  51 # CHECK: .seh_endchained
  52     lea (%rbx), %rsp
  53     pop %rbx
  54     addq $24, %rsp
  55     ret
  56     .seh_endproc
  57 # CHECK: .seh_endproc
  58
  59 # Re-run more or less the same test, but with intel syntax. Previously LLVM
  60 # required percent prefixing in the .seh_* directives that take registers.
  61
  62     .intel_syntax noprefix
  63     .text
  64     .globl func_intel
  65     .def func_intel; .scl 2; .type 32; .endef
  66     .seh_proc func_intel
  67 # CHECK: .seh_proc func_intel
  68 func_intel:
  69     sub RSP, 24
  70     .seh_stackalloc 24
  71 # CHECK: .seh_stackalloc 24
  72     mov [16+RSP], RSI
  73     .seh_savereg rsi, 16
  74 # CHECK: .seh_savereg %rsi, 16
  75     .seh_savereg 6, 16
  76 # CHECK: .seh_savereg %rsi, 16
  77     movups [RSP], XMM8
  78     .seh_savexmm XMM8, 0
  79 # CHECK: .seh_savexmm %xmm8, 0
  80     .seh_savexmm 8, 0
  81 # CHECK: .seh_savexmm %xmm8, 0
  82     push rbx
  83     .seh_pushreg rbx
  84 # CHECK: .seh_pushreg %rbx
  85     .seh_pushreg 3
  86 # CHECK: .seh_pushreg %rbx
  87     mov rbx, rsp
  88     .seh_setframe rbx, 0
  89 # CHECK: .seh_setframe %rbx, 0
  90     .seh_endprologue
  91 # CHECK: .seh_endprologue
  92     .seh_handler __C_specific_handler, @except
  93 # CHECK: .seh_handler __C_specific_handler, @except
  94     .seh_handlerdata
  95 # CHECK-NOT: .section{{.*}}.xdata
  96 # CHECK: .seh_handlerdata
  97     .long 0
  98     .text
  99     .seh_endproc