1 # RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
2 # RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX11 %s
4 # GFX11: s_addk_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb7]
7 # GFX11: s_addk_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0xfe,0xb7]
10 # GFX11: s_addk_i32 m0, 0x1234 ; encoding: [0x34,0x12,0xfd,0xb7]
13 # GFX11: s_addk_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x80,0xb7]
16 # GFX11: s_addk_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xb7]
19 # GFX11: s_addk_i32 s105, 0x1234 ; encoding: [0x34,0x12,0xe9,0xb7]
22 # GFX11: s_addk_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0xeb,0xb7]
25 # GFX11: s_addk_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0xea,0xb7]
28 # GFX11: s_call_b64 exec, 4660 ; encoding: [0x34,0x12,0x7e,0xba]
31 # GFX11: s_call_b64 s[0:1], 4660 ; encoding: [0x34,0x12,0x00,0xba]
34 # GFX11: s_call_b64 s[104:105], 4660 ; encoding: [0x34,0x12,0x68,0xba]
37 # GFX11: s_call_b64 vcc, 4660 ; encoding: [0x34,0x12,0x6a,0xba]
40 # GFX11: s_call_b64 null, 4660 ; encoding: [0x34,0x12,0x7c,0xba]
43 # GFX11: s_cmovk_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb1]
46 # GFX11: s_cmovk_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb1]
49 # GFX11: s_cmovk_i32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb1]
52 # GFX11: s_cmovk_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb1]
55 # GFX11: s_cmovk_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb1]
58 # GFX11: s_cmovk_i32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb1]
61 # GFX11: s_cmovk_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb1]
64 # GFX11: s_cmovk_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb1]
67 # GFX11: s_cmpk_eq_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb1]
70 # GFX11: s_cmpk_eq_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0xfe,0xb1]
73 # GFX11: s_cmpk_eq_i32 m0, 0x1234 ; encoding: [0x34,0x12,0xfd,0xb1]
76 # GFX11: s_cmpk_eq_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x80,0xb1]
79 # GFX11: s_cmpk_eq_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xb1]
82 # GFX11: s_cmpk_eq_i32 s105, 0x1234 ; encoding: [0x34,0x12,0xe9,0xb1]
85 # GFX11: s_cmpk_eq_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0xeb,0xb1]
88 # GFX11: s_cmpk_eq_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0xea,0xb1]
91 # GFX11: s_cmpk_eq_u32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb4]
94 # GFX11: s_cmpk_eq_u32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0xfe,0xb4]
97 # GFX11: s_cmpk_eq_u32 m0, 0x1234 ; encoding: [0x34,0x12,0xfd,0xb4]
100 # GFX11: s_cmpk_eq_u32 s0, 0x1234 ; encoding: [0x34,0x12,0x80,0xb4]
103 # GFX11: s_cmpk_eq_u32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xb4]
106 # GFX11: s_cmpk_eq_u32 s105, 0x1234 ; encoding: [0x34,0x12,0xe9,0xb4]
109 # GFX11: s_cmpk_eq_u32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0xeb,0xb4]
112 # GFX11: s_cmpk_eq_u32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0xea,0xb4]
115 # GFX11: s_cmpk_ge_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb3]
118 # GFX11: s_cmpk_ge_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb3]
121 # GFX11: s_cmpk_ge_i32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb3]
124 # GFX11: s_cmpk_ge_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb3]
127 # GFX11: s_cmpk_ge_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb3]
130 # GFX11: s_cmpk_ge_i32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb3]
133 # GFX11: s_cmpk_ge_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb3]
136 # GFX11: s_cmpk_ge_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb3]
139 # GFX11: s_cmpk_ge_u32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb6]
142 # GFX11: s_cmpk_ge_u32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb6]
145 # GFX11: s_cmpk_ge_u32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb6]
148 # GFX11: s_cmpk_ge_u32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb6]
151 # GFX11: s_cmpk_ge_u32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb6]
154 # GFX11: s_cmpk_ge_u32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb6]
157 # GFX11: s_cmpk_ge_u32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb6]
160 # GFX11: s_cmpk_ge_u32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb6]
163 # GFX11: s_cmpk_gt_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb2]
166 # GFX11: s_cmpk_gt_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0xfe,0xb2]
169 # GFX11: s_cmpk_gt_i32 m0, 0x1234 ; encoding: [0x34,0x12,0xfd,0xb2]
172 # GFX11: s_cmpk_gt_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x80,0xb2]
175 # GFX11: s_cmpk_gt_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xb2]
178 # GFX11: s_cmpk_gt_i32 s105, 0x1234 ; encoding: [0x34,0x12,0xe9,0xb2]
181 # GFX11: s_cmpk_gt_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0xeb,0xb2]
184 # GFX11: s_cmpk_gt_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0xea,0xb2]
187 # GFX11: s_cmpk_gt_u32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb5]
190 # GFX11: s_cmpk_gt_u32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0xfe,0xb5]
193 # GFX11: s_cmpk_gt_u32 m0, 0x1234 ; encoding: [0x34,0x12,0xfd,0xb5]
196 # GFX11: s_cmpk_gt_u32 s0, 0x1234 ; encoding: [0x34,0x12,0x80,0xb5]
199 # GFX11: s_cmpk_gt_u32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xb5]
202 # GFX11: s_cmpk_gt_u32 s105, 0x1234 ; encoding: [0x34,0x12,0xe9,0xb5]
205 # GFX11: s_cmpk_gt_u32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0xeb,0xb5]
208 # GFX11: s_cmpk_gt_u32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0xea,0xb5]
211 # GFX11: s_cmpk_le_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb4]
214 # GFX11: s_cmpk_le_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb4]
217 # GFX11: s_cmpk_le_i32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb4]
220 # GFX11: s_cmpk_le_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb4]
223 # GFX11: s_cmpk_le_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb4]
226 # GFX11: s_cmpk_le_i32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb4]
229 # GFX11: s_cmpk_le_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb4]
232 # GFX11: s_cmpk_le_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb4]
235 # GFX11: s_cmpk_le_u32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb7]
238 # GFX11: s_cmpk_le_u32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb7]
241 # GFX11: s_cmpk_le_u32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb7]
244 # GFX11: s_cmpk_le_u32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb7]
247 # GFX11: s_cmpk_le_u32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb7]
250 # GFX11: s_cmpk_le_u32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb7]
253 # GFX11: s_cmpk_le_u32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb7]
256 # GFX11: s_cmpk_le_u32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb7]
259 # GFX11: s_cmpk_lg_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb2]
262 # GFX11: s_cmpk_lg_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb2]
265 # GFX11: s_cmpk_lg_i32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb2]
268 # GFX11: s_cmpk_lg_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb2]
271 # GFX11: s_cmpk_lg_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb2]
274 # GFX11: s_cmpk_lg_i32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb2]
277 # GFX11: s_cmpk_lg_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb2]
280 # GFX11: s_cmpk_lg_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb2]
283 # GFX11: s_cmpk_lg_u32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb5]
286 # GFX11: s_cmpk_lg_u32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb5]
289 # GFX11: s_cmpk_lg_u32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb5]
292 # GFX11: s_cmpk_lg_u32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb5]
295 # GFX11: s_cmpk_lg_u32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb5]
298 # GFX11: s_cmpk_lg_u32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb5]
301 # GFX11: s_cmpk_lg_u32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb5]
304 # GFX11: s_cmpk_lg_u32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb5]
307 # GFX11: s_cmpk_lt_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb3]
310 # GFX11: s_cmpk_lt_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0xfe,0xb3]
313 # GFX11: s_cmpk_lt_i32 m0, 0x1234 ; encoding: [0x34,0x12,0xfd,0xb3]
316 # GFX11: s_cmpk_lt_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x80,0xb3]
319 # GFX11: s_cmpk_lt_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xb3]
322 # GFX11: s_cmpk_lt_i32 s105, 0x1234 ; encoding: [0x34,0x12,0xe9,0xb3]
325 # GFX11: s_cmpk_lt_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0xeb,0xb3]
328 # GFX11: s_cmpk_lt_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0xea,0xb3]
331 # GFX11: s_cmpk_lt_u32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb6]
334 # GFX11: s_cmpk_lt_u32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0xfe,0xb6]
337 # GFX11: s_cmpk_lt_u32 m0, 0x1234 ; encoding: [0x34,0x12,0xfd,0xb6]
340 # GFX11: s_cmpk_lt_u32 s0, 0x1234 ; encoding: [0x34,0x12,0x80,0xb6]
343 # GFX11: s_cmpk_lt_u32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xb6]
346 # GFX11: s_cmpk_lt_u32 s105, 0x1234 ; encoding: [0x34,0x12,0xe9,0xb6]
349 # GFX11: s_cmpk_lt_u32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0xeb,0xb6]
352 # GFX11: s_cmpk_lt_u32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0xea,0xb6]
355 # GFX11: s_getreg_b32 exec_hi, hwreg(52, 8, 3) ; encoding: [0x34,0x12,0xff,0xb8]
358 # GFX11: s_getreg_b32 exec_lo, hwreg(52, 8, 3) ; encoding: [0x34,0x12,0xfe,0xb8]
361 # GFX11: s_getreg_b32 m0, hwreg(52, 8, 3) ; encoding: [0x34,0x12,0xfd,0xb8]
364 # GFX11: s_getreg_b32 s0, hwreg(52, 8, 3) ; encoding: [0x34,0x12,0x80,0xb8]
367 # GFX11: s_getreg_b32 s0, hwreg(17, 7, 25) ; encoding: [0xd1,0xc1,0x80,0xb8]
370 # GFX11: s_getreg_b32 s105, hwreg(52, 8, 3) ; encoding: [0x34,0x12,0xe9,0xb8]
373 # GFX11: s_getreg_b32 vcc_hi, hwreg(52, 8, 3) ; encoding: [0x34,0x12,0xeb,0xb8]
376 # GFX11: s_getreg_b32 vcc_lo, hwreg(52, 8, 3) ; encoding: [0x34,0x12,0xea,0xb8]
379 # GFX11: s_movk_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb0]
382 # GFX11: s_movk_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb0]
385 # GFX11: s_movk_i32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb0]
388 # GFX11: s_movk_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb0]
391 # GFX11: s_movk_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb0]
394 # GFX11: s_movk_i32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb0]
397 # GFX11: s_movk_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb0]
400 # GFX11: s_movk_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb0]
403 # GFX11: s_mulk_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0x7f,0xb8]
406 # GFX11: s_mulk_i32 exec_lo, 0x1234 ; encoding: [0x34,0x12,0x7e,0xb8]
409 # GFX11: s_mulk_i32 m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xb8]
412 # GFX11: s_mulk_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x00,0xb8]
415 # GFX11: s_mulk_i32 s0, 0xc1d1 ; encoding: [0xd1,0xc1,0x00,0xb8]
418 # GFX11: s_mulk_i32 s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xb8]
421 # GFX11: s_mulk_i32 vcc_hi, 0x1234 ; encoding: [0x34,0x12,0x6b,0xb8]
424 # GFX11: s_mulk_i32 vcc_lo, 0x1234 ; encoding: [0x34,0x12,0x6a,0xb8]
427 # GFX11: s_setreg_b32 hwreg(52, 8, 3), exec_hi ; encoding: [0x34,0x12,0x7f,0xb9]
430 # GFX11: s_setreg_b32 hwreg(52, 8, 3), exec_lo ; encoding: [0x34,0x12,0x7e,0xb9]
433 # GFX11: s_setreg_b32 hwreg(52, 8, 3), m0 ; encoding: [0x34,0x12,0x7d,0xb9]
436 # GFX11: s_setreg_b32 hwreg(52, 8, 3), s0 ; encoding: [0x34,0x12,0x00,0xb9]
439 # GFX11: s_setreg_b32 hwreg(52, 8, 3), s105 ; encoding: [0x34,0x12,0x69,0xb9]
442 # GFX11: s_setreg_b32 hwreg(52, 8, 3), vcc_hi ; encoding: [0x34,0x12,0x6b,0xb9]
445 # GFX11: s_setreg_b32 hwreg(52, 8, 3), vcc_lo ; encoding: [0x34,0x12,0x6a,0xb9]
448 # GFX11: s_setreg_b32 hwreg(17, 7, 25), s0 ; encoding: [0xd1,0xc1,0x00,0xb9]
451 # GFX11: s_subvector_loop_begin exec_hi, 4660 ; encoding: [0x34,0x12,0x7f,0xbb]
454 # GFX11: s_subvector_loop_begin exec_lo, 4660 ; encoding: [0x34,0x12,0x7e,0xbb]
457 # GFX11: s_subvector_loop_begin m0, 4660 ; encoding: [0x34,0x12,0x7d,0xbb]
460 # GFX11: s_subvector_loop_begin s0, 4660 ; encoding: [0x34,0x12,0x00,0xbb]
463 # GFX11: s_subvector_loop_begin s105, 4660 ; encoding: [0x34,0x12,0x69,0xbb]
466 # GFX11: s_subvector_loop_begin vcc_hi, 4660 ; encoding: [0x34,0x12,0x6b,0xbb]
469 # GFX11: s_subvector_loop_begin vcc_lo, 4660 ; encoding: [0x34,0x12,0x6a,0xbb]
472 # GFX11: s_subvector_loop_end exec_hi, 4660 ; encoding: [0x34,0x12,0xff,0xbb]
475 # GFX11: s_subvector_loop_end exec_lo, 4660 ; encoding: [0x34,0x12,0xfe,0xbb]
478 # GFX11: s_subvector_loop_end m0, 4660 ; encoding: [0x34,0x12,0xfd,0xbb]
481 # GFX11: s_subvector_loop_end s0, 4660 ; encoding: [0x34,0x12,0x80,0xbb]
484 # GFX11: s_subvector_loop_end s105, 4660 ; encoding: [0x34,0x12,0xe9,0xbb]
487 # GFX11: s_subvector_loop_end vcc_hi, 4660 ; encoding: [0x34,0x12,0xeb,0xbb]
490 # GFX11: s_subvector_loop_end vcc_lo, 4660 ; encoding: [0x34,0x12,0xea,0xbb]
493 # GFX11: s_version 0x1234 ; encoding: [0x34,0x12,0x80,0xb0]
496 # GFX11: s_version 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xb0]
499 # GFX11: s_waitcnt_expcnt null, 0x1234 ; encoding: [0x34,0x12,0x7c,0xbd]
502 # GFX11: s_waitcnt_expcnt null, 0xc1d1 ; encoding: [0xd1,0xc1,0x7c,0xbd]
505 # GFX11: s_waitcnt_expcnt s105, 0x1234 ; encoding: [0x34,0x12,0x69,0xbd]
508 # GFX11: s_waitcnt_lgkmcnt null, 0x1234 ; encoding: [0x34,0x12,0xfc,0xbd]
511 # GFX11: s_waitcnt_lgkmcnt null, 0xc1d1 ; encoding: [0xd1,0xc1,0xfc,0xbd]
514 # GFX11: s_waitcnt_lgkmcnt vcc_hi, 0x1234 ; encoding: [0x34,0x12,0xeb,0xbd]
517 # GFX11: s_waitcnt_vmcnt null, 0x1234 ; encoding: [0x34,0x12,0xfc,0xbc]
520 # GFX11: s_waitcnt_vmcnt null, 0xc1d1 ; encoding: [0xd1,0xc1,0xfc,0xbc]
523 # GFX11: s_waitcnt_vmcnt exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xbc]
526 # GFX11: s_waitcnt_vscnt null, 0x1234 ; encoding: [0x34,0x12,0x7c,0xbc]
529 # GFX11: s_waitcnt_vscnt null, 0xc1d1 ; encoding: [0xd1,0xc1,0x7c,0xbc]
532 # GFX11: s_waitcnt_vscnt m0, 0x1234 ; encoding: [0x34,0x12,0x7d,0xbc]
535 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_MODE), 0xaf123456 ; encoding: [0x01,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
536 0x01,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
538 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 31, 1), 0xaf123456 ; encoding: [0xc1,0x07,0x80,0xb9,0x56,0x34,0x12,0xaf]
539 0xc1,0x07,0x80,0xb9,0x56,0x34,0x12,0xaf
541 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_STATUS), 0xaf123456 ; encoding: [0x02,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
542 0x02,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
544 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_TRAPSTS), 0xaf123456 ; encoding: [0x03,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
545 0x03,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
547 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_GPR_ALLOC), 0xaf123456 ; encoding: [0x05,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
548 0x05,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
550 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_LDS_ALLOC), 0xaf123456 ; encoding: [0x06,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
551 0x06,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
553 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_IB_STS), 0xaf123456 ; encoding: [0x07,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
554 0x07,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
556 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_SH_MEM_BASES), 0xaf123456 ; encoding: [0x0f,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
557 0x0f,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
559 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_FLAT_SCR_LO), 0xaf123456 ; encoding: [0x14,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
560 0x14,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
562 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_FLAT_SCR_HI), 0xaf123456 ; encoding: [0x15,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
563 0x15,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
565 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_HW_ID1), 0xaf123456 ; encoding: [0x17,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
566 0x17,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
568 # GFX11: s_setreg_imm32_b32 hwreg(HW_REG_HW_ID2), 0xaf123456 ; encoding: [0x18,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf]
569 0x18,0xf8,0x80,0xb9,0x56,0x34,0x12,0xaf
571 # GFX11: s_getreg_b32 s0, hwreg(HW_REG_PERF_SNAPSHOT_PC_LO) ; encoding: [0x12,0xf8,0x80,0xb8]
574 # GFX11: s_getreg_b32 s0, hwreg(HW_REG_PERF_SNAPSHOT_PC_HI) ; encoding: [0x13,0xf8,0x80,0xb8]
577 # GFX11: s_getreg_b32 s0, hwreg(HW_REG_PERF_SNAPSHOT_DATA) ; encoding: [0x1b,0xf8,0x80,0xb8]