llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt

   1 # RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble %s | FileCheck -strict-whitespace -check-prefix=GFX11 %s
   2
   3 # GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:0{{$}}
   4 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x04
   5
   6 # Check that unused bits in the encoding are ignored.
   7 # GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:0{{$}}
   8 0x00,0x00,0x80,0xcd,0x01,0x05,0x0e,0x1c
   9
  10 # GFX11: v_interp_p10_f32 v1, v10, v20, v30 wait_exp:0{{$}}
  11 0x01,0x00,0x00,0xcd,0x0a,0x29,0x7a,0x04
  12
  13 # GFX11: v_interp_p10_f32 v2, v11, v21, v31 wait_exp:0{{$}}
  14 0x02,0x00,0x00,0xcd,0x0b,0x2b,0x7e,0x04
  15
  16 # GFX11: v_interp_p10_f32 v3, v12, v22, v32 wait_exp:0{{$}}
  17 0x03,0x00,0x00,0xcd,0x0c,0x2d,0x82,0x04
  18
  19 # GFX11: v_interp_p10_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}}
  20 0x00,0x80,0x00,0xcd,0x01,0x05,0x0e,0x04
  21
  22 # GFX11: v_interp_p10_f32 v0, -v1, v2, v3 wait_exp:0{{$}}
  23 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x24
  24
  25 # GFX11: v_interp_p10_f32 v0, v1, -v2, v3 wait_exp:0{{$}}
  26 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x44
  27
  28 # GFX11: v_interp_p10_f32 v0, v1, v2, -v3 wait_exp:0{{$}}
  29 0x00,0x00,0x00,0xcd,0x01,0x05,0x0e,0x84
  30
  31 # GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:1{{$}}
  32 0x00,0x01,0x00,0xcd,0x01,0x05,0x0e,0x04
  33
  34 # GFX11: v_interp_p10_f32 v0, v1, v2, v3 wait_exp:7{{$}}
  35 0x00,0x07,0x00,0xcd,0x01,0x05,0x0e,0x04
  36
  37 # GFX11: v_interp_p10_f32 v0, v1, v2, v3 clamp wait_exp:7{{$}}
  38 0x00,0x87,0x00,0xcd,0x01,0x05,0x0e,0x04
  39
  40 # GFX11: v_interp_p2_f32 v0, v1, v2, v3 wait_exp:0{{$}}
  41 0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x04
  42
  43 # GFX11: v_interp_p2_f32 v1, v10, v20, v30 wait_exp:0{{$}}
  44 0x01,0x00,0x01,0xcd,0x0a,0x29,0x7a,0x04
  45
  46 # GFX11: v_interp_p2_f32 v2, v11, v21, v31 wait_exp:0{{$}}
  47 0x02,0x00,0x01,0xcd,0x0b,0x2b,0x7e,0x04
  48
  49 # GFX11: v_interp_p2_f32 v3, v12, v22, v32 wait_exp:0{{$}}
  50 0x03,0x00,0x01,0xcd,0x0c,0x2d,0x82,0x04
  51
  52 # GFX11: v_interp_p2_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}}
  53 0x00,0x80,0x01,0xcd,0x01,0x05,0x0e,0x04
  54
  55 # GFX11: v_interp_p2_f32 v0, -v1, v2, v3 wait_exp:0{{$}}
  56 0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x24
  57
  58 # GFX11: v_interp_p2_f32 v0, v1, -v2, v3 wait_exp:0{{$}}
  59 0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x44
  60
  61 # GFX11: v_interp_p2_f32 v0, v1, v2, -v3 wait_exp:0{{$}}
  62 0x00,0x00,0x01,0xcd,0x01,0x05,0x0e,0x84
  63
  64 # GFX11: v_interp_p2_f32 v0, v1, v2, v3 wait_exp:1{{$}}
  65 0x00,0x01,0x01,0xcd,0x01,0x05,0x0e,0x04
  66
  67 # GFX11: v_interp_p2_f32 v0, v1, v2, v3 wait_exp:7{{$}}
  68 0x00,0x07,0x01,0xcd,0x01,0x05,0x0e,0x04
  69
  70 # GFX11: v_interp_p2_f32 v0, v1, v2, v3 clamp wait_exp:7{{$}}
  71 0x00,0x87,0x01,0xcd,0x01,0x05,0x0e,0x04
  72
  73 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:0{{$}}
  74 0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04
  75
  76 # GFX11: v_interp_p10_f16_f32 v0, -v1, v2, v3 wait_exp:0{{$}}
  77 0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x24
  78
  79 # GFX11: v_interp_p10_f16_f32 v0, v1, -v2, v3 wait_exp:0{{$}}
  80 0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x44
  81
  82 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, -v3 wait_exp:0{{$}}
  83 0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x84
  84
  85 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}}
  86 0x00,0x80,0x02,0xcd,0x01,0x05,0x0e,0x04
  87
  88 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:1{{$}}
  89 0x00,0x01,0x02,0xcd,0x01,0x05,0x0e,0x04
  90
  91 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 wait_exp:7{{$}}
  92 0x00,0x07,0x02,0xcd,0x01,0x05,0x0e,0x04
  93
  94 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0{{$}}
  95 0x00,0x08,0x02,0xcd,0x01,0x05,0x0e,0x04
  96
  97 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0{{$}}
  98 0x00,0x10,0x02,0xcd,0x01,0x05,0x0e,0x04
  99
 100 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0{{$}}
 101 0x00,0x20,0x02,0xcd,0x01,0x05,0x0e,0x04
 102
 103 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0{{$}}
 104 0x00,0x40,0x02,0xcd,0x01,0x05,0x0e,0x04
 105
 106 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0{{$}}
 107 0x00,0x78,0x02,0xcd,0x01,0x05,0x0e,0x04
 108
 109 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5{{$}}
 110 0x00,0x4d,0x02,0xcd,0x01,0x05,0x0e,0x04
 111
 112 # GFX11: v_interp_p10_f16_f32 v0, v1, v2, v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}}
 113 0x00,0xcd,0x02,0xcd,0x01,0x05,0x0e,0x04
 114
 115 # GFX11: v_interp_p10_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}}
 116 0x00,0xcd,0x02,0xcd,0x01,0x05,0x0e,0xe4
 117
 118 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:0{{$}}
 119 0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04
 120
 121 # GFX11: v_interp_p2_f16_f32 v0, -v1, v2, v3 wait_exp:0{{$}}
 122 0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x24
 123
 124 # GFX11: v_interp_p2_f16_f32 v0, v1, -v2, v3 wait_exp:0{{$}}
 125 0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x44
 126
 127 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, -v3 wait_exp:0{{$}}
 128 0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x84
 129
 130 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}}
 131 0x00,0x80,0x03,0xcd,0x01,0x05,0x0e,0x04
 132
 133 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:1{{$}}
 134 0x00,0x01,0x03,0xcd,0x01,0x05,0x0e,0x04
 135
 136 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 wait_exp:7{{$}}
 137 0x00,0x07,0x03,0xcd,0x01,0x05,0x0e,0x04
 138
 139 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0{{$}}
 140 0x00,0x08,0x03,0xcd,0x01,0x05,0x0e,0x04
 141
 142 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0{{$}}
 143 0x00,0x10,0x03,0xcd,0x01,0x05,0x0e,0x04
 144
 145 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0{{$}}
 146 0x00,0x20,0x03,0xcd,0x01,0x05,0x0e,0x04
 147
 148 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0{{$}}
 149 0x00,0x40,0x03,0xcd,0x01,0x05,0x0e,0x04
 150
 151 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0{{$}}
 152 0x00,0x78,0x03,0xcd,0x01,0x05,0x0e,0x04
 153
 154 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5{{$}}
 155 0x00,0x4d,0x03,0xcd,0x01,0x05,0x0e,0x04
 156
 157 # GFX11: v_interp_p2_f16_f32 v0, v1, v2, v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}}
 158 0x00,0xcd,0x03,0xcd,0x01,0x05,0x0e,0x04
 159
 160 # GFX11: v_interp_p2_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}}
 161 0x00,0xcd,0x03,0xcd,0x01,0x05,0x0e,0xe4
 162
 163 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0{{$}}
 164 0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04
 165
 166 # GFX11: v_interp_p10_rtz_f16_f32 v0, -v1, v2, v3 wait_exp:0{{$}}
 167 0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x24
 168
 169 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, -v2, v3 wait_exp:0{{$}}
 170 0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x44
 171
 172 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, -v3 wait_exp:0{{$}}
 173 0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x84
 174
 175 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}}
 176 0x00,0x80,0x04,0xcd,0x01,0x05,0x0e,0x04
 177
 178 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:1{{$}}
 179 0x00,0x01,0x04,0xcd,0x01,0x05,0x0e,0x04
 180
 181 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 wait_exp:7{{$}}
 182 0x00,0x07,0x04,0xcd,0x01,0x05,0x0e,0x04
 183
 184 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0{{$}}
 185 0x00,0x08,0x04,0xcd,0x01,0x05,0x0e,0x04
 186
 187 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0{{$}}
 188 0x00,0x10,0x04,0xcd,0x01,0x05,0x0e,0x04
 189
 190 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0{{$}}
 191 0x00,0x20,0x04,0xcd,0x01,0x05,0x0e,0x04
 192
 193 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0{{$}}
 194 0x00,0x40,0x04,0xcd,0x01,0x05,0x0e,0x04
 195
 196 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0{{$}}
 197 0x00,0x78,0x04,0xcd,0x01,0x05,0x0e,0x04
 198
 199 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5{{$}}
 200 0x00,0x4d,0x04,0xcd,0x01,0x05,0x0e,0x04
 201
 202 # GFX11: v_interp_p10_rtz_f16_f32 v0, v1, v2, v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}}
 203 0x00,0xcd,0x04,0xcd,0x01,0x05,0x0e,0x04
 204
 205 # GFX11: v_interp_p10_rtz_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}}
 206 0x00,0xcd,0x04,0xcd,0x01,0x05,0x0e,0xe4
 207
 208 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:0{{$}}
 209 0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04
 210
 211 # GFX11: v_interp_p2_rtz_f16_f32 v0, -v1, v2, v3 wait_exp:0{{$}}
 212 0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x24
 213
 214 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, -v2, v3 wait_exp:0{{$}}
 215 0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x44
 216
 217 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, -v3 wait_exp:0{{$}}
 218 0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x84
 219
 220 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 clamp wait_exp:0{{$}}
 221 0x00,0x80,0x05,0xcd,0x01,0x05,0x0e,0x04
 222
 223 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:1{{$}}
 224 0x00,0x01,0x05,0xcd,0x01,0x05,0x0e,0x04
 225
 226 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 wait_exp:7{{$}}
 227 0x00,0x07,0x05,0xcd,0x01,0x05,0x0e,0x04
 228
 229 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,0] wait_exp:0{{$}}
 230 0x00,0x08,0x05,0xcd,0x01,0x05,0x0e,0x04
 231
 232 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,1,0,0] wait_exp:0{{$}}
 233 0x00,0x10,0x05,0xcd,0x01,0x05,0x0e,0x04
 234
 235 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,1,0] wait_exp:0{{$}}
 236 0x00,0x20,0x05,0xcd,0x01,0x05,0x0e,0x04
 237
 238 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[0,0,0,1] wait_exp:0{{$}}
 239 0x00,0x40,0x05,0xcd,0x01,0x05,0x0e,0x04
 240
 241 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,1,1,1] wait_exp:0{{$}}
 242 0x00,0x78,0x05,0xcd,0x01,0x05,0x0e,0x04
 243
 244 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 op_sel:[1,0,0,1] wait_exp:5{{$}}
 245 0x00,0x4d,0x05,0xcd,0x01,0x05,0x0e,0x04
 246
 247 # GFX11: v_interp_p2_rtz_f16_f32 v0, v1, v2, v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}}
 248 0x00,0xcd,0x05,0xcd,0x01,0x05,0x0e,0x04
 249
 250 # GFX11: v_interp_p2_rtz_f16_f32 v0, -v1, -v2, -v3 clamp op_sel:[1,0,0,1] wait_exp:5{{$}}
 251 0x00,0xcd,0x05,0xcd,0x01,0x05,0x0e,0xe4