llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt

   1 # RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W32 %s
   2 # RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11,W64 %s
   3
   4 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff]
   5 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff]
   6 0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff
   7
   8 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xff]
   9 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xff]
  10 0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xff
  11
  12 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0xff]
  13 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0xff]
  14 0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0xff
  15
  16 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0xff]
  17 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0xff]
  18 0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0xff
  19
  20 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0xff]
  21 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0xff]
  22 0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0xff
  23
  24 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0xff]
  25 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0xff]
  26 0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0xff
  27
  28 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0xff]
  29 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0xff]
  30 0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0xff
  31
  32 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0xff]
  33 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0xff]
  34 0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0xff
  35
  36 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0xff]
  37 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0xff]
  38 0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0xff
  39
  40 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0xff]
  41 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0xff]
  42 0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0xff
  43
  44 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x50,0x01,0xff]
  45 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x50,0x01,0xff]
  46 0xfa,0x04,0x0a,0x40,0x01,0x50,0x01,0xff
  47
  48 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x5f,0x01,0x01]
  49 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x5f,0x01,0x01]
  50 0xfa,0x04,0x0a,0x40,0x01,0x5f,0x01,0x01
  51
  52 # W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x60,0x01,0x13]
  53 # W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x60,0x01,0x13]
  54 0xfa,0x04,0x0a,0x40,0x01,0x60,0x01,0x13
  55
  56 # W32: v_add_co_ci_u32_dpp v255, vcc_lo, v255, v255, vcc_lo row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x41,0xff,0x6f,0x0d,0x30]
  57 # W64: v_add_co_ci_u32_dpp v255, vcc, v255, v255, vcc row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x41,0xff,0x6f,0x0d,0x30]
  58 0xfa,0xfe,0xff,0x41,0xff,0x6f,0x0d,0x30
  59
  60 # GFX11: v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0xff]
  61 0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0xff
  62
  63 # GFX11: v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xff]
  64 0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xff
  65
  66 # GFX11: v_add_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0xff]
  67 0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0xff
  68
  69 # GFX11: v_add_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0xff]
  70 0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0xff
  71
  72 # GFX11: v_add_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0xff]
  73 0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0xff
  74
  75 # GFX11: v_add_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0xff]
  76 0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0xff
  77
  78 # GFX11: v_add_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0xff]
  79 0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0xff
  80
  81 # GFX11: v_add_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0xff]
  82 0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0xff
  83
  84 # GFX11: v_add_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0xff]
  85 0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0xff
  86
  87 # GFX11: v_add_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0xff]
  88 0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0xff
  89
  90 # GFX11: v_add_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x50,0x01,0xff]
  91 0xfa,0x04,0x0a,0x64,0x01,0x50,0x01,0xff
  92
  93 # GFX11: v_add_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x5f,0x01,0x01]
  94 0xfa,0x04,0x0a,0x64,0x01,0x5f,0x01,0x01
  95
  96 # GFX11: v_add_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x60,0x01,0x13]
  97 0xfa,0x04,0x0a,0x64,0x01,0x60,0x01,0x13
  98
  99 # GFX11: v_add_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x64,0x7f,0x6f,0xfd,0x30]
 100 0xfa,0xfe,0xfe,0x64,0x7f,0x6f,0xfd,0x30
 101
 102 # GFX11: v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0xff]
 103 0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0xff
 104
 105 # GFX11: v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xff]
 106 0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xff
 107
 108 # GFX11: v_add_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x40,0x01,0xff]
 109 0xfa,0x04,0x0a,0x06,0x01,0x40,0x01,0xff
 110
 111 # GFX11: v_add_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x41,0x01,0xff]
 112 0xfa,0x04,0x0a,0x06,0x01,0x41,0x01,0xff
 113
 114 # GFX11: v_add_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x01,0x01,0xff]
 115 0xfa,0x04,0x0a,0x06,0x01,0x01,0x01,0xff
 116
 117 # GFX11: v_add_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x0f,0x01,0xff]
 118 0xfa,0x04,0x0a,0x06,0x01,0x0f,0x01,0xff
 119
 120 # GFX11: v_add_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x11,0x01,0xff]
 121 0xfa,0x04,0x0a,0x06,0x01,0x11,0x01,0xff
 122
 123 # GFX11: v_add_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1f,0x01,0xff]
 124 0xfa,0x04,0x0a,0x06,0x01,0x1f,0x01,0xff
 125
 126 # GFX11: v_add_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x21,0x01,0xff]
 127 0xfa,0x04,0x0a,0x06,0x01,0x21,0x01,0xff
 128
 129 # GFX11: v_add_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x2f,0x01,0xff]
 130 0xfa,0x04,0x0a,0x06,0x01,0x2f,0x01,0xff
 131
 132 # GFX11: v_add_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x50,0x01,0xff]
 133 0xfa,0x04,0x0a,0x06,0x01,0x50,0x01,0xff
 134
 135 # GFX11: v_add_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x5f,0x01,0x01]
 136 0xfa,0x04,0x0a,0x06,0x01,0x5f,0x01,0x01
 137
 138 # GFX11: v_add_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x60,0x01,0x13]
 139 0xfa,0x04,0x0a,0x06,0x01,0x60,0x01,0x13
 140
 141 # GFX11: v_add_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x07,0xff,0x6f,0xfd,0x30]
 142 0xfa,0xfe,0xff,0x07,0xff,0x6f,0xfd,0x30
 143
 144 # GFX11: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0xff]
 145 0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0xff
 146
 147 # GFX11: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0xe4,0x00,0xff]
 148 0xfa,0x04,0x0a,0x4a,0x01,0xe4,0x00,0xff
 149
 150 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x40,0x01,0xff]
 151 0xfa,0x04,0x0a,0x4a,0x01,0x40,0x01,0xff
 152
 153 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x41,0x01,0xff]
 154 0xfa,0x04,0x0a,0x4a,0x01,0x41,0x01,0xff
 155
 156 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x01,0x01,0xff]
 157 0xfa,0x04,0x0a,0x4a,0x01,0x01,0x01,0xff
 158
 159 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x0f,0x01,0xff]
 160 0xfa,0x04,0x0a,0x4a,0x01,0x0f,0x01,0xff
 161
 162 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x11,0x01,0xff]
 163 0xfa,0x04,0x0a,0x4a,0x01,0x11,0x01,0xff
 164
 165 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1f,0x01,0xff]
 166 0xfa,0x04,0x0a,0x4a,0x01,0x1f,0x01,0xff
 167
 168 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x21,0x01,0xff]
 169 0xfa,0x04,0x0a,0x4a,0x01,0x21,0x01,0xff
 170
 171 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x2f,0x01,0xff]
 172 0xfa,0x04,0x0a,0x4a,0x01,0x2f,0x01,0xff
 173
 174 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x50,0x01,0xff]
 175 0xfa,0x04,0x0a,0x4a,0x01,0x50,0x01,0xff
 176
 177 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x5f,0x01,0x01]
 178 0xfa,0x04,0x0a,0x4a,0x01,0x5f,0x01,0x01
 179
 180 # GFX11: v_add_nc_u32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x60,0x01,0x13]
 181 0xfa,0x04,0x0a,0x4a,0x01,0x60,0x01,0x13
 182
 183 # GFX11: v_add_nc_u32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x4b,0xff,0x6f,0x0d,0x30]
 184 0xfa,0xfe,0xff,0x4b,0xff,0x6f,0x0d,0x30
 185
 186 # GFX11: v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0xff]
 187 0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0xff
 188
 189 # GFX11: v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xff]
 190 0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xff
 191
 192 # GFX11: v_and_b32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0xff]
 193 0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0xff
 194
 195 # GFX11: v_and_b32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0xff]
 196 0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0xff
 197
 198 # GFX11: v_and_b32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0xff]
 199 0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0xff
 200
 201 # GFX11: v_and_b32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0xff]
 202 0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0xff
 203
 204 # GFX11: v_and_b32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0xff]
 205 0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0xff
 206
 207 # GFX11: v_and_b32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0xff]
 208 0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0xff
 209
 210 # GFX11: v_and_b32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0xff]
 211 0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0xff
 212
 213 # GFX11: v_and_b32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0xff]
 214 0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0xff
 215
 216 # GFX11: v_and_b32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x50,0x01,0xff]
 217 0xfa,0x04,0x0a,0x36,0x01,0x50,0x01,0xff
 218
 219 # GFX11: v_and_b32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x5f,0x01,0x01]
 220 0xfa,0x04,0x0a,0x36,0x01,0x5f,0x01,0x01
 221
 222 # GFX11: v_and_b32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x60,0x01,0x13]
 223 0xfa,0x04,0x0a,0x36,0x01,0x60,0x01,0x13
 224
 225 # GFX11: v_and_b32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x37,0xff,0x6f,0x0d,0x30]
 226 0xfa,0xfe,0xff,0x37,0xff,0x6f,0x0d,0x30
 227
 228 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0xff]
 229 0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0xff
 230
 231 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xff]
 232 0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xff
 233
 234 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0xff]
 235 0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0xff
 236
 237 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0xff]
 238 0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0xff
 239
 240 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0xff]
 241 0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0xff
 242
 243 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0xff]
 244 0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0xff
 245
 246 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0xff]
 247 0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0xff
 248
 249 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0xff]
 250 0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0xff
 251
 252 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0xff]
 253 0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0xff
 254
 255 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0xff]
 256 0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0xff
 257
 258 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x50,0x01,0xff]
 259 0xfa,0x04,0x0a,0x34,0x01,0x50,0x01,0xff
 260
 261 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x5f,0x01,0x01]
 262 0xfa,0x04,0x0a,0x34,0x01,0x5f,0x01,0x01
 263
 264 # GFX11: v_ashrrev_i32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x60,0x01,0x13]
 265 0xfa,0x04,0x0a,0x34,0x01,0x60,0x01,0x13
 266
 267 # GFX11: v_ashrrev_i32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x35,0xff,0x6f,0x0d,0x30]
 268 0xfa,0xfe,0xff,0x35,0xff,0x6f,0x0d,0x30
 269
 270 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0xff]
 271 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0xff]
 272 0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0xff
 273
 274 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xff]
 275 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xff]
 276 0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xff
 277
 278 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0xff]
 279 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0xff]
 280 0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0xff
 281
 282 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0xff]
 283 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0xff]
 284 0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0xff
 285
 286 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0xff]
 287 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0xff]
 288 0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0xff
 289
 290 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0xff]
 291 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0xff]
 292 0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0xff
 293
 294 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0xff]
 295 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0xff]
 296 0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0xff
 297
 298 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0xff]
 299 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0xff]
 300 0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0xff
 301
 302 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0xff]
 303 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0xff]
 304 0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0xff
 305
 306 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0xff]
 307 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0xff]
 308 0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0xff
 309
 310 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x50,0x01,0xff]
 311 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x50,0x01,0xff]
 312 0xfa,0x04,0x0a,0x02,0x01,0x50,0x01,0xff
 313
 314 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x5f,0x01,0x01]
 315 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x5f,0x01,0x01]
 316 0xfa,0x04,0x0a,0x02,0x01,0x5f,0x01,0x01
 317
 318 # W32: v_cndmask_b32_dpp v5, v1, v2, vcc_lo row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x60,0x01,0x13]
 319 # W64: v_cndmask_b32_dpp v5, v1, v2, vcc row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0x60,0x01,0x13]
 320 0xfa,0x04,0x0a,0x02,0x01,0x60,0x01,0x13
 321
 322 # W32: v_cndmask_b32_dpp v255, v255, v255, vcc_lo row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x03,0xff,0x6f,0x0d,0x30]
 323 # W64: v_cndmask_b32_dpp v255, v255, v255, vcc row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x03,0xff,0x6f,0x0d,0x30]
 324 0xfa,0xfe,0xff,0x03,0xff,0x6f,0x0d,0x30
 325
 326 # W32: v_cndmask_b32_dpp v5, -v1, |v2|, vcc_lo quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x90,0xff]
 327 # W64: v_cndmask_b32_dpp v5, -v1, |v2|, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x90,0xff]
 328 0xfa,0x04,0x0a,0x02,0x01,0xe4,0x90,0xff
 329
 330 # W32: v_cndmask_b32_dpp v5, |v1|, -v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x60,0xff]
 331 # W64: v_cndmask_b32_dpp v5, |v1|, -v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x60,0xff]
 332 0xfa,0x04,0x0a,0x02,0x01,0xe4,0x60,0xff
 333
 334 # W32: v_cndmask_b32_dpp v5, -|v1|, -|v2|, vcc_lo quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0xf0,0xff]
 335 # W64: v_cndmask_b32_dpp v5, -|v1|, -|v2|, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0xf0,0xff]
 336 0xfa,0x04,0x0a,0x02,0x01,0xe4,0xf0,0xff
 337
 338 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0xff]
 339 0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0xff
 340
 341 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xff]
 342 0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xff
 343
 344 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0xff]
 345 0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0xff
 346
 347 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0xff]
 348 0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0xff
 349
 350 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0xff]
 351 0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0xff
 352
 353 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0xff]
 354 0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0xff
 355
 356 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0xff]
 357 0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0xff
 358
 359 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0xff]
 360 0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0xff
 361
 362 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0xff]
 363 0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0xff
 364
 365 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0xff]
 366 0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0xff
 367
 368 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x50,0x01,0xff]
 369 0xfa,0x04,0x0a,0x5e,0x01,0x50,0x01,0xff
 370
 371 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x5f,0x01,0x01]
 372 0xfa,0x04,0x0a,0x5e,0x01,0x5f,0x01,0x01
 373
 374 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x5e,0x01,0x60,0x01,0x13]
 375 0xfa,0x04,0x0a,0x5e,0x01,0x60,0x01,0x13
 376
 377 # GFX11: v_cvt_pk_rtz_f16_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x5f,0xff,0x6f,0xfd,0x30]
 378 0xfa,0xfe,0xff,0x5f,0xff,0x6f,0xfd,0x30
 379
 380 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0xff]
 381 0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0xff
 382
 383 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xff]
 384 0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xff
 385
 386 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0xff]
 387 0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0xff
 388
 389 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0xff]
 390 0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0xff
 391
 392 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0xff]
 393 0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0xff
 394
 395 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0xff]
 396 0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0xff
 397
 398 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0xff]
 399 0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0xff
 400
 401 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0xff]
 402 0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0xff
 403
 404 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0xff]
 405 0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0xff
 406
 407 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0xff]
 408 0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0xff
 409
 410 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x50,0x01,0xff]
 411 0xfa,0x04,0x0a,0x04,0x01,0x50,0x01,0xff
 412
 413 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x5f,0x01,0x01]
 414 0xfa,0x04,0x0a,0x04,0x01,0x5f,0x01,0x01
 415
 416 # GFX11: v_dot2acc_f32_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x04,0x01,0x60,0x01,0x13]
 417 0xfa,0x04,0x0a,0x04,0x01,0x60,0x01,0x13
 418
 419 # GFX11: v_dot2acc_f32_f16_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x05,0xff,0x6f,0xfd,0x30]
 420 0xfa,0xfe,0xff,0x05,0xff,0x6f,0xfd,0x30
 421
 422 # GFX11: v_fmac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0xff]
 423 0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0xff
 424
 425 # GFX11: v_fmac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xff]
 426 0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xff
 427
 428 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0xff]
 429 0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0xff
 430
 431 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0xff]
 432 0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0xff
 433
 434 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0xff]
 435 0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0xff
 436
 437 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0xff]
 438 0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0xff
 439
 440 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0xff]
 441 0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0xff
 442
 443 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0xff]
 444 0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0xff
 445
 446 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0xff]
 447 0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0xff
 448
 449 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0xff]
 450 0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0xff
 451
 452 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x50,0x01,0xff]
 453 0xfa,0x04,0x0a,0x6c,0x01,0x50,0x01,0xff
 454
 455 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x5f,0x01,0x01]
 456 0xfa,0x04,0x0a,0x6c,0x01,0x5f,0x01,0x01
 457
 458 # GFX11: v_fmac_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x60,0x01,0x13]
 459 0xfa,0x04,0x0a,0x6c,0x01,0x60,0x01,0x13
 460
 461 # GFX11: v_fmac_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x6c,0x7f,0x6f,0xfd,0x30]
 462 0xfa,0xfe,0xfe,0x6c,0x7f,0x6f,0xfd,0x30
 463
 464 # GFX11: v_fmac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0xff]
 465 0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0xff
 466
 467 # GFX11: v_fmac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xff]
 468 0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xff
 469
 470 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0xff]
 471 0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0xff
 472
 473 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0xff]
 474 0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0xff
 475
 476 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0xff]
 477 0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0xff
 478
 479 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0xff]
 480 0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0xff
 481
 482 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0xff]
 483 0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0xff
 484
 485 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0xff]
 486 0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0xff
 487
 488 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0xff]
 489 0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0xff
 490
 491 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0xff]
 492 0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0xff
 493
 494 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x50,0x01,0xff]
 495 0xfa,0x04,0x0a,0x56,0x01,0x50,0x01,0xff
 496
 497 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x5f,0x01,0x01]
 498 0xfa,0x04,0x0a,0x56,0x01,0x5f,0x01,0x01
 499
 500 # GFX11: v_fmac_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x60,0x01,0x13]
 501 0xfa,0x04,0x0a,0x56,0x01,0x60,0x01,0x13
 502
 503 # GFX11: v_fmac_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x57,0xff,0x6f,0xfd,0x30]
 504 0xfa,0xfe,0xff,0x57,0xff,0x6f,0xfd,0x30
 505
 506 # GFX11: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0xff]
 507 0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0xff
 508
 509 # GFX11: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0xe4,0x00,0xff]
 510 0xfa,0x04,0x0a,0x76,0x01,0xe4,0x00,0xff
 511
 512 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x40,0x01,0xff]
 513 0xfa,0x04,0x0a,0x76,0x01,0x40,0x01,0xff
 514
 515 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x41,0x01,0xff]
 516 0xfa,0x04,0x0a,0x76,0x01,0x41,0x01,0xff
 517
 518 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x01,0x01,0xff]
 519 0xfa,0x04,0x0a,0x76,0x01,0x01,0x01,0xff
 520
 521 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x0f,0x01,0xff]
 522 0xfa,0x04,0x0a,0x76,0x01,0x0f,0x01,0xff
 523
 524 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x11,0x01,0xff]
 525 0xfa,0x04,0x0a,0x76,0x01,0x11,0x01,0xff
 526
 527 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1f,0x01,0xff]
 528 0xfa,0x04,0x0a,0x76,0x01,0x1f,0x01,0xff
 529
 530 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x21,0x01,0xff]
 531 0xfa,0x04,0x0a,0x76,0x01,0x21,0x01,0xff
 532
 533 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x2f,0x01,0xff]
 534 0xfa,0x04,0x0a,0x76,0x01,0x2f,0x01,0xff
 535
 536 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x50,0x01,0xff]
 537 0xfa,0x04,0x0a,0x76,0x01,0x50,0x01,0xff
 538
 539 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x5f,0x01,0x01]
 540 0xfa,0x04,0x0a,0x76,0x01,0x5f,0x01,0x01
 541
 542 # GFX11: v_ldexp_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x60,0x01,0x13]
 543 0xfa,0x04,0x0a,0x76,0x01,0x60,0x01,0x13
 544
 545 # GFX11: v_ldexp_f16_dpp v127, -|v127|, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x76,0x7f,0x6f,0x3d,0x30]
 546 0xfa,0xfe,0xfe,0x76,0x7f,0x6f,0x3d,0x30
 547
 548 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0xff]
 549 0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0xff
 550
 551 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0xe4,0x00,0xff]
 552 0xfa,0x04,0x0a,0x30,0x01,0xe4,0x00,0xff
 553
 554 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x40,0x01,0xff]
 555 0xfa,0x04,0x0a,0x30,0x01,0x40,0x01,0xff
 556
 557 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x41,0x01,0xff]
 558 0xfa,0x04,0x0a,0x30,0x01,0x41,0x01,0xff
 559
 560 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x01,0x01,0xff]
 561 0xfa,0x04,0x0a,0x30,0x01,0x01,0x01,0xff
 562
 563 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x0f,0x01,0xff]
 564 0xfa,0x04,0x0a,0x30,0x01,0x0f,0x01,0xff
 565
 566 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x11,0x01,0xff]
 567 0xfa,0x04,0x0a,0x30,0x01,0x11,0x01,0xff
 568
 569 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1f,0x01,0xff]
 570 0xfa,0x04,0x0a,0x30,0x01,0x1f,0x01,0xff
 571
 572 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x21,0x01,0xff]
 573 0xfa,0x04,0x0a,0x30,0x01,0x21,0x01,0xff
 574
 575 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x2f,0x01,0xff]
 576 0xfa,0x04,0x0a,0x30,0x01,0x2f,0x01,0xff
 577
 578 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x50,0x01,0xff]
 579 0xfa,0x04,0x0a,0x30,0x01,0x50,0x01,0xff
 580
 581 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x5f,0x01,0x01]
 582 0xfa,0x04,0x0a,0x30,0x01,0x5f,0x01,0x01
 583
 584 # GFX11: v_lshlrev_b32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x60,0x01,0x13]
 585 0xfa,0x04,0x0a,0x30,0x01,0x60,0x01,0x13
 586
 587 # GFX11: v_lshlrev_b32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x31,0xff,0x6f,0x0d,0x30]
 588 0xfa,0xfe,0xff,0x31,0xff,0x6f,0x0d,0x30
 589
 590 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0xff]
 591 0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0xff
 592
 593 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xff]
 594 0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xff
 595
 596 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0xff]
 597 0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0xff
 598
 599 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0xff]
 600 0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0xff
 601
 602 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0xff]
 603 0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0xff
 604
 605 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0xff]
 606 0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0xff
 607
 608 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0xff]
 609 0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0xff
 610
 611 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0xff]
 612 0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0xff
 613
 614 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0xff]
 615 0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0xff
 616
 617 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0xff]
 618 0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0xff
 619
 620 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x50,0x01,0xff]
 621 0xfa,0x04,0x0a,0x32,0x01,0x50,0x01,0xff
 622
 623 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x5f,0x01,0x01]
 624 0xfa,0x04,0x0a,0x32,0x01,0x5f,0x01,0x01
 625
 626 # GFX11: v_lshrrev_b32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x32,0x01,0x60,0x01,0x13]
 627 0xfa,0x04,0x0a,0x32,0x01,0x60,0x01,0x13
 628
 629 # GFX11: v_lshrrev_b32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x33,0xff,0x6f,0x0d,0x30]
 630 0xfa,0xfe,0xff,0x33,0xff,0x6f,0x0d,0x30
 631
 632 # GFX11: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0xff]
 633 0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0xff
 634
 635 # GFX11: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xff]
 636 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xff
 637
 638 # GFX11: v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0xff]
 639 0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0xff
 640
 641 # GFX11: v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0xff]
 642 0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0xff
 643
 644 # GFX11: v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0xff]
 645 0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0xff
 646
 647 # GFX11: v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0xff]
 648 0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0xff
 649
 650 # GFX11: v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0xff]
 651 0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0xff
 652
 653 # GFX11: v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0xff]
 654 0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0xff
 655
 656 # GFX11: v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0xff]
 657 0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0xff
 658
 659 # GFX11: v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0xff]
 660 0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0xff
 661
 662 # GFX11: v_max_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x50,0x01,0xff]
 663 0xfa,0x04,0x0a,0x72,0x01,0x50,0x01,0xff
 664
 665 # GFX11: v_max_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x5f,0x01,0x01]
 666 0xfa,0x04,0x0a,0x72,0x01,0x5f,0x01,0x01
 667
 668 # GFX11: v_max_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x60,0x01,0x13]
 669 0xfa,0x04,0x0a,0x72,0x01,0x60,0x01,0x13
 670
 671 # GFX11: v_max_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x72,0x7f,0x6f,0xfd,0x30]
 672 0xfa,0xfe,0xfe,0x72,0x7f,0x6f,0xfd,0x30
 673
 674 # GFX11: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0xff]
 675 0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0xff
 676
 677 # GFX11: v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xff]
 678 0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xff
 679
 680 # GFX11: v_max_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x40,0x01,0xff]
 681 0xfa,0x04,0x0a,0x20,0x01,0x40,0x01,0xff
 682
 683 # GFX11: v_max_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x41,0x01,0xff]
 684 0xfa,0x04,0x0a,0x20,0x01,0x41,0x01,0xff
 685
 686 # GFX11: v_max_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x01,0x01,0xff]
 687 0xfa,0x04,0x0a,0x20,0x01,0x01,0x01,0xff
 688
 689 # GFX11: v_max_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x0f,0x01,0xff]
 690 0xfa,0x04,0x0a,0x20,0x01,0x0f,0x01,0xff
 691
 692 # GFX11: v_max_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x11,0x01,0xff]
 693 0xfa,0x04,0x0a,0x20,0x01,0x11,0x01,0xff
 694
 695 # GFX11: v_max_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1f,0x01,0xff]
 696 0xfa,0x04,0x0a,0x20,0x01,0x1f,0x01,0xff
 697
 698 # GFX11: v_max_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x21,0x01,0xff]
 699 0xfa,0x04,0x0a,0x20,0x01,0x21,0x01,0xff
 700
 701 # GFX11: v_max_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x2f,0x01,0xff]
 702 0xfa,0x04,0x0a,0x20,0x01,0x2f,0x01,0xff
 703
 704 # GFX11: v_max_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x50,0x01,0xff]
 705 0xfa,0x04,0x0a,0x20,0x01,0x50,0x01,0xff
 706
 707 # GFX11: v_max_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x5f,0x01,0x01]
 708 0xfa,0x04,0x0a,0x20,0x01,0x5f,0x01,0x01
 709
 710 # GFX11: v_max_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x60,0x01,0x13]
 711 0xfa,0x04,0x0a,0x20,0x01,0x60,0x01,0x13
 712
 713 # GFX11: v_max_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x21,0xff,0x6f,0xfd,0x30]
 714 0xfa,0xfe,0xff,0x21,0xff,0x6f,0xfd,0x30
 715
 716 # GFX11: v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0xff]
 717 0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0xff
 718
 719 # GFX11: v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xff]
 720 0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xff
 721
 722 # GFX11: v_max_i32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x40,0x01,0xff]
 723 0xfa,0x04,0x0a,0x24,0x01,0x40,0x01,0xff
 724
 725 # GFX11: v_max_i32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x41,0x01,0xff]
 726 0xfa,0x04,0x0a,0x24,0x01,0x41,0x01,0xff
 727
 728 # GFX11: v_max_i32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x01,0x01,0xff]
 729 0xfa,0x04,0x0a,0x24,0x01,0x01,0x01,0xff
 730
 731 # GFX11: v_max_i32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x0f,0x01,0xff]
 732 0xfa,0x04,0x0a,0x24,0x01,0x0f,0x01,0xff
 733
 734 # GFX11: v_max_i32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x11,0x01,0xff]
 735 0xfa,0x04,0x0a,0x24,0x01,0x11,0x01,0xff
 736
 737 # GFX11: v_max_i32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1f,0x01,0xff]
 738 0xfa,0x04,0x0a,0x24,0x01,0x1f,0x01,0xff
 739
 740 # GFX11: v_max_i32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x21,0x01,0xff]
 741 0xfa,0x04,0x0a,0x24,0x01,0x21,0x01,0xff
 742
 743 # GFX11: v_max_i32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x2f,0x01,0xff]
 744 0xfa,0x04,0x0a,0x24,0x01,0x2f,0x01,0xff
 745
 746 # GFX11: v_max_i32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x50,0x01,0xff]
 747 0xfa,0x04,0x0a,0x24,0x01,0x50,0x01,0xff
 748
 749 # GFX11: v_max_i32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x5f,0x01,0x01]
 750 0xfa,0x04,0x0a,0x24,0x01,0x5f,0x01,0x01
 751
 752 # GFX11: v_max_i32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x60,0x01,0x13]
 753 0xfa,0x04,0x0a,0x24,0x01,0x60,0x01,0x13
 754
 755 # GFX11: v_max_i32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x25,0xff,0x6f,0x0d,0x30]
 756 0xfa,0xfe,0xff,0x25,0xff,0x6f,0x0d,0x30
 757
 758 # GFX11: v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0xff]
 759 0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0xff
 760
 761 # GFX11: v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xff]
 762 0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xff
 763
 764 # GFX11: v_max_u32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x40,0x01,0xff]
 765 0xfa,0x04,0x0a,0x28,0x01,0x40,0x01,0xff
 766
 767 # GFX11: v_max_u32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x41,0x01,0xff]
 768 0xfa,0x04,0x0a,0x28,0x01,0x41,0x01,0xff
 769
 770 # GFX11: v_max_u32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x01,0x01,0xff]
 771 0xfa,0x04,0x0a,0x28,0x01,0x01,0x01,0xff
 772
 773 # GFX11: v_max_u32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x0f,0x01,0xff]
 774 0xfa,0x04,0x0a,0x28,0x01,0x0f,0x01,0xff
 775
 776 # GFX11: v_max_u32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x11,0x01,0xff]
 777 0xfa,0x04,0x0a,0x28,0x01,0x11,0x01,0xff
 778
 779 # GFX11: v_max_u32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1f,0x01,0xff]
 780 0xfa,0x04,0x0a,0x28,0x01,0x1f,0x01,0xff
 781
 782 # GFX11: v_max_u32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x21,0x01,0xff]
 783 0xfa,0x04,0x0a,0x28,0x01,0x21,0x01,0xff
 784
 785 # GFX11: v_max_u32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x2f,0x01,0xff]
 786 0xfa,0x04,0x0a,0x28,0x01,0x2f,0x01,0xff
 787
 788 # GFX11: v_max_u32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x50,0x01,0xff]
 789 0xfa,0x04,0x0a,0x28,0x01,0x50,0x01,0xff
 790
 791 # GFX11: v_max_u32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x5f,0x01,0x01]
 792 0xfa,0x04,0x0a,0x28,0x01,0x5f,0x01,0x01
 793
 794 # GFX11: v_max_u32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x60,0x01,0x13]
 795 0xfa,0x04,0x0a,0x28,0x01,0x60,0x01,0x13
 796
 797 # GFX11: v_max_u32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x29,0xff,0x6f,0x0d,0x30]
 798 0xfa,0xfe,0xff,0x29,0xff,0x6f,0x0d,0x30
 799
 800 # GFX11: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0xff]
 801 0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0xff
 802
 803 # GFX11: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xff]
 804 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xff
 805
 806 # GFX11: v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0xff]
 807 0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0xff
 808
 809 # GFX11: v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0xff]
 810 0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0xff
 811
 812 # GFX11: v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0xff]
 813 0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0xff
 814
 815 # GFX11: v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0xff]
 816 0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0xff
 817
 818 # GFX11: v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0xff]
 819 0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0xff
 820
 821 # GFX11: v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0xff]
 822 0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0xff
 823
 824 # GFX11: v_min_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x21,0x01,0xff]
 825 0xfa,0x04,0x0a,0x74,0x01,0x21,0x01,0xff
 826
 827 # GFX11: v_min_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x2f,0x01,0xff]
 828 0xfa,0x04,0x0a,0x74,0x01,0x2f,0x01,0xff
 829
 830 # GFX11: v_min_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x50,0x01,0xff]
 831 0xfa,0x04,0x0a,0x74,0x01,0x50,0x01,0xff
 832
 833 # GFX11: v_min_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x5f,0x01,0x01]
 834 0xfa,0x04,0x0a,0x74,0x01,0x5f,0x01,0x01
 835
 836 # GFX11: v_min_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x60,0x01,0x13]
 837 0xfa,0x04,0x0a,0x74,0x01,0x60,0x01,0x13
 838
 839 # GFX11: v_min_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x74,0x7f,0x6f,0xfd,0x30]
 840 0xfa,0xfe,0xfe,0x74,0x7f,0x6f,0xfd,0x30
 841
 842 # GFX11: v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0xff]
 843 0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0xff
 844
 845 # GFX11: v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xff]
 846 0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xff
 847
 848 # GFX11: v_min_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x40,0x01,0xff]
 849 0xfa,0x04,0x0a,0x1e,0x01,0x40,0x01,0xff
 850
 851 # GFX11: v_min_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x41,0x01,0xff]
 852 0xfa,0x04,0x0a,0x1e,0x01,0x41,0x01,0xff
 853
 854 # GFX11: v_min_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x01,0x01,0xff]
 855 0xfa,0x04,0x0a,0x1e,0x01,0x01,0x01,0xff
 856
 857 # GFX11: v_min_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x0f,0x01,0xff]
 858 0xfa,0x04,0x0a,0x1e,0x01,0x0f,0x01,0xff
 859
 860 # GFX11: v_min_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x11,0x01,0xff]
 861 0xfa,0x04,0x0a,0x1e,0x01,0x11,0x01,0xff
 862
 863 # GFX11: v_min_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1f,0x01,0xff]
 864 0xfa,0x04,0x0a,0x1e,0x01,0x1f,0x01,0xff
 865
 866 # GFX11: v_min_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x21,0x01,0xff]
 867 0xfa,0x04,0x0a,0x1e,0x01,0x21,0x01,0xff
 868
 869 # GFX11: v_min_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x2f,0x01,0xff]
 870 0xfa,0x04,0x0a,0x1e,0x01,0x2f,0x01,0xff
 871
 872 # GFX11: v_min_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x50,0x01,0xff]
 873 0xfa,0x04,0x0a,0x1e,0x01,0x50,0x01,0xff
 874
 875 # GFX11: v_min_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x5f,0x01,0x01]
 876 0xfa,0x04,0x0a,0x1e,0x01,0x5f,0x01,0x01
 877
 878 # GFX11: v_min_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x60,0x01,0x13]
 879 0xfa,0x04,0x0a,0x1e,0x01,0x60,0x01,0x13
 880
 881 # GFX11: v_min_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x1f,0xff,0x6f,0xfd,0x30]
 882 0xfa,0xfe,0xff,0x1f,0xff,0x6f,0xfd,0x30
 883
 884 # GFX11: v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0xff]
 885 0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0xff
 886
 887 # GFX11: v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xff]
 888 0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xff
 889
 890 # GFX11: v_min_i32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x40,0x01,0xff]
 891 0xfa,0x04,0x0a,0x22,0x01,0x40,0x01,0xff
 892
 893 # GFX11: v_min_i32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x41,0x01,0xff]
 894 0xfa,0x04,0x0a,0x22,0x01,0x41,0x01,0xff
 895
 896 # GFX11: v_min_i32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x01,0x01,0xff]
 897 0xfa,0x04,0x0a,0x22,0x01,0x01,0x01,0xff
 898
 899 # GFX11: v_min_i32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x0f,0x01,0xff]
 900 0xfa,0x04,0x0a,0x22,0x01,0x0f,0x01,0xff
 901
 902 # GFX11: v_min_i32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x11,0x01,0xff]
 903 0xfa,0x04,0x0a,0x22,0x01,0x11,0x01,0xff
 904
 905 # GFX11: v_min_i32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1f,0x01,0xff]
 906 0xfa,0x04,0x0a,0x22,0x01,0x1f,0x01,0xff
 907
 908 # GFX11: v_min_i32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x21,0x01,0xff]
 909 0xfa,0x04,0x0a,0x22,0x01,0x21,0x01,0xff
 910
 911 # GFX11: v_min_i32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x2f,0x01,0xff]
 912 0xfa,0x04,0x0a,0x22,0x01,0x2f,0x01,0xff
 913
 914 # GFX11: v_min_i32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x50,0x01,0xff]
 915 0xfa,0x04,0x0a,0x22,0x01,0x50,0x01,0xff
 916
 917 # GFX11: v_min_i32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x5f,0x01,0x01]
 918 0xfa,0x04,0x0a,0x22,0x01,0x5f,0x01,0x01
 919
 920 # GFX11: v_min_i32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x60,0x01,0x13]
 921 0xfa,0x04,0x0a,0x22,0x01,0x60,0x01,0x13
 922
 923 # GFX11: v_min_i32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x23,0xff,0x6f,0x0d,0x30]
 924 0xfa,0xfe,0xff,0x23,0xff,0x6f,0x0d,0x30
 925
 926 # GFX11: v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0xff]
 927 0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0xff
 928
 929 # GFX11: v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xff]
 930 0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xff
 931
 932 # GFX11: v_min_u32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x40,0x01,0xff]
 933 0xfa,0x04,0x0a,0x26,0x01,0x40,0x01,0xff
 934
 935 # GFX11: v_min_u32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x41,0x01,0xff]
 936 0xfa,0x04,0x0a,0x26,0x01,0x41,0x01,0xff
 937
 938 # GFX11: v_min_u32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x01,0x01,0xff]
 939 0xfa,0x04,0x0a,0x26,0x01,0x01,0x01,0xff
 940
 941 # GFX11: v_min_u32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x0f,0x01,0xff]
 942 0xfa,0x04,0x0a,0x26,0x01,0x0f,0x01,0xff
 943
 944 # GFX11: v_min_u32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x11,0x01,0xff]
 945 0xfa,0x04,0x0a,0x26,0x01,0x11,0x01,0xff
 946
 947 # GFX11: v_min_u32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1f,0x01,0xff]
 948 0xfa,0x04,0x0a,0x26,0x01,0x1f,0x01,0xff
 949
 950 # GFX11: v_min_u32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x21,0x01,0xff]
 951 0xfa,0x04,0x0a,0x26,0x01,0x21,0x01,0xff
 952
 953 # GFX11: v_min_u32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x2f,0x01,0xff]
 954 0xfa,0x04,0x0a,0x26,0x01,0x2f,0x01,0xff
 955
 956 # GFX11: v_min_u32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x50,0x01,0xff]
 957 0xfa,0x04,0x0a,0x26,0x01,0x50,0x01,0xff
 958
 959 # GFX11: v_min_u32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x5f,0x01,0x01]
 960 0xfa,0x04,0x0a,0x26,0x01,0x5f,0x01,0x01
 961
 962 # GFX11: v_min_u32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x60,0x01,0x13]
 963 0xfa,0x04,0x0a,0x26,0x01,0x60,0x01,0x13
 964
 965 # GFX11: v_min_u32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x27,0xff,0x6f,0x0d,0x30]
 966 0xfa,0xfe,0xff,0x27,0xff,0x6f,0x0d,0x30
 967
 968 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0xff]
 969 0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0xff
 970
 971 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xff]
 972 0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xff
 973
 974 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0xff]
 975 0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0xff
 976
 977 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0xff]
 978 0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0xff
 979
 980 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0xff]
 981 0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0xff
 982
 983 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0xff]
 984 0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0xff
 985
 986 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0xff]
 987 0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0xff
 988
 989 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0xff]
 990 0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0xff
 991
 992 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0xff]
 993 0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0xff
 994
 995 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0xff]
 996 0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0xff
 997
 998 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x50,0x01,0xff]
 999 0xfa,0x04,0x0a,0x0e,0x01,0x50,0x01,0xff
1000
1001 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x5f,0x01,0x01]
1002 0xfa,0x04,0x0a,0x0e,0x01,0x5f,0x01,0x01
1003
1004 # GFX11: v_mul_dx9_zero_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x60,0x01,0x13]
1005 0xfa,0x04,0x0a,0x0e,0x01,0x60,0x01,0x13
1006
1007 # GFX11: v_mul_dx9_zero_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x0f,0xff,0x6f,0xfd,0x30]
1008 0xfa,0xfe,0xff,0x0f,0xff,0x6f,0xfd,0x30
1009
1010 # GFX11: v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0xff]
1011 0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0xff
1012
1013 # GFX11: v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xff]
1014 0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xff
1015
1016 # GFX11: v_mul_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0xff]
1017 0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0xff
1018
1019 # GFX11: v_mul_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0xff]
1020 0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0xff
1021
1022 # GFX11: v_mul_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0xff]
1023 0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0xff
1024
1025 # GFX11: v_mul_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0xff]
1026 0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0xff
1027
1028 # GFX11: v_mul_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0xff]
1029 0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0xff
1030
1031 # GFX11: v_mul_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0xff]
1032 0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0xff
1033
1034 # GFX11: v_mul_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0xff]
1035 0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0xff
1036
1037 # GFX11: v_mul_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0xff]
1038 0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0xff
1039
1040 # GFX11: v_mul_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x50,0x01,0xff]
1041 0xfa,0x04,0x0a,0x6a,0x01,0x50,0x01,0xff
1042
1043 # GFX11: v_mul_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x5f,0x01,0x01]
1044 0xfa,0x04,0x0a,0x6a,0x01,0x5f,0x01,0x01
1045
1046 # GFX11: v_mul_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x60,0x01,0x13]
1047 0xfa,0x04,0x0a,0x6a,0x01,0x60,0x01,0x13
1048
1049 # GFX11: v_mul_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x6a,0x7f,0x6f,0xfd,0x30]
1050 0xfa,0xfe,0xfe,0x6a,0x7f,0x6f,0xfd,0x30
1051
1052 # GFX11: v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0xff]
1053 0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0xff
1054
1055 # GFX11: v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xff]
1056 0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xff
1057
1058 # GFX11: v_mul_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x40,0x01,0xff]
1059 0xfa,0x04,0x0a,0x10,0x01,0x40,0x01,0xff
1060
1061 # GFX11: v_mul_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x41,0x01,0xff]
1062 0xfa,0x04,0x0a,0x10,0x01,0x41,0x01,0xff
1063
1064 # GFX11: v_mul_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x01,0x01,0xff]
1065 0xfa,0x04,0x0a,0x10,0x01,0x01,0x01,0xff
1066
1067 # GFX11: v_mul_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x0f,0x01,0xff]
1068 0xfa,0x04,0x0a,0x10,0x01,0x0f,0x01,0xff
1069
1070 # GFX11: v_mul_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x11,0x01,0xff]
1071 0xfa,0x04,0x0a,0x10,0x01,0x11,0x01,0xff
1072
1073 # GFX11: v_mul_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1f,0x01,0xff]
1074 0xfa,0x04,0x0a,0x10,0x01,0x1f,0x01,0xff
1075
1076 # GFX11: v_mul_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x21,0x01,0xff]
1077 0xfa,0x04,0x0a,0x10,0x01,0x21,0x01,0xff
1078
1079 # GFX11: v_mul_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x2f,0x01,0xff]
1080 0xfa,0x04,0x0a,0x10,0x01,0x2f,0x01,0xff
1081
1082 # GFX11: v_mul_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x50,0x01,0xff]
1083 0xfa,0x04,0x0a,0x10,0x01,0x50,0x01,0xff
1084
1085 # GFX11: v_mul_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x5f,0x01,0x01]
1086 0xfa,0x04,0x0a,0x10,0x01,0x5f,0x01,0x01
1087
1088 # GFX11: v_mul_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x60,0x01,0x13]
1089 0xfa,0x04,0x0a,0x10,0x01,0x60,0x01,0x13
1090
1091 # GFX11: v_mul_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x11,0xff,0x6f,0xfd,0x30]
1092 0xfa,0xfe,0xff,0x11,0xff,0x6f,0xfd,0x30
1093
1094 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0xff]
1095 0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0xff
1096
1097 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xff]
1098 0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xff
1099
1100 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x40,0x01,0xff]
1101 0xfa,0x04,0x0a,0x14,0x01,0x40,0x01,0xff
1102
1103 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x41,0x01,0xff]
1104 0xfa,0x04,0x0a,0x14,0x01,0x41,0x01,0xff
1105
1106 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x01,0x01,0xff]
1107 0xfa,0x04,0x0a,0x14,0x01,0x01,0x01,0xff
1108
1109 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x0f,0x01,0xff]
1110 0xfa,0x04,0x0a,0x14,0x01,0x0f,0x01,0xff
1111
1112 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x11,0x01,0xff]
1113 0xfa,0x04,0x0a,0x14,0x01,0x11,0x01,0xff
1114
1115 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1f,0x01,0xff]
1116 0xfa,0x04,0x0a,0x14,0x01,0x1f,0x01,0xff
1117
1118 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x21,0x01,0xff]
1119 0xfa,0x04,0x0a,0x14,0x01,0x21,0x01,0xff
1120
1121 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x2f,0x01,0xff]
1122 0xfa,0x04,0x0a,0x14,0x01,0x2f,0x01,0xff
1123
1124 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x50,0x01,0xff]
1125 0xfa,0x04,0x0a,0x14,0x01,0x50,0x01,0xff
1126
1127 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x5f,0x01,0x01]
1128 0xfa,0x04,0x0a,0x14,0x01,0x5f,0x01,0x01
1129
1130 # GFX11: v_mul_hi_i32_i24_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x60,0x01,0x13]
1131 0xfa,0x04,0x0a,0x14,0x01,0x60,0x01,0x13
1132
1133 # GFX11: v_mul_hi_i32_i24_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x15,0xff,0x6f,0x0d,0x30]
1134 0xfa,0xfe,0xff,0x15,0xff,0x6f,0x0d,0x30
1135
1136 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0xff]
1137 0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0xff
1138
1139 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xff]
1140 0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xff
1141
1142 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x40,0x01,0xff]
1143 0xfa,0x04,0x0a,0x18,0x01,0x40,0x01,0xff
1144
1145 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x41,0x01,0xff]
1146 0xfa,0x04,0x0a,0x18,0x01,0x41,0x01,0xff
1147
1148 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x01,0x01,0xff]
1149 0xfa,0x04,0x0a,0x18,0x01,0x01,0x01,0xff
1150
1151 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x0f,0x01,0xff]
1152 0xfa,0x04,0x0a,0x18,0x01,0x0f,0x01,0xff
1153
1154 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x11,0x01,0xff]
1155 0xfa,0x04,0x0a,0x18,0x01,0x11,0x01,0xff
1156
1157 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1f,0x01,0xff]
1158 0xfa,0x04,0x0a,0x18,0x01,0x1f,0x01,0xff
1159
1160 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x21,0x01,0xff]
1161 0xfa,0x04,0x0a,0x18,0x01,0x21,0x01,0xff
1162
1163 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x2f,0x01,0xff]
1164 0xfa,0x04,0x0a,0x18,0x01,0x2f,0x01,0xff
1165
1166 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x50,0x01,0xff]
1167 0xfa,0x04,0x0a,0x18,0x01,0x50,0x01,0xff
1168
1169 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x5f,0x01,0x01]
1170 0xfa,0x04,0x0a,0x18,0x01,0x5f,0x01,0x01
1171
1172 # GFX11: v_mul_hi_u32_u24_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x60,0x01,0x13]
1173 0xfa,0x04,0x0a,0x18,0x01,0x60,0x01,0x13
1174
1175 # GFX11: v_mul_hi_u32_u24_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x19,0xff,0x6f,0x0d,0x30]
1176 0xfa,0xfe,0xff,0x19,0xff,0x6f,0x0d,0x30
1177
1178 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0xff]
1179 0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0xff
1180
1181 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xff]
1182 0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xff
1183
1184 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x40,0x01,0xff]
1185 0xfa,0x04,0x0a,0x12,0x01,0x40,0x01,0xff
1186
1187 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x41,0x01,0xff]
1188 0xfa,0x04,0x0a,0x12,0x01,0x41,0x01,0xff
1189
1190 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x01,0x01,0xff]
1191 0xfa,0x04,0x0a,0x12,0x01,0x01,0x01,0xff
1192
1193 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x0f,0x01,0xff]
1194 0xfa,0x04,0x0a,0x12,0x01,0x0f,0x01,0xff
1195
1196 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x11,0x01,0xff]
1197 0xfa,0x04,0x0a,0x12,0x01,0x11,0x01,0xff
1198
1199 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1f,0x01,0xff]
1200 0xfa,0x04,0x0a,0x12,0x01,0x1f,0x01,0xff
1201
1202 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x21,0x01,0xff]
1203 0xfa,0x04,0x0a,0x12,0x01,0x21,0x01,0xff
1204
1205 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x2f,0x01,0xff]
1206 0xfa,0x04,0x0a,0x12,0x01,0x2f,0x01,0xff
1207
1208 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x50,0x01,0xff]
1209 0xfa,0x04,0x0a,0x12,0x01,0x50,0x01,0xff
1210
1211 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x5f,0x01,0x01]
1212 0xfa,0x04,0x0a,0x12,0x01,0x5f,0x01,0x01
1213
1214 # GFX11: v_mul_i32_i24_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x60,0x01,0x13]
1215 0xfa,0x04,0x0a,0x12,0x01,0x60,0x01,0x13
1216
1217 # GFX11: v_mul_i32_i24_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x13,0xff,0x6f,0x0d,0x30]
1218 0xfa,0xfe,0xff,0x13,0xff,0x6f,0x0d,0x30
1219
1220 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0xff]
1221 0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0xff
1222
1223 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xff]
1224 0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xff
1225
1226 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x40,0x01,0xff]
1227 0xfa,0x04,0x0a,0x16,0x01,0x40,0x01,0xff
1228
1229 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x41,0x01,0xff]
1230 0xfa,0x04,0x0a,0x16,0x01,0x41,0x01,0xff
1231
1232 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x01,0x01,0xff]
1233 0xfa,0x04,0x0a,0x16,0x01,0x01,0x01,0xff
1234
1235 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x0f,0x01,0xff]
1236 0xfa,0x04,0x0a,0x16,0x01,0x0f,0x01,0xff
1237
1238 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x11,0x01,0xff]
1239 0xfa,0x04,0x0a,0x16,0x01,0x11,0x01,0xff
1240
1241 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1f,0x01,0xff]
1242 0xfa,0x04,0x0a,0x16,0x01,0x1f,0x01,0xff
1243
1244 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x21,0x01,0xff]
1245 0xfa,0x04,0x0a,0x16,0x01,0x21,0x01,0xff
1246
1247 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x2f,0x01,0xff]
1248 0xfa,0x04,0x0a,0x16,0x01,0x2f,0x01,0xff
1249
1250 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x50,0x01,0xff]
1251 0xfa,0x04,0x0a,0x16,0x01,0x50,0x01,0xff
1252
1253 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x5f,0x01,0x01]
1254 0xfa,0x04,0x0a,0x16,0x01,0x5f,0x01,0x01
1255
1256 # GFX11: v_mul_u32_u24_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x60,0x01,0x13]
1257 0xfa,0x04,0x0a,0x16,0x01,0x60,0x01,0x13
1258
1259 # GFX11: v_mul_u32_u24_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x17,0xff,0x6f,0x0d,0x30]
1260 0xfa,0xfe,0xff,0x17,0xff,0x6f,0x0d,0x30
1261
1262 # GFX11: v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0xff]
1263 0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0xff
1264
1265 # GFX11: v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xff]
1266 0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xff
1267
1268 # GFX11: v_or_b32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0xff]
1269 0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0xff
1270
1271 # GFX11: v_or_b32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0xff]
1272 0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0xff
1273
1274 # GFX11: v_or_b32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0xff]
1275 0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0xff
1276
1277 # GFX11: v_or_b32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0xff]
1278 0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0xff
1279
1280 # GFX11: v_or_b32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0xff]
1281 0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0xff
1282
1283 # GFX11: v_or_b32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0xff]
1284 0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0xff
1285
1286 # GFX11: v_or_b32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0xff]
1287 0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0xff
1288
1289 # GFX11: v_or_b32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0xff]
1290 0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0xff
1291
1292 # GFX11: v_or_b32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x50,0x01,0xff]
1293 0xfa,0x04,0x0a,0x38,0x01,0x50,0x01,0xff
1294
1295 # GFX11: v_or_b32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x5f,0x01,0x01]
1296 0xfa,0x04,0x0a,0x38,0x01,0x5f,0x01,0x01
1297
1298 # GFX11: v_or_b32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x60,0x01,0x13]
1299 0xfa,0x04,0x0a,0x38,0x01,0x60,0x01,0x13
1300
1301 # GFX11: v_or_b32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x39,0xff,0x6f,0x0d,0x30]
1302 0xfa,0xfe,0xff,0x39,0xff,0x6f,0x0d,0x30
1303
1304 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0xff]
1305 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0xff]
1306 0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0xff
1307
1308 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xff]
1309 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xff]
1310 0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xff
1311
1312 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0xff]
1313 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0xff]
1314 0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0xff
1315
1316 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0xff]
1317 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0xff]
1318 0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0xff
1319
1320 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0xff]
1321 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0xff]
1322 0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0xff
1323
1324 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0xff]
1325 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0xff]
1326 0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0xff
1327
1328 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0xff]
1329 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0xff]
1330 0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0xff
1331
1332 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0xff]
1333 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0xff]
1334 0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0xff
1335
1336 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0xff]
1337 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0xff]
1338 0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0xff
1339
1340 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0xff]
1341 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0xff]
1342 0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0xff
1343
1344 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x50,0x01,0xff]
1345 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x50,0x01,0xff]
1346 0xfa,0x04,0x0a,0x42,0x01,0x50,0x01,0xff
1347
1348 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x5f,0x01,0x01]
1349 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x5f,0x01,0x01]
1350 0xfa,0x04,0x0a,0x42,0x01,0x5f,0x01,0x01
1351
1352 # W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x60,0x01,0x13]
1353 # W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x42,0x01,0x60,0x01,0x13]
1354 0xfa,0x04,0x0a,0x42,0x01,0x60,0x01,0x13
1355
1356 # W32: v_sub_co_ci_u32_dpp v255, vcc_lo, v255, v255, vcc_lo row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x43,0xff,0x6f,0x0d,0x30]
1357 # W64: v_sub_co_ci_u32_dpp v255, vcc, v255, v255, vcc row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x43,0xff,0x6f,0x0d,0x30]
1358 0xfa,0xfe,0xff,0x43,0xff,0x6f,0x0d,0x30
1359
1360 # GFX11: v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0xff]
1361 0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0xff
1362
1363 # GFX11: v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xff]
1364 0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xff
1365
1366 # GFX11: v_sub_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0xff]
1367 0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0xff
1368
1369 # GFX11: v_sub_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0xff]
1370 0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0xff
1371
1372 # GFX11: v_sub_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0xff]
1373 0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0xff
1374
1375 # GFX11: v_sub_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0xff]
1376 0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0xff
1377
1378 # GFX11: v_sub_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0xff]
1379 0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0xff
1380
1381 # GFX11: v_sub_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0xff]
1382 0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0xff
1383
1384 # GFX11: v_sub_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0xff]
1385 0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0xff
1386
1387 # GFX11: v_sub_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0xff]
1388 0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0xff
1389
1390 # GFX11: v_sub_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x50,0x01,0xff]
1391 0xfa,0x04,0x0a,0x66,0x01,0x50,0x01,0xff
1392
1393 # GFX11: v_sub_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x5f,0x01,0x01]
1394 0xfa,0x04,0x0a,0x66,0x01,0x5f,0x01,0x01
1395
1396 # GFX11: v_sub_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x60,0x01,0x13]
1397 0xfa,0x04,0x0a,0x66,0x01,0x60,0x01,0x13
1398
1399 # GFX11: v_sub_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x66,0x7f,0x6f,0xfd,0x30]
1400 0xfa,0xfe,0xfe,0x66,0x7f,0x6f,0xfd,0x30
1401
1402 # GFX11: v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0xff]
1403 0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0xff
1404
1405 # GFX11: v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xff]
1406 0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xff
1407
1408 # GFX11: v_sub_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x40,0x01,0xff]
1409 0xfa,0x04,0x0a,0x08,0x01,0x40,0x01,0xff
1410
1411 # GFX11: v_sub_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x41,0x01,0xff]
1412 0xfa,0x04,0x0a,0x08,0x01,0x41,0x01,0xff
1413
1414 # GFX11: v_sub_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x01,0x01,0xff]
1415 0xfa,0x04,0x0a,0x08,0x01,0x01,0x01,0xff
1416
1417 # GFX11: v_sub_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x0f,0x01,0xff]
1418 0xfa,0x04,0x0a,0x08,0x01,0x0f,0x01,0xff
1419
1420 # GFX11: v_sub_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x11,0x01,0xff]
1421 0xfa,0x04,0x0a,0x08,0x01,0x11,0x01,0xff
1422
1423 # GFX11: v_sub_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1f,0x01,0xff]
1424 0xfa,0x04,0x0a,0x08,0x01,0x1f,0x01,0xff
1425
1426 # GFX11: v_sub_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x21,0x01,0xff]
1427 0xfa,0x04,0x0a,0x08,0x01,0x21,0x01,0xff
1428
1429 # GFX11: v_sub_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x2f,0x01,0xff]
1430 0xfa,0x04,0x0a,0x08,0x01,0x2f,0x01,0xff
1431
1432 # GFX11: v_sub_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x50,0x01,0xff]
1433 0xfa,0x04,0x0a,0x08,0x01,0x50,0x01,0xff
1434
1435 # GFX11: v_sub_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x5f,0x01,0x01]
1436 0xfa,0x04,0x0a,0x08,0x01,0x5f,0x01,0x01
1437
1438 # GFX11: v_sub_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x60,0x01,0x13]
1439 0xfa,0x04,0x0a,0x08,0x01,0x60,0x01,0x13
1440
1441 # GFX11: v_sub_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x09,0xff,0x6f,0xfd,0x30]
1442 0xfa,0xfe,0xff,0x09,0xff,0x6f,0xfd,0x30
1443
1444 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0xff]
1445 0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0xff
1446
1447 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xff]
1448 0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xff
1449
1450 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0xff]
1451 0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0xff
1452
1453 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0xff]
1454 0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0xff
1455
1456 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0xff]
1457 0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0xff
1458
1459 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0xff]
1460 0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0xff
1461
1462 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0xff]
1463 0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0xff
1464
1465 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0xff]
1466 0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0xff
1467
1468 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0xff]
1469 0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0xff
1470
1471 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0xff]
1472 0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0xff
1473
1474 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x50,0x01,0xff]
1475 0xfa,0x04,0x0a,0x4c,0x01,0x50,0x01,0xff
1476
1477 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x5f,0x01,0x01]
1478 0xfa,0x04,0x0a,0x4c,0x01,0x5f,0x01,0x01
1479
1480 # GFX11: v_sub_nc_u32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x60,0x01,0x13]
1481 0xfa,0x04,0x0a,0x4c,0x01,0x60,0x01,0x13
1482
1483 # GFX11: v_sub_nc_u32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x4d,0xff,0x6f,0x0d,0x30]
1484 0xfa,0xfe,0xff,0x4d,0xff,0x6f,0x0d,0x30
1485
1486 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0xff]
1487 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0xff]
1488 0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0xff
1489
1490 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xff]
1491 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xff]
1492 0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xff
1493
1494 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0xff]
1495 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0xff]
1496 0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0xff
1497
1498 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0xff]
1499 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0xff]
1500 0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0xff
1501
1502 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0xff]
1503 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0xff]
1504 0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0xff
1505
1506 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0xff]
1507 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0xff]
1508 0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0xff
1509
1510 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0xff]
1511 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0xff]
1512 0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0xff
1513
1514 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0xff]
1515 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0xff]
1516 0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0xff
1517
1518 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0xff]
1519 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0xff]
1520 0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0xff
1521
1522 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0xff]
1523 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0xff]
1524 0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0xff
1525
1526 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x50,0x01,0xff]
1527 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x50,0x01,0xff]
1528 0xfa,0x04,0x0a,0x44,0x01,0x50,0x01,0xff
1529
1530 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x5f,0x01,0x01]
1531 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x5f,0x01,0x01]
1532 0xfa,0x04,0x0a,0x44,0x01,0x5f,0x01,0x01
1533
1534 # W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x60,0x01,0x13]
1535 # W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x44,0x01,0x60,0x01,0x13]
1536 0xfa,0x04,0x0a,0x44,0x01,0x60,0x01,0x13
1537
1538 # W32: v_subrev_co_ci_u32_dpp v255, vcc_lo, v255, v255, vcc_lo row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x45,0xff,0x6f,0x0d,0x30]
1539 # W64: v_subrev_co_ci_u32_dpp v255, vcc, v255, v255, vcc row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x45,0xff,0x6f,0x0d,0x30]
1540 0xfa,0xfe,0xff,0x45,0xff,0x6f,0x0d,0x30
1541
1542 # GFX11: v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0xff]
1543 0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0xff
1544
1545 # GFX11: v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xff]
1546 0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xff
1547
1548 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0xff]
1549 0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0xff
1550
1551 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0xff]
1552 0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0xff
1553
1554 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0xff]
1555 0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0xff
1556
1557 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0xff]
1558 0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0xff
1559
1560 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0xff]
1561 0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0xff
1562
1563 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0xff]
1564 0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0xff
1565
1566 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0xff]
1567 0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0xff
1568
1569 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0xff]
1570 0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0xff
1571
1572 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x50,0x01,0xff]
1573 0xfa,0x04,0x0a,0x68,0x01,0x50,0x01,0xff
1574
1575 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x5f,0x01,0x01]
1576 0xfa,0x04,0x0a,0x68,0x01,0x5f,0x01,0x01
1577
1578 # GFX11: v_subrev_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x60,0x01,0x13]
1579 0xfa,0x04,0x0a,0x68,0x01,0x60,0x01,0x13
1580
1581 # GFX11: v_subrev_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x68,0x7f,0x6f,0xfd,0x30]
1582 0xfa,0xfe,0xfe,0x68,0x7f,0x6f,0xfd,0x30
1583
1584 # GFX11: v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0xff]
1585 0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0xff
1586
1587 # GFX11: v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xff]
1588 0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xff
1589
1590 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x40,0x01,0xff]
1591 0xfa,0x04,0x0a,0x0a,0x01,0x40,0x01,0xff
1592
1593 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x41,0x01,0xff]
1594 0xfa,0x04,0x0a,0x0a,0x01,0x41,0x01,0xff
1595
1596 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x01,0x01,0xff]
1597 0xfa,0x04,0x0a,0x0a,0x01,0x01,0x01,0xff
1598
1599 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x0f,0x01,0xff]
1600 0xfa,0x04,0x0a,0x0a,0x01,0x0f,0x01,0xff
1601
1602 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x11,0x01,0xff]
1603 0xfa,0x04,0x0a,0x0a,0x01,0x11,0x01,0xff
1604
1605 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1f,0x01,0xff]
1606 0xfa,0x04,0x0a,0x0a,0x01,0x1f,0x01,0xff
1607
1608 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x21,0x01,0xff]
1609 0xfa,0x04,0x0a,0x0a,0x01,0x21,0x01,0xff
1610
1611 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x2f,0x01,0xff]
1612 0xfa,0x04,0x0a,0x0a,0x01,0x2f,0x01,0xff
1613
1614 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x50,0x01,0xff]
1615 0xfa,0x04,0x0a,0x0a,0x01,0x50,0x01,0xff
1616
1617 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x5f,0x01,0x01]
1618 0xfa,0x04,0x0a,0x0a,0x01,0x5f,0x01,0x01
1619
1620 # GFX11: v_subrev_f32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x60,0x01,0x13]
1621 0xfa,0x04,0x0a,0x0a,0x01,0x60,0x01,0x13
1622
1623 # GFX11: v_subrev_f32_dpp v255, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x0b,0xff,0x6f,0xfd,0x30]
1624 0xfa,0xfe,0xff,0x0b,0xff,0x6f,0xfd,0x30
1625
1626 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0xff]
1627 0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0xff
1628
1629 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xff]
1630 0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xff
1631
1632 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0xff]
1633 0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0xff
1634
1635 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0xff]
1636 0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0xff
1637
1638 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0xff]
1639 0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0xff
1640
1641 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0xff]
1642 0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0xff
1643
1644 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0xff]
1645 0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0xff
1646
1647 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0xff]
1648 0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0xff
1649
1650 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0xff]
1651 0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0xff
1652
1653 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0xff]
1654 0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0xff
1655
1656 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x50,0x01,0xff]
1657 0xfa,0x04,0x0a,0x4e,0x01,0x50,0x01,0xff
1658
1659 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x5f,0x01,0x01]
1660 0xfa,0x04,0x0a,0x4e,0x01,0x5f,0x01,0x01
1661
1662 # GFX11: v_subrev_nc_u32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x60,0x01,0x13]
1663 0xfa,0x04,0x0a,0x4e,0x01,0x60,0x01,0x13
1664
1665 # GFX11: v_subrev_nc_u32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x4f,0xff,0x6f,0x0d,0x30]
1666 0xfa,0xfe,0xff,0x4f,0xff,0x6f,0x0d,0x30
1667
1668 # GFX11: v_xnor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0xff]
1669 0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0xff
1670
1671 # GFX11: v_xnor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xff]
1672 0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xff
1673
1674 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0xff]
1675 0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0xff
1676
1677 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0xff]
1678 0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0xff
1679
1680 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0xff]
1681 0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0xff
1682
1683 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0xff]
1684 0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0xff
1685
1686 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0xff]
1687 0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0xff
1688
1689 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0xff]
1690 0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0xff
1691
1692 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0xff]
1693 0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0xff
1694
1695 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0xff]
1696 0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0xff
1697
1698 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x50,0x01,0xff]
1699 0xfa,0x04,0x0a,0x3c,0x01,0x50,0x01,0xff
1700
1701 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x5f,0x01,0x01]
1702 0xfa,0x04,0x0a,0x3c,0x01,0x5f,0x01,0x01
1703
1704 # GFX11: v_xnor_b32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x60,0x01,0x13]
1705 0xfa,0x04,0x0a,0x3c,0x01,0x60,0x01,0x13
1706
1707 # GFX11: v_xnor_b32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x3d,0xff,0x6f,0x0d,0x30]
1708 0xfa,0xfe,0xff,0x3d,0xff,0x6f,0x0d,0x30
1709
1710 # GFX11: v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0xff]
1711 0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0xff
1712
1713 # GFX11: v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xff]
1714 0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xff
1715
1716 # GFX11: v_xor_b32_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0xff]
1717 0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0xff
1718
1719 # GFX11: v_xor_b32_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0xff]
1720 0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0xff
1721
1722 # GFX11: v_xor_b32_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0xff]
1723 0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0xff
1724
1725 # GFX11: v_xor_b32_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0xff]
1726 0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0xff
1727
1728 # GFX11: v_xor_b32_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0xff]
1729 0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0xff
1730
1731 # GFX11: v_xor_b32_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0xff]
1732 0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0xff
1733
1734 # GFX11: v_xor_b32_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0xff]
1735 0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0xff
1736
1737 # GFX11: v_xor_b32_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0xff]
1738 0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0xff
1739
1740 # GFX11: v_xor_b32_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x50,0x01,0xff]
1741 0xfa,0x04,0x0a,0x3a,0x01,0x50,0x01,0xff
1742
1743 # GFX11: v_xor_b32_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x5f,0x01,0x01]
1744 0xfa,0x04,0x0a,0x3a,0x01,0x5f,0x01,0x01
1745
1746 # GFX11: v_xor_b32_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x60,0x01,0x13]
1747 0xfa,0x04,0x0a,0x3a,0x01,0x60,0x01,0x13
1748
1749 # GFX11: v_xor_b32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0xff,0x3b,0xff,0x6f,0x0d,0x30]
1750 0xfa,0xfe,0xff,0x3b,0xff,0x6f,0x0d,0x30