Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / test / MC / Disassembler / AMDGPU / gfx8_vintrp.txt
blob0400893dba456dff2a1c86ac4e7536eb7a0d20b8
1 # RUN: llvm-mc -triple=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
2 # RUN: llvm-mc -triple=amdgcn -mcpu=fiji -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
4 # CHECK: v_interp_p1_f32_e32 v5, v1, attr0.x     ; encoding: [0x01,0x00,0x14,0xd4]
5 0x01,0x00,0x14,0xd4
7 # CHECK: v_interp_p1_f32_e32 v255, v1, attr0.x   ; encoding: [0x01,0x00,0xfc,0xd7]
8 0x01,0x00,0xfc,0xd7
10 # CHECK: v_interp_p1_f32_e32 v5, v255, attr0.x   ; encoding: [0xff,0x00,0x14,0xd4]
11 0xff,0x00,0x14,0xd4
13 # CHECK: v_interp_p1_f32_e32 v5, v1, attr1.x     ; encoding: [0x01,0x04,0x14,0xd4]
14 0x01,0x04,0x14,0xd4
16 # CHECK: v_interp_p1_f32_e32 v5, v1, attr31.x    ; encoding: [0x01,0x7c,0x14,0xd4]
17 0x01,0x7c,0x14,0xd4
19 # CHECK: v_interp_p1_f32_e32 v5, v1, attr32.x    ; encoding: [0x01,0x80,0x14,0xd4]
20 0x01,0x80,0x14,0xd4
22 # CHECK: v_interp_p1_f32_e32 v5, v1, attr0.y     ; encoding: [0x01,0x01,0x14,0xd4]
23 0x01,0x01,0x14,0xd4
25 # CHECK: v_interp_p1_f32_e32 v5, v1, attr0.z     ; encoding: [0x01,0x02,0x14,0xd4]
26 0x01,0x02,0x14,0xd4
28 # CHECK: v_interp_p1_f32_e32 v5, v1, attr0.w     ; encoding: [0x01,0x03,0x14,0xd4]
29 0x01,0x03,0x14,0xd4
31 # CHECK: v_interp_p2_f32_e32 v5, v1, attr0.x     ; encoding: [0x01,0x00,0x15,0xd4]
32 0x01,0x00,0x15,0xd4
34 # CHECK: v_interp_p2_f32_e32 v255, v1, attr0.x   ; encoding: [0x01,0x00,0xfd,0xd7]
35 0x01,0x00,0xfd,0xd7
37 # CHECK: v_interp_p2_f32_e32 v5, v255, attr0.x   ; encoding: [0xff,0x00,0x15,0xd4]
38 0xff,0x00,0x15,0xd4
40 # CHECK: v_interp_p2_f32_e32 v5, v1, attr1.x     ; encoding: [0x01,0x04,0x15,0xd4]
41 0x01,0x04,0x15,0xd4
43 # CHECK: v_interp_p2_f32_e32 v5, v1, attr31.x    ; encoding: [0x01,0x7c,0x15,0xd4]
44 0x01,0x7c,0x15,0xd4
46 # CHECK: v_interp_p2_f32_e32 v5, v1, attr32.x    ; encoding: [0x01,0x80,0x15,0xd4]
47 0x01,0x80,0x15,0xd4
49 # CHECK: v_interp_p2_f32_e32 v5, v1, attr0.y     ; encoding: [0x01,0x01,0x15,0xd4]
50 0x01,0x01,0x15,0xd4
52 # CHECK: v_interp_p2_f32_e32 v5, v1, attr0.z     ; encoding: [0x01,0x02,0x15,0xd4]
53 0x01,0x02,0x15,0xd4
55 # CHECK: v_interp_p2_f32_e32 v5, v1, attr0.w     ; encoding: [0x01,0x03,0x15,0xd4]
56 0x01,0x03,0x15,0xd4
58 # CHECK: v_interp_mov_f32_e32 v5, p10, attr0.x   ; encoding: [0x00,0x00,0x16,0xd4]
59 0x00,0x00,0x16,0xd4
61 # CHECK: v_interp_mov_f32_e32 v255, p10, attr0.x ; encoding: [0x00,0x00,0xfe,0xd7]
62 0x00,0x00,0xfe,0xd7
64 # CHECK: v_interp_mov_f32_e32 v5, p20, attr0.x   ; encoding: [0x01,0x00,0x16,0xd4]
65 0x01,0x00,0x16,0xd4
67 # CHECK: v_interp_mov_f32_e32 v5, p0, attr0.x    ; encoding: [0x02,0x00,0x16,0xd4]
68 0x02,0x00,0x16,0xd4
70 # CHECK: v_interp_mov_f32_e32 v5, p10, attr1.x   ; encoding: [0x00,0x04,0x16,0xd4]
71 0x00,0x04,0x16,0xd4
73 # CHECK: v_interp_mov_f32_e32 v5, p10, attr31.x  ; encoding: [0x00,0x7c,0x16,0xd4]
74 0x00,0x7c,0x16,0xd4
76 # CHECK: v_interp_mov_f32_e32 v5, p10, attr32.x  ; encoding: [0x00,0x80,0x16,0xd4]
77 0x00,0x80,0x16,0xd4
79 # CHECK: v_interp_mov_f32_e32 v5, p10, attr0.y   ; encoding: [0x00,0x01,0x16,0xd4]
80 0x00,0x01,0x16,0xd4
82 # CHECK: v_interp_mov_f32_e32 v5, p10, attr0.z   ; encoding: [0x00,0x02,0x16,0xd4]
83 0x00,0x02,0x16,0xd4
85 # CHECK: v_interp_mov_f32_e32 v5, p10, attr0.w   ; encoding: [0x00,0x03,0x16,0xd4]
86 0x00,0x03,0x16,0xd4
88 # CHECK: v_interp_mov_f32_e32 v7, invalid_param_212, attr16.y ; encoding: [0xd4,0x41,0x1e,0xd4]
89 0xd4 0x41 0x1e 0xd4
91 # CHECK: v_interp_mov_f32_e32 v7, p10, attr16.y  ; encoding: [0x00,0x41,0x1e,0xd4]
92 0x00 0x41 0x1e 0xd4