llvm/test/MC/Disassembler/AMDGPU/gfx9_sopk.txt

   1 # RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck -strict-whitespace %s
   2
   3 # CHECK: s_movk_i32 s5, 0x3141                   ; encoding: [0x41,0x31,0x05,0xb0]
   4 0x41,0x31,0x05,0xb0
   5
   6 # CHECK: s_movk_i32 s101, 0x3141                 ; encoding: [0x41,0x31,0x65,0xb0]
   7 0x41,0x31,0x65,0xb0
   8
   9 # CHECK: s_movk_i32 flat_scratch_lo, 0x3141      ; encoding: [0x41,0x31,0x66,0xb0]
  10 0x41,0x31,0x66,0xb0
  11
  12 # CHECK: s_movk_i32 flat_scratch_hi, 0x3141      ; encoding: [0x41,0x31,0x67,0xb0]
  13 0x41,0x31,0x67,0xb0
  14
  15 # CHECK: s_movk_i32 vcc_lo, 0x3141               ; encoding: [0x41,0x31,0x6a,0xb0]
  16 0x41,0x31,0x6a,0xb0
  17
  18 # CHECK: s_movk_i32 vcc_hi, 0x3141               ; encoding: [0x41,0x31,0x6b,0xb0]
  19 0x41,0x31,0x6b,0xb0
  20
  21 # CHECK: s_movk_i32 m0, 0x3141                   ; encoding: [0x41,0x31,0x7c,0xb0]
  22 0x41,0x31,0x7c,0xb0
  23
  24 # CHECK: s_movk_i32 exec_lo, 0x3141              ; encoding: [0x41,0x31,0x7e,0xb0]
  25 0x41,0x31,0x7e,0xb0
  26
  27 # CHECK: s_movk_i32 exec_hi, 0x3141              ; encoding: [0x41,0x31,0x7f,0xb0]
  28 0x41,0x31,0x7f,0xb0
  29
  30 # CHECK: s_movk_i32 s5, 0xc1d1                   ; encoding: [0xd1,0xc1,0x05,0xb0]
  31 0xd1,0xc1,0x05,0xb0
  32
  33 # CHECK: s_cmovk_i32 s5, 0x3141                  ; encoding: [0x41,0x31,0x85,0xb0]
  34 0x41,0x31,0x85,0xb0
  35
  36 # CHECK: s_cmovk_i32 s101, 0x3141                ; encoding: [0x41,0x31,0xe5,0xb0]
  37 0x41,0x31,0xe5,0xb0
  38
  39 # CHECK: s_cmovk_i32 flat_scratch_lo, 0x3141     ; encoding: [0x41,0x31,0xe6,0xb0]
  40 0x41,0x31,0xe6,0xb0
  41
  42 # CHECK: s_cmovk_i32 flat_scratch_hi, 0x3141     ; encoding: [0x41,0x31,0xe7,0xb0]
  43 0x41,0x31,0xe7,0xb0
  44
  45 # CHECK: s_cmovk_i32 vcc_lo, 0x3141              ; encoding: [0x41,0x31,0xea,0xb0]
  46 0x41,0x31,0xea,0xb0
  47
  48 # CHECK: s_cmovk_i32 vcc_hi, 0x3141              ; encoding: [0x41,0x31,0xeb,0xb0]
  49 0x41,0x31,0xeb,0xb0
  50
  51 # CHECK: s_cmovk_i32 m0, 0x3141                  ; encoding: [0x41,0x31,0xfc,0xb0]
  52 0x41,0x31,0xfc,0xb0
  53
  54 # CHECK: s_cmovk_i32 exec_lo, 0x3141             ; encoding: [0x41,0x31,0xfe,0xb0]
  55 0x41,0x31,0xfe,0xb0
  56
  57 # CHECK: s_cmovk_i32 exec_hi, 0x3141             ; encoding: [0x41,0x31,0xff,0xb0]
  58 0x41,0x31,0xff,0xb0
  59
  60 # CHECK: s_cmovk_i32 s5, 0xc1d1                  ; encoding: [0xd1,0xc1,0x85,0xb0]
  61 0xd1,0xc1,0x85,0xb0
  62
  63 # CHECK: s_cmpk_eq_i32 s1, 0x3141                ; encoding: [0x41,0x31,0x01,0xb1]
  64 0x41,0x31,0x01,0xb1
  65
  66 # CHECK: s_cmpk_eq_i32 s101, 0x3141              ; encoding: [0x41,0x31,0x65,0xb1]
  67 0x41,0x31,0x65,0xb1
  68
  69 # CHECK: s_cmpk_eq_i32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0x66,0xb1]
  70 0x41,0x31,0x66,0xb1
  71
  72 # CHECK: s_cmpk_eq_i32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0x67,0xb1]
  73 0x41,0x31,0x67,0xb1
  74
  75 # CHECK: s_cmpk_eq_i32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0x6a,0xb1]
  76 0x41,0x31,0x6a,0xb1
  77
  78 # CHECK: s_cmpk_eq_i32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0x6b,0xb1]
  79 0x41,0x31,0x6b,0xb1
  80
  81 # CHECK: s_cmpk_eq_i32 m0, 0x3141                ; encoding: [0x41,0x31,0x7c,0xb1]
  82 0x41,0x31,0x7c,0xb1
  83
  84 # CHECK: s_cmpk_eq_i32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0x7e,0xb1]
  85 0x41,0x31,0x7e,0xb1
  86
  87 # CHECK: s_cmpk_eq_i32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0x7f,0xb1]
  88 0x41,0x31,0x7f,0xb1
  89
  90 # CHECK: s_cmpk_eq_i32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x01,0xb1]
  91 0xd1,0xc1,0x01,0xb1
  92
  93 # CHECK: s_cmpk_lg_i32 s1, 0x3141                ; encoding: [0x41,0x31,0x81,0xb1]
  94 0x41,0x31,0x81,0xb1
  95
  96 # CHECK: s_cmpk_lg_i32 s101, 0x3141              ; encoding: [0x41,0x31,0xe5,0xb1]
  97 0x41,0x31,0xe5,0xb1
  98
  99 # CHECK: s_cmpk_lg_i32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0xe6,0xb1]
 100 0x41,0x31,0xe6,0xb1
 101
 102 # CHECK: s_cmpk_lg_i32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0xe7,0xb1]
 103 0x41,0x31,0xe7,0xb1
 104
 105 # CHECK: s_cmpk_lg_i32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0xea,0xb1]
 106 0x41,0x31,0xea,0xb1
 107
 108 # CHECK: s_cmpk_lg_i32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0xeb,0xb1]
 109 0x41,0x31,0xeb,0xb1
 110
 111 # CHECK: s_cmpk_lg_i32 m0, 0x3141                ; encoding: [0x41,0x31,0xfc,0xb1]
 112 0x41,0x31,0xfc,0xb1
 113
 114 # CHECK: s_cmpk_lg_i32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0xfe,0xb1]
 115 0x41,0x31,0xfe,0xb1
 116
 117 # CHECK: s_cmpk_lg_i32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0xff,0xb1]
 118 0x41,0x31,0xff,0xb1
 119
 120 # CHECK: s_cmpk_lg_i32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x81,0xb1]
 121 0xd1,0xc1,0x81,0xb1
 122
 123 # CHECK: s_cmpk_gt_i32 s1, 0x3141                ; encoding: [0x41,0x31,0x01,0xb2]
 124 0x41,0x31,0x01,0xb2
 125
 126 # CHECK: s_cmpk_gt_i32 s101, 0x3141              ; encoding: [0x41,0x31,0x65,0xb2]
 127 0x41,0x31,0x65,0xb2
 128
 129 # CHECK: s_cmpk_gt_i32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0x66,0xb2]
 130 0x41,0x31,0x66,0xb2
 131
 132 # CHECK: s_cmpk_gt_i32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0x67,0xb2]
 133 0x41,0x31,0x67,0xb2
 134
 135 # CHECK: s_cmpk_gt_i32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0x6a,0xb2]
 136 0x41,0x31,0x6a,0xb2
 137
 138 # CHECK: s_cmpk_gt_i32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0x6b,0xb2]
 139 0x41,0x31,0x6b,0xb2
 140
 141 # CHECK: s_cmpk_gt_i32 m0, 0x3141                ; encoding: [0x41,0x31,0x7c,0xb2]
 142 0x41,0x31,0x7c,0xb2
 143
 144 # CHECK: s_cmpk_gt_i32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0x7e,0xb2]
 145 0x41,0x31,0x7e,0xb2
 146
 147 # CHECK: s_cmpk_gt_i32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0x7f,0xb2]
 148 0x41,0x31,0x7f,0xb2
 149
 150 # CHECK: s_cmpk_gt_i32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x01,0xb2]
 151 0xd1,0xc1,0x01,0xb2
 152
 153 # CHECK: s_cmpk_ge_i32 s1, 0x3141                ; encoding: [0x41,0x31,0x81,0xb2]
 154 0x41,0x31,0x81,0xb2
 155
 156 # CHECK: s_cmpk_ge_i32 s101, 0x3141              ; encoding: [0x41,0x31,0xe5,0xb2]
 157 0x41,0x31,0xe5,0xb2
 158
 159 # CHECK: s_cmpk_ge_i32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0xe6,0xb2]
 160 0x41,0x31,0xe6,0xb2
 161
 162 # CHECK: s_cmpk_ge_i32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0xe7,0xb2]
 163 0x41,0x31,0xe7,0xb2
 164
 165 # CHECK: s_cmpk_ge_i32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0xea,0xb2]
 166 0x41,0x31,0xea,0xb2
 167
 168 # CHECK: s_cmpk_ge_i32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0xeb,0xb2]
 169 0x41,0x31,0xeb,0xb2
 170
 171 # CHECK: s_cmpk_ge_i32 m0, 0x3141                ; encoding: [0x41,0x31,0xfc,0xb2]
 172 0x41,0x31,0xfc,0xb2
 173
 174 # CHECK: s_cmpk_ge_i32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0xfe,0xb2]
 175 0x41,0x31,0xfe,0xb2
 176
 177 # CHECK: s_cmpk_ge_i32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0xff,0xb2]
 178 0x41,0x31,0xff,0xb2
 179
 180 # CHECK: s_cmpk_ge_i32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x81,0xb2]
 181 0xd1,0xc1,0x81,0xb2
 182
 183 # CHECK: s_cmpk_lt_i32 s1, 0x3141                ; encoding: [0x41,0x31,0x01,0xb3]
 184 0x41,0x31,0x01,0xb3
 185
 186 # CHECK: s_cmpk_lt_i32 s101, 0x3141              ; encoding: [0x41,0x31,0x65,0xb3]
 187 0x41,0x31,0x65,0xb3
 188
 189 # CHECK: s_cmpk_lt_i32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0x66,0xb3]
 190 0x41,0x31,0x66,0xb3
 191
 192 # CHECK: s_cmpk_lt_i32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0x67,0xb3]
 193 0x41,0x31,0x67,0xb3
 194
 195 # CHECK: s_cmpk_lt_i32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0x6a,0xb3]
 196 0x41,0x31,0x6a,0xb3
 197
 198 # CHECK: s_cmpk_lt_i32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0x6b,0xb3]
 199 0x41,0x31,0x6b,0xb3
 200
 201 # CHECK: s_cmpk_lt_i32 m0, 0x3141                ; encoding: [0x41,0x31,0x7c,0xb3]
 202 0x41,0x31,0x7c,0xb3
 203
 204 # CHECK: s_cmpk_lt_i32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0x7e,0xb3]
 205 0x41,0x31,0x7e,0xb3
 206
 207 # CHECK: s_cmpk_lt_i32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0x7f,0xb3]
 208 0x41,0x31,0x7f,0xb3
 209
 210 # CHECK: s_cmpk_lt_i32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x01,0xb3]
 211 0xd1,0xc1,0x01,0xb3
 212
 213 # CHECK: s_cmpk_le_i32 s1, 0x3141                ; encoding: [0x41,0x31,0x81,0xb3]
 214 0x41,0x31,0x81,0xb3
 215
 216 # CHECK: s_cmpk_le_i32 s101, 0x3141              ; encoding: [0x41,0x31,0xe5,0xb3]
 217 0x41,0x31,0xe5,0xb3
 218
 219 # CHECK: s_cmpk_le_i32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0xe6,0xb3]
 220 0x41,0x31,0xe6,0xb3
 221
 222 # CHECK: s_cmpk_le_i32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0xe7,0xb3]
 223 0x41,0x31,0xe7,0xb3
 224
 225 # CHECK: s_cmpk_le_i32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0xea,0xb3]
 226 0x41,0x31,0xea,0xb3
 227
 228 # CHECK: s_cmpk_le_i32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0xeb,0xb3]
 229 0x41,0x31,0xeb,0xb3
 230
 231 # CHECK: s_cmpk_le_i32 m0, 0x3141                ; encoding: [0x41,0x31,0xfc,0xb3]
 232 0x41,0x31,0xfc,0xb3
 233
 234 # CHECK: s_cmpk_le_i32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0xfe,0xb3]
 235 0x41,0x31,0xfe,0xb3
 236
 237 # CHECK: s_cmpk_le_i32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0xff,0xb3]
 238 0x41,0x31,0xff,0xb3
 239
 240 # CHECK: s_cmpk_le_i32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x81,0xb3]
 241 0xd1,0xc1,0x81,0xb3
 242
 243 # CHECK: s_cmpk_eq_u32 s1, 0x3141                ; encoding: [0x41,0x31,0x01,0xb4]
 244 0x41,0x31,0x01,0xb4
 245
 246 # CHECK: s_cmpk_eq_u32 s101, 0x3141              ; encoding: [0x41,0x31,0x65,0xb4]
 247 0x41,0x31,0x65,0xb4
 248
 249 # CHECK: s_cmpk_eq_u32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0x66,0xb4]
 250 0x41,0x31,0x66,0xb4
 251
 252 # CHECK: s_cmpk_eq_u32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0x67,0xb4]
 253 0x41,0x31,0x67,0xb4
 254
 255 # CHECK: s_cmpk_eq_u32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0x6a,0xb4]
 256 0x41,0x31,0x6a,0xb4
 257
 258 # CHECK: s_cmpk_eq_u32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0x6b,0xb4]
 259 0x41,0x31,0x6b,0xb4
 260
 261 # CHECK: s_cmpk_eq_u32 m0, 0x3141                ; encoding: [0x41,0x31,0x7c,0xb4]
 262 0x41,0x31,0x7c,0xb4
 263
 264 # CHECK: s_cmpk_eq_u32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0x7e,0xb4]
 265 0x41,0x31,0x7e,0xb4
 266
 267 # CHECK: s_cmpk_eq_u32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0x7f,0xb4]
 268 0x41,0x31,0x7f,0xb4
 269
 270 # CHECK: s_cmpk_eq_u32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x01,0xb4]
 271 0xd1,0xc1,0x01,0xb4
 272
 273 # CHECK: s_cmpk_lg_u32 s1, 0x3141                ; encoding: [0x41,0x31,0x81,0xb4]
 274 0x41,0x31,0x81,0xb4
 275
 276 # CHECK: s_cmpk_lg_u32 s101, 0x3141              ; encoding: [0x41,0x31,0xe5,0xb4]
 277 0x41,0x31,0xe5,0xb4
 278
 279 # CHECK: s_cmpk_lg_u32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0xe6,0xb4]
 280 0x41,0x31,0xe6,0xb4
 281
 282 # CHECK: s_cmpk_lg_u32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0xe7,0xb4]
 283 0x41,0x31,0xe7,0xb4
 284
 285 # CHECK: s_cmpk_lg_u32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0xea,0xb4]
 286 0x41,0x31,0xea,0xb4
 287
 288 # CHECK: s_cmpk_lg_u32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0xeb,0xb4]
 289 0x41,0x31,0xeb,0xb4
 290
 291 # CHECK: s_cmpk_lg_u32 m0, 0x3141                ; encoding: [0x41,0x31,0xfc,0xb4]
 292 0x41,0x31,0xfc,0xb4
 293
 294 # CHECK: s_cmpk_lg_u32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0xfe,0xb4]
 295 0x41,0x31,0xfe,0xb4
 296
 297 # CHECK: s_cmpk_lg_u32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0xff,0xb4]
 298 0x41,0x31,0xff,0xb4
 299
 300 # CHECK: s_cmpk_lg_u32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x81,0xb4]
 301 0xd1,0xc1,0x81,0xb4
 302
 303 # CHECK: s_cmpk_gt_u32 s1, 0x3141                ; encoding: [0x41,0x31,0x01,0xb5]
 304 0x41,0x31,0x01,0xb5
 305
 306 # CHECK: s_cmpk_gt_u32 s101, 0x3141              ; encoding: [0x41,0x31,0x65,0xb5]
 307 0x41,0x31,0x65,0xb5
 308
 309 # CHECK: s_cmpk_gt_u32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0x66,0xb5]
 310 0x41,0x31,0x66,0xb5
 311
 312 # CHECK: s_cmpk_gt_u32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0x67,0xb5]
 313 0x41,0x31,0x67,0xb5
 314
 315 # CHECK: s_cmpk_gt_u32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0x6a,0xb5]
 316 0x41,0x31,0x6a,0xb5
 317
 318 # CHECK: s_cmpk_gt_u32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0x6b,0xb5]
 319 0x41,0x31,0x6b,0xb5
 320
 321 # CHECK: s_cmpk_gt_u32 m0, 0x3141                ; encoding: [0x41,0x31,0x7c,0xb5]
 322 0x41,0x31,0x7c,0xb5
 323
 324 # CHECK: s_cmpk_gt_u32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0x7e,0xb5]
 325 0x41,0x31,0x7e,0xb5
 326
 327 # CHECK: s_cmpk_gt_u32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0x7f,0xb5]
 328 0x41,0x31,0x7f,0xb5
 329
 330 # CHECK: s_cmpk_gt_u32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x01,0xb5]
 331 0xd1,0xc1,0x01,0xb5
 332
 333 # CHECK: s_cmpk_ge_u32 s1, 0x3141                ; encoding: [0x41,0x31,0x81,0xb5]
 334 0x41,0x31,0x81,0xb5
 335
 336 # CHECK: s_cmpk_ge_u32 s101, 0x3141              ; encoding: [0x41,0x31,0xe5,0xb5]
 337 0x41,0x31,0xe5,0xb5
 338
 339 # CHECK: s_cmpk_ge_u32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0xe6,0xb5]
 340 0x41,0x31,0xe6,0xb5
 341
 342 # CHECK: s_cmpk_ge_u32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0xe7,0xb5]
 343 0x41,0x31,0xe7,0xb5
 344
 345 # CHECK: s_cmpk_ge_u32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0xea,0xb5]
 346 0x41,0x31,0xea,0xb5
 347
 348 # CHECK: s_cmpk_ge_u32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0xeb,0xb5]
 349 0x41,0x31,0xeb,0xb5
 350
 351 # CHECK: s_cmpk_ge_u32 m0, 0x3141                ; encoding: [0x41,0x31,0xfc,0xb5]
 352 0x41,0x31,0xfc,0xb5
 353
 354 # CHECK: s_cmpk_ge_u32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0xfe,0xb5]
 355 0x41,0x31,0xfe,0xb5
 356
 357 # CHECK: s_cmpk_ge_u32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0xff,0xb5]
 358 0x41,0x31,0xff,0xb5
 359
 360 # CHECK: s_cmpk_ge_u32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x81,0xb5]
 361 0xd1,0xc1,0x81,0xb5
 362
 363 # CHECK: s_cmpk_lt_u32 s1, 0x3141                ; encoding: [0x41,0x31,0x01,0xb6]
 364 0x41,0x31,0x01,0xb6
 365
 366 # CHECK: s_cmpk_lt_u32 s101, 0x3141              ; encoding: [0x41,0x31,0x65,0xb6]
 367 0x41,0x31,0x65,0xb6
 368
 369 # CHECK: s_cmpk_lt_u32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0x66,0xb6]
 370 0x41,0x31,0x66,0xb6
 371
 372 # CHECK: s_cmpk_lt_u32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0x67,0xb6]
 373 0x41,0x31,0x67,0xb6
 374
 375 # CHECK: s_cmpk_lt_u32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0x6a,0xb6]
 376 0x41,0x31,0x6a,0xb6
 377
 378 # CHECK: s_cmpk_lt_u32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0x6b,0xb6]
 379 0x41,0x31,0x6b,0xb6
 380
 381 # CHECK: s_cmpk_lt_u32 m0, 0x3141                ; encoding: [0x41,0x31,0x7c,0xb6]
 382 0x41,0x31,0x7c,0xb6
 383
 384 # CHECK: s_cmpk_lt_u32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0x7e,0xb6]
 385 0x41,0x31,0x7e,0xb6
 386
 387 # CHECK: s_cmpk_lt_u32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0x7f,0xb6]
 388 0x41,0x31,0x7f,0xb6
 389
 390 # CHECK: s_cmpk_lt_u32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x01,0xb6]
 391 0xd1,0xc1,0x01,0xb6
 392
 393 # CHECK: s_cmpk_le_u32 s1, 0x3141                ; encoding: [0x41,0x31,0x81,0xb6]
 394 0x41,0x31,0x81,0xb6
 395
 396 # CHECK: s_cmpk_le_u32 s101, 0x3141              ; encoding: [0x41,0x31,0xe5,0xb6]
 397 0x41,0x31,0xe5,0xb6
 398
 399 # CHECK: s_cmpk_le_u32 flat_scratch_lo, 0x3141   ; encoding: [0x41,0x31,0xe6,0xb6]
 400 0x41,0x31,0xe6,0xb6
 401
 402 # CHECK: s_cmpk_le_u32 flat_scratch_hi, 0x3141   ; encoding: [0x41,0x31,0xe7,0xb6]
 403 0x41,0x31,0xe7,0xb6
 404
 405 # CHECK: s_cmpk_le_u32 vcc_lo, 0x3141            ; encoding: [0x41,0x31,0xea,0xb6]
 406 0x41,0x31,0xea,0xb6
 407
 408 # CHECK: s_cmpk_le_u32 vcc_hi, 0x3141            ; encoding: [0x41,0x31,0xeb,0xb6]
 409 0x41,0x31,0xeb,0xb6
 410
 411 # CHECK: s_cmpk_le_u32 m0, 0x3141                ; encoding: [0x41,0x31,0xfc,0xb6]
 412 0x41,0x31,0xfc,0xb6
 413
 414 # CHECK: s_cmpk_le_u32 exec_lo, 0x3141           ; encoding: [0x41,0x31,0xfe,0xb6]
 415 0x41,0x31,0xfe,0xb6
 416
 417 # CHECK: s_cmpk_le_u32 exec_hi, 0x3141           ; encoding: [0x41,0x31,0xff,0xb6]
 418 0x41,0x31,0xff,0xb6
 419
 420 # CHECK: s_cmpk_le_u32 s1, 0xc1d1                ; encoding: [0xd1,0xc1,0x81,0xb6]
 421 0xd1,0xc1,0x81,0xb6
 422
 423 # CHECK: s_addk_i32 s5, 0x3141                   ; encoding: [0x41,0x31,0x05,0xb7]
 424 0x41,0x31,0x05,0xb7
 425
 426 # CHECK: s_addk_i32 s101, 0x3141                 ; encoding: [0x41,0x31,0x65,0xb7]
 427 0x41,0x31,0x65,0xb7
 428
 429 # CHECK: s_addk_i32 flat_scratch_lo, 0x3141      ; encoding: [0x41,0x31,0x66,0xb7]
 430 0x41,0x31,0x66,0xb7
 431
 432 # CHECK: s_addk_i32 flat_scratch_hi, 0x3141      ; encoding: [0x41,0x31,0x67,0xb7]
 433 0x41,0x31,0x67,0xb7
 434
 435 # CHECK: s_addk_i32 vcc_lo, 0x3141               ; encoding: [0x41,0x31,0x6a,0xb7]
 436 0x41,0x31,0x6a,0xb7
 437
 438 # CHECK: s_addk_i32 vcc_hi, 0x3141               ; encoding: [0x41,0x31,0x6b,0xb7]
 439 0x41,0x31,0x6b,0xb7
 440
 441 # CHECK: s_addk_i32 m0, 0x3141                   ; encoding: [0x41,0x31,0x7c,0xb7]
 442 0x41,0x31,0x7c,0xb7
 443
 444 # CHECK: s_addk_i32 exec_lo, 0x3141              ; encoding: [0x41,0x31,0x7e,0xb7]
 445 0x41,0x31,0x7e,0xb7
 446
 447 # CHECK: s_addk_i32 exec_hi, 0x3141              ; encoding: [0x41,0x31,0x7f,0xb7]
 448 0x41,0x31,0x7f,0xb7
 449
 450 # CHECK: s_addk_i32 s5, 0xc1d1                   ; encoding: [0xd1,0xc1,0x05,0xb7]
 451 0xd1,0xc1,0x05,0xb7
 452
 453 # CHECK: s_mulk_i32 s5, 0x3141                   ; encoding: [0x41,0x31,0x85,0xb7]
 454 0x41,0x31,0x85,0xb7
 455
 456 # CHECK: s_mulk_i32 s101, 0x3141                 ; encoding: [0x41,0x31,0xe5,0xb7]
 457 0x41,0x31,0xe5,0xb7
 458
 459 # CHECK: s_mulk_i32 flat_scratch_lo, 0x3141      ; encoding: [0x41,0x31,0xe6,0xb7]
 460 0x41,0x31,0xe6,0xb7
 461
 462 # CHECK: s_mulk_i32 flat_scratch_hi, 0x3141      ; encoding: [0x41,0x31,0xe7,0xb7]
 463 0x41,0x31,0xe7,0xb7
 464
 465 # CHECK: s_mulk_i32 vcc_lo, 0x3141               ; encoding: [0x41,0x31,0xea,0xb7]
 466 0x41,0x31,0xea,0xb7
 467
 468 # CHECK: s_mulk_i32 vcc_hi, 0x3141               ; encoding: [0x41,0x31,0xeb,0xb7]
 469 0x41,0x31,0xeb,0xb7
 470
 471 # CHECK: s_mulk_i32 m0, 0x3141                   ; encoding: [0x41,0x31,0xfc,0xb7]
 472 0x41,0x31,0xfc,0xb7
 473
 474 # CHECK: s_mulk_i32 exec_lo, 0x3141              ; encoding: [0x41,0x31,0xfe,0xb7]
 475 0x41,0x31,0xfe,0xb7
 476
 477 # CHECK: s_mulk_i32 exec_hi, 0x3141              ; encoding: [0x41,0x31,0xff,0xb7]
 478 0x41,0x31,0xff,0xb7
 479
 480 # CHECK: s_mulk_i32 s5, 0xc1d1                   ; encoding: [0xd1,0xc1,0x85,0xb7]
 481 0xd1,0xc1,0x85,0xb7
 482
 483 # CHECK: s_cbranch_i_fork s[2:3], 12609          ; encoding: [0x41,0x31,0x02,0xb8]
 484 0x41,0x31,0x02,0xb8
 485
 486 # CHECK: s_cbranch_i_fork s[4:5], 12609          ; encoding: [0x41,0x31,0x04,0xb8]
 487 0x41,0x31,0x04,0xb8
 488
 489 # CHECK: s_cbranch_i_fork s[100:101], 12609      ; encoding: [0x41,0x31,0x64,0xb8]
 490 0x41,0x31,0x64,0xb8
 491
 492 # CHECK: s_cbranch_i_fork flat_scratch, 12609    ; encoding: [0x41,0x31,0x66,0xb8]
 493 0x41,0x31,0x66,0xb8
 494
 495 # CHECK: s_cbranch_i_fork vcc, 12609             ; encoding: [0x41,0x31,0x6a,0xb8]
 496 0x41,0x31,0x6a,0xb8
 497
 498 # CHECK: s_cbranch_i_fork exec, 12609            ; encoding: [0x41,0x31,0x7e,0xb8]
 499 0x41,0x31,0x7e,0xb8
 500
 501 # CHECK: s_cbranch_i_fork s[2:3], 49617          ; encoding: [0xd1,0xc1,0x02,0xb8]
 502 0xd1,0xc1,0x02,0xb8
 503
 504 # CHECK: s_getreg_b32 s5, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0x85,0xb8]
 505 0x41,0x31,0x85,0xb8
 506
 507 # CHECK: s_getreg_b32 s101, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0xe5,0xb8]
 508 0x41,0x31,0xe5,0xb8
 509
 510 # CHECK: s_getreg_b32 flat_scratch_lo, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0xe6,0xb8]
 511 0x41,0x31,0xe6,0xb8
 512
 513 # CHECK: s_getreg_b32 flat_scratch_hi, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0xe7,0xb8]
 514 0x41,0x31,0xe7,0xb8
 515
 516 # CHECK: s_getreg_b32 vcc_lo, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0xea,0xb8]
 517 0x41,0x31,0xea,0xb8
 518
 519 # CHECK: s_getreg_b32 vcc_hi, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0xeb,0xb8]
 520 0x41,0x31,0xeb,0xb8
 521
 522 # CHECK: s_getreg_b32 m0, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0xfc,0xb8]
 523 0x41,0x31,0xfc,0xb8
 524
 525 # CHECK: s_getreg_b32 exec_lo, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0xfe,0xb8]
 526 0x41,0x31,0xfe,0xb8
 527
 528 # CHECK: s_getreg_b32 exec_hi, hwreg(HW_REG_MODE, 5, 7) ; encoding: [0x41,0x31,0xff,0xb8]
 529 0x41,0x31,0xff,0xb8
 530
 531 # CHECK: s_getreg_b32 s5, hwreg(HW_REG_TBA_HI, 7, 25) ; encoding: [0xd1,0xc1,0x85,0xb8]
 532 0xd1,0xc1,0x85,0xb8
 533
 534 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), s1 ; encoding: [0x41,0x31,0x01,0xb9]
 535 0x41,0x31,0x01,0xb9
 536
 537 # CHECK: s_setreg_b32 hwreg(HW_REG_TBA_HI, 7, 25), s1 ; encoding: [0xd1,0xc1,0x01,0xb9]
 538 0xd1,0xc1,0x01,0xb9
 539
 540 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), s101 ; encoding: [0x41,0x31,0x65,0xb9]
 541 0x41,0x31,0x65,0xb9
 542
 543 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), flat_scratch_lo ; encoding: [0x41,0x31,0x66,0xb9]
 544 0x41,0x31,0x66,0xb9
 545
 546 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), flat_scratch_hi ; encoding: [0x41,0x31,0x67,0xb9]
 547 0x41,0x31,0x67,0xb9
 548
 549 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), vcc_lo ; encoding: [0x41,0x31,0x6a,0xb9]
 550 0x41,0x31,0x6a,0xb9
 551
 552 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), vcc_hi ; encoding: [0x41,0x31,0x6b,0xb9]
 553 0x41,0x31,0x6b,0xb9
 554
 555 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), m0 ; encoding: [0x41,0x31,0x7c,0xb9]
 556 0x41,0x31,0x7c,0xb9
 557
 558 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), exec_lo ; encoding: [0x41,0x31,0x7e,0xb9]
 559 0x41,0x31,0x7e,0xb9
 560
 561 # CHECK: s_setreg_b32 hwreg(HW_REG_MODE, 5, 7), exec_hi ; encoding: [0x41,0x31,0x7f,0xb9]
 562 0x41,0x31,0x7f,0xb9
 563
 564 # CHECK: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 5, 7), 0x11213141 ; encoding: [0x41,0x31,0x00,0xba,0x41,0x31,0x21,0x11]
 565 0x41,0x31,0x00,0xba,0x41,0x31,0x21,0x11
 566
 567 # CHECK: s_setreg_imm32_b32 hwreg(HW_REG_TBA_HI, 7, 25), 0x11213141 ; encoding: [0xd1,0xc1,0x00,0xba,0x41,0x31,0x21,0x11]
 568 0xd1,0xc1,0x00,0xba,0x41,0x31,0x21,0x11
 569
 570 # CHECK: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 5, 7), 0xa1b1c1d1 ; encoding: [0x41,0x31,0x00,0xba,0xd1,0xc1,0xb1,0xa1]
 571 0x41,0x31,0x00,0xba,0xd1,0xc1,0xb1,0xa1
 572
 573 # CHECK: s_endpgm_ordered_ps_done                ; encoding: [0x00,0x00,0x9e,0xbf]
 574 0x00,0x00,0x9e,0xbf
 575
 576 # CHECK: s_call_b64 s[10:11], 12609              ; encoding: [0x41,0x31,0x8a,0xba]
 577 0x41,0x31,0x8a,0xba
 578
 579 # CHECK: s_call_b64 s[100:101], 12609            ; encoding: [0x41,0x31,0xe4,0xba]
 580 0x41,0x31,0xe4,0xba
 581
 582 # CHECK: s_call_b64 s[10:11], 49617              ; encoding: [0xd1,0xc1,0x8a,0xba]
 583 0xd1,0xc1,0x8a,0xba