1 # RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s
3 # CHECK: {vex} vpdpbusd ymm6, ymm5, ymm4
4 0xc4,0xe2,0x55,0x50,0xf4
6 # CHECK: {vex} vpdpbusd xmm6, xmm5, xmm4
7 0xc4,0xe2,0x51,0x50,0xf4
9 # CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [rbp + 8*r14 + 268435456]
10 0xc4,0xa2,0x55,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
12 # CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [r8 + 4*rax + 291]
13 0xc4,0xc2,0x55,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
15 # CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [rip]
16 0xc4,0xe2,0x55,0x50,0x35,0x00,0x00,0x00,0x00
18 # CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [2*rbp - 1024]
19 0xc4,0xe2,0x55,0x50,0x34,0x6d,0x00,0xfc,0xff,0xff
21 # CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [rcx + 4064]
22 0xc4,0xe2,0x55,0x50,0xb1,0xe0,0x0f,0x00,0x00
24 # CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [rdx - 4096]
25 0xc4,0xe2,0x55,0x50,0xb2,0x00,0xf0,0xff,0xff
27 # CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [rbp + 8*r14 + 268435456]
28 0xc4,0xa2,0x51,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10
30 # CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [r8 + 4*rax + 291]
31 0xc4,0xc2,0x51,0x50,0xb4,0x80,0x23,0x01,0x00,0x00
33 # CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [rip]
34 0xc4,0xe2,0x51,0x50,0x35,0x00,0x00,0x00,0x00
36 # CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [2*rbp - 512]
37 0xc4,0xe2,0x51,0x50,0x34,0x6d,0x00,0xfe,0xff,0xff
39 # CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [rcx + 2032]
40 0xc4,0xe2,0x51,0x50,0xb1,0xf0,0x07,0x00,0x00
42 # CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [rdx - 2048]
43 0xc4,0xe2,0x51,0x50,0xb2,0x00,0xf8,0xff,0xff
45 # CHECK: {vex} vpdpbusds ymm6, ymm5, ymm4
46 0xc4,0xe2,0x55,0x51,0xf4
48 # CHECK: {vex} vpdpbusds xmm6, xmm5, xmm4
49 0xc4,0xe2,0x51,0x51,0xf4
51 # CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [rbp + 8*r14 + 268435456]
52 0xc4,0xa2,0x55,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
54 # CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [r8 + 4*rax + 291]
55 0xc4,0xc2,0x55,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
57 # CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [rip]
58 0xc4,0xe2,0x55,0x51,0x35,0x00,0x00,0x00,0x00
60 # CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [2*rbp - 1024]
61 0xc4,0xe2,0x55,0x51,0x34,0x6d,0x00,0xfc,0xff,0xff
63 # CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [rcx + 4064]
64 0xc4,0xe2,0x55,0x51,0xb1,0xe0,0x0f,0x00,0x00
66 # CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [rdx - 4096]
67 0xc4,0xe2,0x55,0x51,0xb2,0x00,0xf0,0xff,0xff
69 # CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [rbp + 8*r14 + 268435456]
70 0xc4,0xa2,0x51,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10
72 # CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [r8 + 4*rax + 291]
73 0xc4,0xc2,0x51,0x51,0xb4,0x80,0x23,0x01,0x00,0x00
75 # CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [rip]
76 0xc4,0xe2,0x51,0x51,0x35,0x00,0x00,0x00,0x00
78 # CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [2*rbp - 512]
79 0xc4,0xe2,0x51,0x51,0x34,0x6d,0x00,0xfe,0xff,0xff
81 # CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [rcx + 2032]
82 0xc4,0xe2,0x51,0x51,0xb1,0xf0,0x07,0x00,0x00
84 # CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [rdx - 2048]
85 0xc4,0xe2,0x51,0x51,0xb2,0x00,0xf8,0xff,0xff
87 # CHECK: {vex} vpdpwssd ymm6, ymm5, ymm4
88 0xc4,0xe2,0x55,0x52,0xf4
90 # CHECK: {vex} vpdpwssd xmm6, xmm5, xmm4
91 0xc4,0xe2,0x51,0x52,0xf4
93 # CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [rbp + 8*r14 + 268435456]
94 0xc4,0xa2,0x55,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
96 # CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [r8 + 4*rax + 291]
97 0xc4,0xc2,0x55,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
99 # CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [rip]
100 0xc4,0xe2,0x55,0x52,0x35,0x00,0x00,0x00,0x00
102 # CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [2*rbp - 1024]
103 0xc4,0xe2,0x55,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff
105 # CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [rcx + 4064]
106 0xc4,0xe2,0x55,0x52,0xb1,0xe0,0x0f,0x00,0x00
108 # CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [rdx - 4096]
109 0xc4,0xe2,0x55,0x52,0xb2,0x00,0xf0,0xff,0xff
111 # CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [rbp + 8*r14 + 268435456]
112 0xc4,0xa2,0x51,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
114 # CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [r8 + 4*rax + 291]
115 0xc4,0xc2,0x51,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
117 # CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [rip]
118 0xc4,0xe2,0x51,0x52,0x35,0x00,0x00,0x00,0x00
120 # CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [2*rbp - 512]
121 0xc4,0xe2,0x51,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff
123 # CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [rcx + 2032]
124 0xc4,0xe2,0x51,0x52,0xb1,0xf0,0x07,0x00,0x00
126 # CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [rdx - 2048]
127 0xc4,0xe2,0x51,0x52,0xb2,0x00,0xf8,0xff,0xff
129 # CHECK: {vex} vpdpwssds ymm6, ymm5, ymm4
130 0xc4,0xe2,0x55,0x53,0xf4
132 # CHECK: {vex} vpdpwssds xmm6, xmm5, xmm4
133 0xc4,0xe2,0x51,0x53,0xf4
135 # CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [rbp + 8*r14 + 268435456]
136 0xc4,0xa2,0x55,0x53,0xb4,0xf5,0x00,0x00,0x00,0x10
138 # CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [r8 + 4*rax + 291]
139 0xc4,0xc2,0x55,0x53,0xb4,0x80,0x23,0x01,0x00,0x00
141 # CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [rip]
142 0xc4,0xe2,0x55,0x53,0x35,0x00,0x00,0x00,0x00
144 # CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [2*rbp - 1024]
145 0xc4,0xe2,0x55,0x53,0x34,0x6d,0x00,0xfc,0xff,0xff
147 # CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [rcx + 4064]
148 0xc4,0xe2,0x55,0x53,0xb1,0xe0,0x0f,0x00,0x00
150 # CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [rdx - 4096]
151 0xc4,0xe2,0x55,0x53,0xb2,0x00,0xf0,0xff,0xff
153 # CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [rbp + 8*r14 + 268435456]
154 0xc4,0xa2,0x51,0x53,0xb4,0xf5,0x00,0x00,0x00,0x10
156 # CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [r8 + 4*rax + 291]
157 0xc4,0xc2,0x51,0x53,0xb4,0x80,0x23,0x01,0x00,0x00
159 # CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [rip]
160 0xc4,0xe2,0x51,0x53,0x35,0x00,0x00,0x00,0x00
162 # CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [2*rbp - 512]
163 0xc4,0xe2,0x51,0x53,0x34,0x6d,0x00,0xfe,0xff,0xff
165 # CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [rcx + 2032]
166 0xc4,0xe2,0x51,0x53,0xb1,0xf0,0x07,0x00,0x00
168 # CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [rdx - 2048]
169 0xc4,0xe2,0x51,0x53,0xb2,0x00,0xf8,0xff,0xff