llvm/test/MC/Hexagon/hvx-swapped-regpairs.s

   1 # RUN: llvm-mc -filetype=obj -triple=hexagon -mcpu=hexagonv67 -mhvx %s | llvm-objdump --no-print-imm-hex -d --mcpu=hexagonv67 --mattr=+hvx - | FileCheck %s
   2 # RUN: not llvm-mc -triple=hexagon -mcpu=hexagonv65 -mhvx -filetype=asm %s 2>%t; FileCheck --check-prefix=CHECK-V65 --implicit-check-not="error:" %s <%t
   3
   4 v1:0.w = vadd(v0.h, v1.h) // Normal
   5 # CHECK: 1ca1c080
   6
   7 v0:1.w = vadd(v0.h, v1.h) // Swapped
   8 # CHECK-NEXT: 1ca1c081
   9 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
  10
  11 ## Swapped use:
  12 v1:0.w = vtmpy(v0:1.h,r0.b)
  13 # CHECK-NEXT: 19a0c180
  14 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
  15
  16 ## Swapped def
  17 v0:1 = v3:2
  18 # CHECK-NEXT: 1f42c3e1 { v0:1 = vcombine(v3,v2) }
  19 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
  20
  21 # Mapped instruction's swapped use:
  22 v1:0 = v2:3
  23 # CHECK-NEXT: v1:0 = vcombine(v2,v3)
  24 ## No error for v65, this is now permitted!
  25
  26 ## .new producer from pair:
  27 {
  28    v0:1 = vaddw(v0:1, v0:1)
  29    if (!p0) vmem(r0+#0)=v0.new
  30 }
  31 # CHECK-NEXT: v0:1.w = vadd(v0:1.w,v0:1.w)
  32 # CHECK-NEXT: if (!p0) vmem(r0+#0) = v0.new
  33 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
  34
  35 ## Used .tmp, swapped use & def:
  36 {
  37   v0.tmp = vmem(r0 + #3)
  38   v2:3 = vaddw(v0:1, v0:1)
  39 }
  40 # CHECK-NEXT: 1c6141c3 { v2:3.w = vadd(v0:1.w,v0:1.w)
  41 # CHECK-NEXT:            v0.tmp = vmem(r0+#3) }
  42 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
  43 # CHECK-V65: error: register pair `WR1' is not permitted for this architecture