llvm/test/MC/RISCV/rv32xtheadmemidx-invalid.s

   1 # RUN: not llvm-mc -triple riscv32 -mattr=+xtheadmemidx < %s 2>&1 | FileCheck %s
   2
   3 th.lwuia        a0, (a1), 0, 0    # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
   4 th.lwuib        a0, (a1), 15, 1   # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
   5 th.ldia         a0, (a1), 0, 0    # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
   6 th.ldib         a0, (a1), 0, 0    # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
   7 th.sdia         a0, (a1), -16, 0  # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
   8 th.sdib         a0, (a1), -1, 1   # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
   9 th.lrwu         a0, a1, a2, 2     # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
  10 th.lrd          a0, a1, a2, 0     # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
  11 th.srd          a0, a1, a2, 3     # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
  12 th.lurwu        a0, a1, a2, 2     # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
  13 th.lurd         a0, a1, a2, 0     # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}
  14 th.surd         a0, a1, a2, 3     # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set{{$}}