Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / test / MC / RISCV / supervisor-csr-names.s
blob84f9edd595d09347baa60c28914ea3a1ed45bd23
1 # RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
2 # RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
3 # RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
4 # RUN: | llvm-objdump -d - \
5 # RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
7 # RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
8 # RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
9 # RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
10 # RUN: | llvm-objdump -d - \
11 # RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
13 ##################################
14 # Supervisor Trap Setup
15 ##################################
17 # sstatus
18 # name
19 # CHECK-INST: csrrs t1, sstatus, zero
20 # CHECK-ENC: encoding: [0x73,0x23,0x00,0x10]
21 # CHECK-INST-ALIAS: csrr t1, sstatus
22 # uimm12
23 # CHECK-INST: csrrs t2, sstatus, zero
24 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0x10]
25 # CHECK-INST-ALIAS: csrr t2, sstatus
26 # name
27 csrrs t1, sstatus, zero
28 # uimm12
29 csrrs t2, 0x100, zero
31 # sie
32 # name
33 # CHECK-INST: csrrs t1, sie, zero
34 # CHECK-ENC: [0x73,0x23,0x40,0x10]
35 # CHECK-INST-ALIAS: csrr t1, sie
36 # uimm12
37 # CHECK-INST: csrrs t2, sie, zero
38 # CHECK-ENC: encoding: [0xf3,0x23,0x40,0x10]
39 # CHECK-INST-ALIAS: csrr t2, sie
40 # name
41 csrrs t1, sie, zero
42 # uimm12
43 csrrs t2, 0x104, zero
45 # stvec
46 # name
47 # CHECK-INST: csrrs t1, stvec, zero
48 # CHECK-ENC: encoding: [0x73,0x23,0x50,0x10]
49 # CHECK-INST-ALIAS: csrr t1, stvec
50 # uimm12
51 # CHECK-INST: csrrs t2, stvec, zero
52 # CHECK-ENC: encoding: [0xf3,0x23,0x50,0x10]
53 # CHECK-INST-ALIAS: csrr t2, stvec
54 # name
55 csrrs t1, stvec, zero
56 # uimm12
57 csrrs t2, 0x105, zero
59 # scounteren
60 # name
61 # CHECK-INST: csrrs t1, scounteren, zero
62 # CHECK-ENC: encoding: [0x73,0x23,0x60,0x10]
63 # CHECK-INST-ALIAS: csrr t1, scounteren
64 # uimm12
65 # CHECK-INST: csrrs t2, scounteren, zero
66 # CHECK-ENC: encoding: [0xf3,0x23,0x60,0x10]
67 # CHECK-INST-ALIAS: csrr t2, scounteren
68 # name
69 csrrs t1, scounteren, zero
70 # uimm12
71 csrrs t2, 0x106, zero
73 # stimecmp
74 # name
75 # CHECK-INST: csrrs t1, stimecmp, zero
76 # CHECK-ENC: encoding: [0x73,0x23,0xd0,0x14]
77 # CHECK-INST-ALIAS: csrr t1, stimecmp
78 # uimm12
79 # CHECK-INST: csrrs t2, stimecmp, zero
80 # CHECK-ENC: encoding: [0xf3,0x23,0xd0,0x14]
81 # CHECK-INST-ALIAS: csrr t2, stimecmp
82 # name
83 csrrs t1, stimecmp, zero
84 # uimm12
85 csrrs t2, 0x14D, zero
87 ##################################
88 # Supervisor Configuration
89 ##################################
91 # senvcfg
92 # name
93 # CHECK-INST: csrrs t1, senvcfg, zero
94 # CHECK-ENC: encoding: [0x73,0x23,0xa0,0x10]
95 # CHECK-INST-ALIAS: csrr t1, senvcfg
96 # uimm12
97 # CHECK-INST: csrrs t2, senvcfg, zero
98 # CHECK-ENC: encoding: [0xf3,0x23,0xa0,0x10]
99 # CHECK-INST-ALIAS: csrr t2, senvcfg
100 # name
101 csrrs t1, senvcfg, zero
102 # uimm12
103 csrrs t2, 0x10A, zero
105 ##################################
106 # Supervisor Trap Handling
107 ##################################
109 # sscratch
110 # name
111 # CHECK-INST: csrrs t1, sscratch, zero
112 # CHECK-ENC: encoding: [0x73,0x23,0x00,0x14]
113 # CHECK-INST-ALIAS: csrr t1, sscratch
114 # uimm12
115 # CHECK-INST: csrrs t2, sscratch, zero
116 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0x14]
117 # CHECK-INST-ALIAS: csrr t2, sscratch
118 # name
119 csrrs t1, sscratch, zero
120 # uimm12
121 csrrs t2, 0x140, zero
123 # sepc
124 # name
125 # CHECK-INST: csrrs t1, sepc, zero
126 # CHECK-ENC: encoding: [0x73,0x23,0x10,0x14]
127 # CHECK-INST-ALIAS: csrr t1, sepc
128 # uimm12
129 # CHECK-INST: csrrs t2, sepc, zero
130 # CHECK-ENC: encoding: [0xf3,0x23,0x10,0x14]
131 # CHECK-INST-ALIAS: csrr t2, sepc
132 # name
133 csrrs t1, sepc, zero
134 # uimm12
135 csrrs t2, 0x141, zero
137 # scause
138 # name
139 # CHECK-INST: csrrs t1, scause, zero
140 # CHECK-ENC: encoding: [0x73,0x23,0x20,0x14]
141 # CHECK-INST-ALIAS: csrr t1, scause
142 # uimm12
143 # CHECK-INST: csrrs t2, scause, zero
144 # CHECK-ENC: encoding: [0xf3,0x23,0x20,0x14]
145 # CHECK-INST-ALIAS: csrr t2, scause
146 # name
147 csrrs t1, scause, zero
148 # uimm12
149 csrrs t2, 0x142, zero
151 # stval
152 # name
153 # CHECK-INST: csrrs t1, stval, zero
154 # CHECK-ENC: encoding: [0x73,0x23,0x30,0x14]
155 # CHECK-INST-ALIAS: csrr t1, stval
156 # uimm12
157 # CHECK-INST: csrrs t2, stval, zero
158 # CHECK-ENC: encoding: [0xf3,0x23,0x30,0x14]
159 # CHECK-INST-ALIAS: csrr t2, stval
160 # aliases
161 # aliases with uimm12
162 # name
163 csrrs t1, stval, zero
164 # uimm12
165 csrrs t2, 0x143, zero
167 # sip
168 # name
169 # CHECK-INST: csrrs t1, sip, zero
170 # CHECK-ENC: encoding: [0x73,0x23,0x40,0x14]
171 # CHECK-INST-ALIAS: csrr t1, sip
172 # uimm12
173 # CHECK-INST: csrrs t2, sip, zero
174 # CHECK-ENC: encoding: [0xf3,0x23,0x40,0x14]
175 # CHECK-INST-ALIAS: csrr t2, sip
176 csrrs t1, sip, zero
177 # uimm12
178 csrrs t2, 0x144, zero
181 #########################################
182 # Supervisor Protection and Translation
183 #########################################
185 # satp
186 # name
187 # CHECK-INST: csrrs t1, satp, zero
188 # CHECK-ENC: encoding: [0x73,0x23,0x00,0x18]
189 # CHECK-INST-ALIAS: csrr t1, satp
190 # uimm12
191 # CHECK-INST: csrrs t2, satp, zero
192 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0x18]
193 # CHECK-INST-ALIAS: csrr t2, satp
194 # name
195 csrrs t1, satp, zero
196 # uimm12
197 csrrs t2, 0x180, zero
199 #########################################
200 # Debug/Trace Registers
201 #########################################
203 # scontext
204 # name
205 # CHECK-INST: csrrs t1, scontext, zero
206 # CHECK-ENC: encoding: [0x73,0x23,0x80,0x5a]
207 # CHECK-INST-ALIAS: csrr t1, scontext
208 # uimm12
209 # CHECK-INST: csrrs t2, scontext, zero
210 # CHECK-ENC: encoding: [0xf3,0x23,0x80,0x5a]
211 # CHECK-INST-ALIAS: csrr t2, scontext
212 # name
213 csrrs t1, scontext, zero
214 # uimm12
215 csrrs t2, 0x5A8, zero
217 #########################################
218 # Supervisor Count Overflow (Sscofpmf)
219 #########################################
221 # scountovf
222 # name
223 # CHECK-INST: csrrs t1, scountovf, zero
224 # CHECK-ENC: encoding: [0x73,0x23,0x00,0xda]
225 # CHECK-INST-ALIAS: csrr t1, scountovf
226 # uimm12
227 # CHECK-INST: csrrs t2, scountovf, zero
228 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0xda]
229 # CHECK-INST-ALIAS: csrr t2, scountovf
230 # name
231 csrrs t1, scountovf, zero
232 # uimm12
233 csrrs t2, 0xDA0, zero
235 #########################################
236 # State Enable Extension (Smstateen)
237 #########################################
239 # sstateen0
240 # name
241 # CHECK-INST: csrrs t1, sstateen0, zero
242 # CHECK-ENC: encoding: [0x73,0x23,0xc0,0x10]
243 # CHECK-INST-ALIAS: csrr t1, sstateen0
244 # uimm12
245 # CHECK-INST: csrrs t2, sstateen0, zero
246 # CHECK-ENC: encoding: [0xf3,0x23,0xc0,0x10]
247 # CHECK-INST-ALIAS: csrr t2, sstateen0
248 # name
249 csrrs t1, sstateen0, zero
250 # uimm12
251 csrrs t2, 0x10C, zero
253 # sstateen1
254 # name
255 # CHECK-INST: csrrs t1, sstateen1, zero
256 # CHECK-ENC: encoding: [0x73,0x23,0xd0,0x10]
257 # CHECK-INST-ALIAS: csrr t1, sstateen1
258 # uimm12
259 # CHECK-INST: csrrs t2, sstateen1, zero
260 # CHECK-ENC: encoding: [0xf3,0x23,0xd0,0x10]
261 # CHECK-INST-ALIAS: csrr t2, sstateen1
262 # name
263 csrrs t1, sstateen1, zero
264 # uimm12
265 csrrs t2, 0x10D, zero
267 # sstateen2
268 # name
269 # CHECK-INST: csrrs t1, sstateen2, zero
270 # CHECK-ENC: encoding: [0x73,0x23,0xe0,0x10]
271 # CHECK-INST-ALIAS: csrr t1, sstateen2
272 # uimm12
273 # CHECK-INST: csrrs t2, sstateen2, zero
274 # CHECK-ENC: encoding: [0xf3,0x23,0xe0,0x10]
275 # CHECK-INST-ALIAS: csrr t2, sstateen2
276 # name
277 csrrs t1, sstateen2, zero
278 # uimm12
279 csrrs t2, 0x10E, zero
281 # sstateen3
282 # name
283 # CHECK-INST: csrrs t1, sstateen3, zero
284 # CHECK-ENC: encoding: [0x73,0x23,0xf0,0x10]
285 # CHECK-INST-ALIAS: csrr t1, sstateen3
286 # uimm12
287 # CHECK-INST: csrrs t2, sstateen3, zero
288 # CHECK-ENC: encoding: [0xf3,0x23,0xf0,0x10]
289 # CHECK-INST-ALIAS: csrr t2, sstateen3
290 # name
291 csrrs t1, sstateen3, zero
292 # uimm12
293 csrrs t2, 0x10F, zero
295 #########################################
296 # Advanced Interrupt Architecture (Smaia and Ssaia)
297 #########################################
299 # siselect
300 # name
301 # CHECK-INST: csrrs t1, siselect, zero
302 # CHECK-ENC: encoding: [0x73,0x23,0x00,0x15]
303 # CHECK-INST-ALIAS: csrr t1, siselect
304 # uimm12
305 # CHECK-INST: csrrs t2, siselect, zero
306 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0x15]
307 # CHECK-INST-ALIAS: csrr t2, siselect
308 # name
309 csrrs t1, siselect, zero
310 # uimm12
311 csrrs t2, 0x150, zero
313 # sireg
314 # name
315 # CHECK-INST: csrrs t1, sireg, zero
316 # CHECK-ENC: encoding: [0x73,0x23,0x10,0x15]
317 # CHECK-INST-ALIAS: csrr t1, sireg
318 # uimm12
319 # CHECK-INST: csrrs t2, sireg, zero
320 # CHECK-ENC: encoding: [0xf3,0x23,0x10,0x15]
321 # CHECK-INST-ALIAS: csrr t2, sireg
322 # name
323 csrrs t1, sireg, zero
324 # uimm12
325 csrrs t2, 0x151, zero
327 # stopei
328 # name
329 # CHECK-INST: csrrs t1, stopei, zero
330 # CHECK-ENC: encoding: [0x73,0x23,0xc0,0x15]
331 # CHECK-INST-ALIAS: csrr t1, stopei
332 # uimm12
333 # CHECK-INST: csrrs t2, stopei, zero
334 # CHECK-ENC: encoding: [0xf3,0x23,0xc0,0x15]
335 # CHECK-INST-ALIAS: csrr t2, stopei
336 # name
337 csrrs t1, stopei, zero
338 # uimm12
339 csrrs t2, 0x15C, zero
341 # stopi
342 # name
343 # CHECK-INST: csrrs t1, stopi, zero
344 # CHECK-ENC: encoding: [0x73,0x23,0x00,0xdb]
345 # CHECK-INST-ALIAS: csrr t1, stopi
346 # uimm12
347 # CHECK-INST: csrrs t2, stopi, zero
348 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0xdb]
349 # CHECK-INST-ALIAS: csrr t2, stopi
350 # name
351 csrrs t1, stopi, zero
352 # uimm12
353 csrrs t2, 0xDB0, zero