| blob | dcf9723461dec85d2a8d63302f9bb2b190292a06 |
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=thumbv7-m.main-none-none-eabi -mcpu=cortex-m7 -mattr=+fp64 -instruction-tables < %s | FileCheck %s
4 vabs.f32 s0, s2
5 vabs.f64 d0, d2
8 vcmp.f32 s1, s2
9 vcmp.f64 d1, d2
10 vcvt.f32.f64 s1, d2
11 vcvt.f64.f32 d1, s1
28 vcvt.u32.f32 s1, s2
29 vcvt.s32.f32 s1, s2
30 vcvt.u32.f64 s1, d2
31 vcvt.s32.f64 s1, d2
32 vcvt.f32.u32 s1, s2
33 vcvt.f32.s32 s1, s2
34 vcvt.f64.u32 d1, s2
35 vcvt.f64.s32 d1, s2
36 vcvta.u32.f32 s1, s2
37 vcvta.s32.f32 s1, s2
38 vcvta.u32.f64 s1, d2
39 vcvta.s32.f64 s1, d2
40 vcvtm.u32.f32 s1, s2
41 vcvtm.s32.f32 s1, s2
42 vcvtm.u32.f64 s1, d2
43 vcvtm.s32.f64 s1, d2
44 vcvtn.u32.f32 s1, s2
45 vcvtn.s32.f32 s1, s2
46 vcvtn.u32.f64 s1, d2
47 vcvtn.s32.f64 s1, d2
48 vcvtp.u32.f32 s1, s2
49 vcvtp.s32.f32 s1, s2
50 vcvtp.u32.f64 s1, d2
51 vcvtp.s32.f64 s1, d2
53 vcvtb.f16.f32 s1, s2
54 vcvtr.u32.f32 s1, s2
55 vcvtr.s32.f32 s1, s2
56 vcvtr.u32.f64 s1, d2
57 vcvtr.s32.f64 s1, d2
58 vcvtt.f16.f32 s1, s2
86 vmov.f32 s0, s1
87 vmov.f64 d0, d1
90 vneg.f32 s0, s2
91 vneg.f64 d0, d2
98 vrinta.f32.f32 s0, s2
99 vrinta.f64.f64 d0, d2
100 vrintm.f32.f32 s0, s2
101 vrintm.f64.f64 d0, d2
102 vrintn.f32.f32 s0, s2
103 vrintn.f64.f64 d0, d2
104 vrintp.f32.f32 s0, s2
105 vrintp.f64.f64 d0, d2
106 vrintr.f32.f32 s0, s2
107 vrintr.f64.f64 d0, d2
108 vrintz.f32.f32 s0, s2
109 vrintz.f64.f64 d0, d2
110 vrintx.f32.f32 s0, s2
111 vrintx.f64.f64 d0, d2
114 vsqrt.f32 s0, s2
115 vsqrt.f64 d0, d2
124 # CHECK: Instruction Info:
125 # CHECK-NEXT: [1]: #uOps
126 # CHECK-NEXT: [2]: Latency
127 # CHECK-NEXT: [3]: RThroughput
128 # CHECK-NEXT: [4]: MayLoad
129 # CHECK-NEXT: [5]: MayStore
130 # CHECK-NEXT: [6]: HasSideEffects (U)
132 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
133 # CHECK-NEXT: 1 3 1.00 vabs.f32 s0, s2
134 # CHECK-NEXT: 1 4 1.00 vabs.f64 d0, d2
135 # CHECK-NEXT: 1 3 1.00 vadd.f32 s0, s2, s1
136 # CHECK-NEXT: 1 4 1.00 vadd.f64 d0, d2, d1
137 # CHECK-NEXT: 1 0 1.00 vcmp.f32 s1, s2
138 # CHECK-NEXT: 1 0 1.00 vcmp.f64 d1, d2
139 # CHECK-NEXT: 1 4 1.00 vcvt.f32.f64 s1, d2
140 # CHECK-NEXT: 1 3 1.00 vcvt.f64.f32 d1, s1
141 # CHECK-NEXT: 1 3 1.00 vcvt.f32.u16 s1, s1, #8
142 # CHECK-NEXT: 1 3 1.00 vcvt.f32.s16 s1, s1, #8
143 # CHECK-NEXT: 1 3 1.00 vcvt.f32.u32 s1, s1, #8
144 # CHECK-NEXT: 1 3 1.00 vcvt.f32.s32 s1, s1, #8
145 # CHECK-NEXT: 1 3 1.00 vcvt.u16.f32 s1, s1, #8
146 # CHECK-NEXT: 1 3 1.00 vcvt.s16.f32 s1, s1, #8
147 # CHECK-NEXT: 1 3 1.00 vcvt.u32.f32 s1, s1, #8
148 # CHECK-NEXT: 1 3 1.00 vcvt.s32.f32 s1, s1, #8
149 # CHECK-NEXT: 1 3 1.00 vcvt.f64.u16 d1, d1, #8
150 # CHECK-NEXT: 1 3 1.00 vcvt.f64.s16 d1, d1, #8
151 # CHECK-NEXT: 1 3 1.00 vcvt.f64.u32 d1, d1, #8
152 # CHECK-NEXT: 1 3 1.00 vcvt.f64.s32 d1, d1, #8
153 # CHECK-NEXT: 1 3 1.00 vcvt.u16.f64 d1, d1, #8
154 # CHECK-NEXT: 1 3 1.00 vcvt.s16.f64 d1, d1, #8
155 # CHECK-NEXT: 1 3 1.00 vcvt.u32.f64 d1, d1, #8
156 # CHECK-NEXT: 1 3 1.00 vcvt.s32.f64 d1, d1, #8
157 # CHECK-NEXT: 1 3 1.00 vcvt.u32.f32 s1, s2
158 # CHECK-NEXT: 1 3 1.00 vcvt.s32.f32 s1, s2
159 # CHECK-NEXT: 1 3 1.00 vcvt.u32.f64 s1, d2
160 # CHECK-NEXT: 1 3 1.00 vcvt.s32.f64 s1, d2
161 # CHECK-NEXT: 1 3 1.00 vcvt.f32.u32 s1, s2
162 # CHECK-NEXT: 1 3 1.00 vcvt.f32.s32 s1, s2
163 # CHECK-NEXT: 1 3 1.00 vcvt.f64.u32 d1, s2
164 # CHECK-NEXT: 1 3 1.00 vcvt.f64.s32 d1, s2
165 # CHECK-NEXT: 1 3 1.00 vcvta.u32.f32 s1, s2
166 # CHECK-NEXT: 1 3 1.00 vcvta.s32.f32 s1, s2
167 # CHECK-NEXT: 1 4 1.00 vcvta.u32.f64 s1, d2
168 # CHECK-NEXT: 1 4 1.00 vcvta.s32.f64 s1, d2
169 # CHECK-NEXT: 1 3 1.00 vcvtm.u32.f32 s1, s2
170 # CHECK-NEXT: 1 3 1.00 vcvtm.s32.f32 s1, s2
171 # CHECK-NEXT: 1 4 1.00 vcvtm.u32.f64 s1, d2
172 # CHECK-NEXT: 1 4 1.00 vcvtm.s32.f64 s1, d2
173 # CHECK-NEXT: 1 3 1.00 vcvtn.u32.f32 s1, s2
174 # CHECK-NEXT: 1 3 1.00 vcvtn.s32.f32 s1, s2
175 # CHECK-NEXT: 1 4 1.00 vcvtn.u32.f64 s1, d2
176 # CHECK-NEXT: 1 4 1.00 vcvtn.s32.f64 s1, d2
177 # CHECK-NEXT: 1 3 1.00 vcvtp.u32.f32 s1, s2
178 # CHECK-NEXT: 1 3 1.00 vcvtp.s32.f32 s1, s2
179 # CHECK-NEXT: 1 4 1.00 vcvtp.u32.f64 s1, d2
180 # CHECK-NEXT: 1 4 1.00 vcvtp.s32.f64 s1, d2
181 # CHECK-NEXT: 1 3 1.00 vcvtb.f32.f16 s1, s2
182 # CHECK-NEXT: 1 3 1.00 vcvtb.f16.f32 s1, s2
183 # CHECK-NEXT: 1 3 1.00 vcvtr.u32.f32 s1, s2
184 # CHECK-NEXT: 1 3 1.00 vcvtr.s32.f32 s1, s2
185 # CHECK-NEXT: 1 3 1.00 vcvtr.u32.f64 s1, d2
186 # CHECK-NEXT: 1 3 1.00 vcvtr.s32.f64 s1, d2
187 # CHECK-NEXT: 1 3 1.00 vcvtt.f16.f32 s1, s2
188 # CHECK-NEXT: 1 3 1.00 vcvtt.f32.f16 s1, s2
189 # CHECK-NEXT: 1 16 1.00 vdiv.f32 s0, s2, s1
190 # CHECK-NEXT: 1 30 1.00 vdiv.f64 d0, d2, d1
191 # CHECK-NEXT: 1 6 1.00 vfma.f32 s0, s2, s1
192 # CHECK-NEXT: 1 11 1.00 vfma.f64 d0, d2, d1
193 # CHECK-NEXT: 1 6 1.00 vfms.f32 s0, s2, s1
194 # CHECK-NEXT: 1 11 1.00 vfms.f64 d0, d2, d1
195 # CHECK-NEXT: 1 6 1.00 vfnma.f32 s0, s2, s1
196 # CHECK-NEXT: 1 11 1.00 vfnma.f64 d0, d2, d1
197 # CHECK-NEXT: 1 6 1.00 vfnms.f32 s0, s2, s1
198 # CHECK-NEXT: 1 11 1.00 vfnms.f64 d0, d2, d1
199 # CHECK-NEXT: 1 3 1.00 vmaxnm.f32 s0, s2, s1
200 # CHECK-NEXT: 1 4 1.00 vmaxnm.f64 d0, d2, d1
201 # CHECK-NEXT: 1 3 1.00 vminnm.f32 s0, s2, s1
202 # CHECK-NEXT: 1 4 1.00 vminnm.f64 d0, d2, d1
203 # CHECK-NEXT: 1 6 1.00 vmla.f32 s0, s2, s1
204 # CHECK-NEXT: 1 11 1.00 vmla.f64 d0, d2, d1
205 # CHECK-NEXT: 1 6 1.00 vmls.f32 s0, s2, s1
206 # CHECK-NEXT: 1 11 1.00 vmls.f64 d0, d2, d1
207 # CHECK-NEXT: 1 3 0.50 vmov s0, r1
208 # CHECK-NEXT: 1 3 0.50 vmov r0, s1
209 # CHECK-NEXT: 1 3 1.00 vmov d0, r1, r2
210 # CHECK-NEXT: 1 3 1.00 vmov r0, r1, d1
211 # CHECK-NEXT: 1 3 1.00 vmov s0, s1, r0, r1
212 # CHECK-NEXT: 1 3 1.00 vmov r0, r1, s0, s1
213 # CHECK-NEXT: 1 3 0.50 vmov.f32 s0, #1.000000e+00
214 # CHECK-NEXT: 1 3 1.00 vmov.f64 d0, #1.000000e+00
215 # CHECK-NEXT: 1 3 0.50 vmov.f32 s0, s1
216 # CHECK-NEXT: 1 3 1.00 vmov.f64 d0, d1
217 # CHECK-NEXT: 1 3 1.00 vmul.f32 s0, s2, s1
218 # CHECK-NEXT: 1 7 1.00 vmul.f64 d0, d2, d1
219 # CHECK-NEXT: 1 3 1.00 vneg.f32 s0, s2
220 # CHECK-NEXT: 1 4 1.00 vneg.f64 d0, d2
221 # CHECK-NEXT: 1 6 1.00 vnmla.f32 s0, s2, s1
222 # CHECK-NEXT: 1 11 1.00 vnmla.f64 d0, d2, d1
223 # CHECK-NEXT: 1 6 1.00 vnmls.f32 s0, s2, s1
224 # CHECK-NEXT: 1 11 1.00 vnmls.f64 d0, d2, d1
225 # CHECK-NEXT: 1 3 1.00 vnmul.f32 s0, s2, s1
226 # CHECK-NEXT: 1 7 1.00 vnmul.f64 d0, d2, d1
227 # CHECK-NEXT: 1 3 1.00 vrinta.f32 s0, s2
228 # CHECK-NEXT: 1 4 1.00 vrinta.f64 d0, d2
229 # CHECK-NEXT: 1 3 1.00 vrintm.f32 s0, s2
230 # CHECK-NEXT: 1 4 1.00 vrintm.f64 d0, d2
231 # CHECK-NEXT: 1 3 1.00 vrintn.f32 s0, s2
232 # CHECK-NEXT: 1 4 1.00 vrintn.f64 d0, d2
233 # CHECK-NEXT: 1 3 1.00 vrintp.f32 s0, s2
234 # CHECK-NEXT: 1 4 1.00 vrintp.f64 d0, d2
235 # CHECK-NEXT: 1 3 1.00 vrintr.f32 s0, s2
236 # CHECK-NEXT: 1 4 1.00 vrintr.f64 d0, d2
237 # CHECK-NEXT: 1 3 1.00 vrintz.f32 s0, s2
238 # CHECK-NEXT: 1 4 1.00 vrintz.f64 d0, d2
239 # CHECK-NEXT: 1 3 1.00 vrintx.f32 s0, s2
240 # CHECK-NEXT: 1 4 1.00 vrintx.f64 d0, d2
241 # CHECK-NEXT: 1 4 1.00 vseleq.f32 s0, s2, s1
242 # CHECK-NEXT: 1 5 1.00 vseleq.f64 d0, d2, d1
243 # CHECK-NEXT: 1 16 1.00 vsqrt.f32 s0, s2
244 # CHECK-NEXT: 1 30 1.00 vsqrt.f64 d0, d2
245 # CHECK-NEXT: 1 3 1.00 vsub.f32 s0, s2, s1
246 # CHECK-NEXT: 1 4 1.00 vsub.f64 d0, d2, d1
247 # CHECK-NEXT: 1 3 1.00 * vldr d0, [r0]
248 # CHECK-NEXT: 1 2 0.50 * vldr s0, [r0]
249 # CHECK-NEXT: 1 2 1.00 * vstr d0, [r0]
250 # CHECK-NEXT: 1 2 1.00 * vstr s0, [r0]
252 # CHECK: Resources:
253 # CHECK-NEXT: [0.0] - M7UnitALU
254 # CHECK-NEXT: [0.1] - M7UnitALU
255 # CHECK-NEXT: [1] - M7UnitBranch
256 # CHECK-NEXT: [2] - M7UnitLoadH
257 # CHECK-NEXT: [3] - M7UnitLoadL
258 # CHECK-NEXT: [4] - M7UnitMAC
259 # CHECK-NEXT: [5] - M7UnitSIMD
260 # CHECK-NEXT: [6] - M7UnitShift1
261 # CHECK-NEXT: [7] - M7UnitShift2
262 # CHECK-NEXT: [8] - M7UnitStore
263 # CHECK-NEXT: [9] - M7UnitVFP
264 # CHECK-NEXT: [10] - M7UnitVPortH
265 # CHECK-NEXT: [11] - M7UnitVPortL
267 # CHECK: Resource pressure per iteration:
268 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
269 # CHECK-NEXT: - - - 1.50 1.50 - - - - 2.00 104.00 81.00 81.00
271 # CHECK: Resource pressure by instruction:
272 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions:
273 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vabs.f32 s0, s2
274 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vabs.f64 d0, d2
275 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vadd.f32 s0, s2, s1
276 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vadd.f64 d0, d2, d1
277 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcmp.f32 s1, s2
278 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcmp.f64 d1, d2
279 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvt.f32.f64 s1, d2
280 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.f32 d1, s1
281 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.u16 s1, s1, #8
282 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.s16 s1, s1, #8
283 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.u32 s1, s1, #8
284 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.s32 s1, s1, #8
285 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u16.f32 s1, s1, #8
286 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s16.f32 s1, s1, #8
287 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u32.f32 s1, s1, #8
288 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s32.f32 s1, s1, #8
289 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.u16 d1, d1, #8
290 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.s16 d1, d1, #8
291 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.u32 d1, d1, #8
292 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.s32 d1, d1, #8
293 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u16.f64 d1, d1, #8
294 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s16.f64 d1, d1, #8
295 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u32.f64 d1, d1, #8
296 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s32.f64 d1, d1, #8
297 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u32.f32 s1, s2
298 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s32.f32 s1, s2
299 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u32.f64 s1, d2
300 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s32.f64 s1, d2
301 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.u32 s1, s2
302 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.s32 s1, s2
303 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.u32 d1, s2
304 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.s32 d1, s2
305 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvta.u32.f32 s1, s2
306 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvta.s32.f32 s1, s2
307 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvta.u32.f64 s1, d2
308 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvta.s32.f64 s1, d2
309 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtm.u32.f32 s1, s2
310 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtm.s32.f32 s1, s2
311 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtm.u32.f64 s1, d2
312 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtm.s32.f64 s1, d2
313 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtn.u32.f32 s1, s2
314 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtn.s32.f32 s1, s2
315 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtn.u32.f64 s1, d2
316 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtn.s32.f64 s1, d2
317 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtp.u32.f32 s1, s2
318 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtp.s32.f32 s1, s2
319 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtp.u32.f64 s1, d2
320 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtp.s32.f64 s1, d2
321 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtb.f32.f16 s1, s2
322 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtb.f16.f32 s1, s2
323 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtr.u32.f32 s1, s2
324 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtr.s32.f32 s1, s2
325 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtr.u32.f64 s1, d2
326 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtr.s32.f64 s1, d2
327 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtt.f16.f32 s1, s2
328 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtt.f32.f16 s1, s2
329 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vdiv.f32 s0, s2, s1
330 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vdiv.f64 d0, d2, d1
331 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vfma.f32 s0, s2, s1
332 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vfma.f64 d0, d2, d1
333 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vfms.f32 s0, s2, s1
334 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vfms.f64 d0, d2, d1
335 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vfnma.f32 s0, s2, s1
336 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vfnma.f64 d0, d2, d1
337 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vfnms.f32 s0, s2, s1
338 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vfnms.f64 d0, d2, d1
339 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vmaxnm.f32 s0, s2, s1
340 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vmaxnm.f64 d0, d2, d1
341 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vminnm.f32 s0, s2, s1
342 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vminnm.f64 d0, d2, d1
343 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vmla.f32 s0, s2, s1
344 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vmla.f64 d0, d2, d1
345 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vmls.f32 s0, s2, s1
346 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vmls.f64 d0, d2, d1
347 # CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmov s0, r1
348 # CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmov r0, s1
349 # CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov d0, r1, r2
350 # CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov r0, r1, d1
351 # CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov s0, s1, r0, r1
352 # CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov r0, r1, s0, s1
353 # CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmov.f32 s0, #1.000000e+00
354 # CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov.f64 d0, #1.000000e+00
355 # CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmov.f32 s0, s1
356 # CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov.f64 d0, d1
357 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vmul.f32 s0, s2, s1
358 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vmul.f64 d0, d2, d1
359 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vneg.f32 s0, s2
360 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vneg.f64 d0, d2
361 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vnmla.f32 s0, s2, s1
362 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vnmla.f64 d0, d2, d1
363 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vnmls.f32 s0, s2, s1
364 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vnmls.f64 d0, d2, d1
365 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vnmul.f32 s0, s2, s1
366 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vnmul.f64 d0, d2, d1
367 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrinta.f32 s0, s2
368 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrinta.f64 d0, d2
369 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintm.f32 s0, s2
370 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintm.f64 d0, d2
371 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintn.f32 s0, s2
372 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintn.f64 d0, d2
373 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintp.f32 s0, s2
374 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintp.f64 d0, d2
375 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintr.f32 s0, s2
376 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintr.f64 d0, d2
377 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintz.f32 s0, s2
378 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintz.f64 d0, d2
379 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintx.f32 s0, s2
380 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintx.f64 d0, d2
381 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vseleq.f32 s0, s2, s1
382 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vseleq.f64 d0, d2, d1
383 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vsqrt.f32 s0, s2
384 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vsqrt.f64 d0, d2
385 # CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vsub.f32 s0, s2, s1
386 # CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vsub.f64 d0, d2, d1
387 # CHECK-NEXT: - - - 1.00 1.00 - - - - - - 1.00 1.00 vldr d0, [r0]
388 # CHECK-NEXT: - - - 0.50 0.50 - - - - - - 0.50 0.50 vldr s0, [r0]
389 # CHECK-NEXT: - - - - - - - - - 1.00 - 1.00 1.00 vstr d0, [r0]
390 # CHECK-NEXT: - - - - - - - - - 1.00 - 0.50 0.50 vstr s0, [r0]