Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / test / tools / llvm-mca / RISCV / SiFive7 / strided-load-x0.s
blob41a6935873ad3c95b80fe9af1e322130ccf429a8
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-x280 -iterations=1 < %s | FileCheck %s
4 vsetvli zero, zero, e32, m1, tu, mu
6 vlse8.v v1, (a1), a2
7 vlse16.v v1, (a1), a2
8 vlse32.v v1, (a1), a2
9 vlse64.v v1, (a1), a2
11 vlse8.v v1, (a1), zero
12 vlse16.v v1, (a1), zero
13 vlse32.v v1, (a1), zero
14 vlse64.v v1, (a1), zero
16 vle8.v v1, (a1)
17 vle16.v v1, (a1)
18 vle32.v v1, (a1)
19 vle64.v v1, (a1)
21 vsetvli zero, zero, e64, m1, tu, mu
23 vlse8.v v1, (a1), a2
24 vlse16.v v1, (a1), a2
25 vlse32.v v1, (a1), a2
26 vlse64.v v1, (a1), a2
28 vlse8.v v1, (a1), zero
29 vlse16.v v1, (a1), zero
30 vlse32.v v1, (a1), zero
31 vlse64.v v1, (a1), zero
33 vle8.v v1, (a1)
34 vle16.v v1, (a1)
35 vle32.v v1, (a1)
36 vle64.v v1, (a1)
38 # CHECK: Iterations: 1
39 # CHECK-NEXT: Instructions: 26
40 # CHECK-NEXT: Total Cycles: 3523
41 # CHECK-NEXT: Total uOps: 26
43 # CHECK: Dispatch Width: 2
44 # CHECK-NEXT: uOps Per Cycle: 0.01
45 # CHECK-NEXT: IPC: 0.01
46 # CHECK-NEXT: Block RThroughput: 3517.0
48 # CHECK: Instruction Info:
49 # CHECK-NEXT: [1]: #uOps
50 # CHECK-NEXT: [2]: Latency
51 # CHECK-NEXT: [3]: RThroughput
52 # CHECK-NEXT: [4]: MayLoad
53 # CHECK-NEXT: [5]: MayStore
54 # CHECK-NEXT: [6]: HasSideEffects (U)
56 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
57 # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e32, m1, tu, mu
58 # CHECK-NEXT: 1 515 512.00 * vlse8.v v1, (a1), a2
59 # CHECK-NEXT: 1 259 256.00 * vlse16.v v1, (a1), a2
60 # CHECK-NEXT: 1 19 16.00 * vlse32.v v1, (a1), a2
61 # CHECK-NEXT: 1 67 64.00 * vlse64.v v1, (a1), a2
62 # CHECK-NEXT: 1 515 512.00 * vlse8.v v1, (a1), zero
63 # CHECK-NEXT: 1 259 256.00 * vlse16.v v1, (a1), zero
64 # CHECK-NEXT: 1 19 16.00 * vlse32.v v1, (a1), zero
65 # CHECK-NEXT: 1 67 64.00 * vlse64.v v1, (a1), zero
66 # CHECK-NEXT: 1 4 1.00 * vle8.v v1, (a1)
67 # CHECK-NEXT: 1 4 1.00 * vle16.v v1, (a1)
68 # CHECK-NEXT: 1 4 2.00 * vle32.v v1, (a1)
69 # CHECK-NEXT: 1 4 4.00 * vle64.v v1, (a1)
70 # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e64, m1, tu, mu
71 # CHECK-NEXT: 1 515 512.00 * vlse8.v v1, (a1), a2
72 # CHECK-NEXT: 1 259 256.00 * vlse16.v v1, (a1), a2
73 # CHECK-NEXT: 1 131 128.00 * vlse32.v v1, (a1), a2
74 # CHECK-NEXT: 1 11 8.00 * vlse64.v v1, (a1), a2
75 # CHECK-NEXT: 1 515 512.00 * vlse8.v v1, (a1), zero
76 # CHECK-NEXT: 1 259 256.00 * vlse16.v v1, (a1), zero
77 # CHECK-NEXT: 1 131 128.00 * vlse32.v v1, (a1), zero
78 # CHECK-NEXT: 1 11 8.00 * vlse64.v v1, (a1), zero
79 # CHECK-NEXT: 1 4 1.00 * vle8.v v1, (a1)
80 # CHECK-NEXT: 1 4 1.00 * vle16.v v1, (a1)
81 # CHECK-NEXT: 1 4 1.00 * vle32.v v1, (a1)
82 # CHECK-NEXT: 1 4 2.00 * vle64.v v1, (a1)
84 # CHECK: Resources:
85 # CHECK-NEXT: [0] - SiFive7FDiv
86 # CHECK-NEXT: [1] - SiFive7IDiv
87 # CHECK-NEXT: [2] - SiFive7PipeA
88 # CHECK-NEXT: [3] - SiFive7PipeB
89 # CHECK-NEXT: [4] - SiFive7PipeV
90 # CHECK-NEXT: [5] - SiFive7VA
91 # CHECK-NEXT: [6] - SiFive7VL
92 # CHECK-NEXT: [7] - SiFive7VS
94 # CHECK: Resource pressure per iteration:
95 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
96 # CHECK-NEXT: - - 2.00 - 3517.00 - 3517.00 -
98 # CHECK: Resource pressure by instruction:
99 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
100 # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e32, m1, tu, mu
101 # CHECK-NEXT: - - - - 512.00 - 512.00 - vlse8.v v1, (a1), a2
102 # CHECK-NEXT: - - - - 256.00 - 256.00 - vlse16.v v1, (a1), a2
103 # CHECK-NEXT: - - - - 16.00 - 16.00 - vlse32.v v1, (a1), a2
104 # CHECK-NEXT: - - - - 64.00 - 64.00 - vlse64.v v1, (a1), a2
105 # CHECK-NEXT: - - - - 512.00 - 512.00 - vlse8.v v1, (a1), zero
106 # CHECK-NEXT: - - - - 256.00 - 256.00 - vlse16.v v1, (a1), zero
107 # CHECK-NEXT: - - - - 16.00 - 16.00 - vlse32.v v1, (a1), zero
108 # CHECK-NEXT: - - - - 64.00 - 64.00 - vlse64.v v1, (a1), zero
109 # CHECK-NEXT: - - - - 1.00 - 1.00 - vle8.v v1, (a1)
110 # CHECK-NEXT: - - - - 1.00 - 1.00 - vle16.v v1, (a1)
111 # CHECK-NEXT: - - - - 2.00 - 2.00 - vle32.v v1, (a1)
112 # CHECK-NEXT: - - - - 4.00 - 4.00 - vle64.v v1, (a1)
113 # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m1, tu, mu
114 # CHECK-NEXT: - - - - 512.00 - 512.00 - vlse8.v v1, (a1), a2
115 # CHECK-NEXT: - - - - 256.00 - 256.00 - vlse16.v v1, (a1), a2
116 # CHECK-NEXT: - - - - 128.00 - 128.00 - vlse32.v v1, (a1), a2
117 # CHECK-NEXT: - - - - 8.00 - 8.00 - vlse64.v v1, (a1), a2
118 # CHECK-NEXT: - - - - 512.00 - 512.00 - vlse8.v v1, (a1), zero
119 # CHECK-NEXT: - - - - 256.00 - 256.00 - vlse16.v v1, (a1), zero
120 # CHECK-NEXT: - - - - 128.00 - 128.00 - vlse32.v v1, (a1), zero
121 # CHECK-NEXT: - - - - 8.00 - 8.00 - vlse64.v v1, (a1), zero
122 # CHECK-NEXT: - - - - 1.00 - 1.00 - vle8.v v1, (a1)
123 # CHECK-NEXT: - - - - 1.00 - 1.00 - vle16.v v1, (a1)
124 # CHECK-NEXT: - - - - 1.00 - 1.00 - vle32.v v1, (a1)
125 # CHECK-NEXT: - - - - 2.00 - 2.00 - vle64.v v1, (a1)