1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -lqueue=2 -iterations=2 -resource-pressure=false -timeline -timeline-max-cycles=104 < %s | FileCheck %s
8 # CHECK-NEXT: Instructions: 4
9 # CHECK-NEXT: Total Cycles: 104
10 # CHECK-NEXT: Total uOps: 4
12 # CHECK: Dispatch Width: 2
13 # CHECK-NEXT: uOps Per Cycle: 0.04
14 # CHECK-NEXT: IPC: 0.04
15 # CHECK-NEXT: Block RThroughput: 1.0
17 # CHECK: Instruction Info:
18 # CHECK-NEXT: [1]: #uOps
19 # CHECK-NEXT: [2]: Latency
20 # CHECK-NEXT: [3]: RThroughput
21 # CHECK-NEXT: [4]: MayLoad
22 # CHECK-NEXT: [5]: MayStore
23 # CHECK-NEXT: [6]: HasSideEffects (U)
25 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
26 # CHECK-NEXT: 1 100 0.50 * * U int3
27 # CHECK-NEXT: 1 1 1.00 * U stmxcsr (%rsp)
29 # CHECK: Timeline view:
30 # CHECK-NEXT: 0123456789 0123456789 0123456789 0123456789 0123456789
31 # CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 0123456789 0123
33 # CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER. int3
34 # CHECK-NEXT: [0,1] DeE---------------------------------------------------------------------------------------------------R. stmxcsr (%rsp)
35 # CHECK-NEXT: [1,0] .DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER int3
36 # CHECK-NEXT: [1,1] .DeE---------------------------------------------------------------------------------------------------R stmxcsr (%rsp)
38 # CHECK: Average Wait times (based on the timeline view):
39 # CHECK-NEXT: [0]: Executions
40 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
41 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
42 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
44 # CHECK: [0] [1] [2] [3]
45 # CHECK-NEXT: 0. 2 1.0 1.0 0.0 int3
46 # CHECK-NEXT: 1. 2 1.0 0.0 99.0 stmxcsr (%rsp)
47 # CHECK-NEXT: 2 1.0 0.5 49.5 <total>