llvm/test/tools/llvm-mca/X86/SkylakeClient/mulx-hi-read-advance.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -timeline -iterations=1 < %s | FileCheck %s
   3
   4 # PR51495: WriteIMulH reports an incorrect latency for the RM variants of MULX.
   5
   6 # LLVM-MCA-BEGIN
   7 mulxl (%rdi), %eax, %ecx
   8 add %eax, %eax
   9 # LLVM-MCA-END
  10
  11 # LLVM-MCA-BEGIN
  12 mulxq (%rdi), %rax, %rcx
  13 add %rax, %rax
  14 # LLVM-MCA-END
  15
  16 # CHECK:      [0] Code Region
  17
  18 # CHECK:      Iterations:        1
  19 # CHECK-NEXT: Instructions:      2
  20 # CHECK-NEXT: Total Cycles:      12
  21 # CHECK-NEXT: Total uOps:        6
  22
  23 # CHECK:      Dispatch Width:    6
  24 # CHECK-NEXT: uOps Per Cycle:    0.50
  25 # CHECK-NEXT: IPC:               0.17
  26 # CHECK-NEXT: Block RThroughput: 1.0
  27
  28 # CHECK:      Instruction Info:
  29 # CHECK-NEXT: [1]: #uOps
  30 # CHECK-NEXT: [2]: Latency
  31 # CHECK-NEXT: [3]: RThroughput
  32 # CHECK-NEXT: [4]: MayLoad
  33 # CHECK-NEXT: [5]: MayStore
  34 # CHECK-NEXT: [6]: HasSideEffects (U)
  35
  36 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  37 # CHECK-NEXT:  5      9     1.00    *                   mulxl   (%rdi), %eax, %ecx
  38 # CHECK-NEXT:  1      1     0.25                        addl    %eax, %eax
  39
  40 # CHECK:      Resources:
  41 # CHECK-NEXT: [0]   - SKLDivider
  42 # CHECK-NEXT: [1]   - SKLFPDivider
  43 # CHECK-NEXT: [2]   - SKLPort0
  44 # CHECK-NEXT: [3]   - SKLPort1
  45 # CHECK-NEXT: [4]   - SKLPort2
  46 # CHECK-NEXT: [5]   - SKLPort3
  47 # CHECK-NEXT: [6]   - SKLPort4
  48 # CHECK-NEXT: [7]   - SKLPort5
  49 # CHECK-NEXT: [8]   - SKLPort6
  50 # CHECK-NEXT: [9]   - SKLPort7
  51
  52 # CHECK:      Resource pressure per iteration:
  53 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]
  54 # CHECK-NEXT:  -      -     1.00   1.00    -     1.00    -     1.00   1.00    -
  55
  56 # CHECK:      Resource pressure by instruction:
  57 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Instructions:
  58 # CHECK-NEXT:  -      -      -     1.00    -     1.00    -     1.00   1.00    -     mulxl       (%rdi), %eax, %ecx
  59 # CHECK-NEXT:  -      -     1.00    -      -      -      -      -      -      -     addl        %eax, %eax
  60
  61 # CHECK:      Timeline view:
  62 # CHECK-NEXT:                     01
  63 # CHECK-NEXT: Index     0123456789
  64
  65 # CHECK:      [0,0]     DeeeeeeeeeER   mulxl    (%rdi), %eax, %ecx
  66 # CHECK-NEXT: [0,1]     D========eER   addl     %eax, %eax
  67
  68 # CHECK:      Average Wait times (based on the timeline view):
  69 # CHECK-NEXT: [0]: Executions
  70 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
  71 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
  72 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
  73
  74 # CHECK:            [0]    [1]    [2]    [3]
  75 # CHECK-NEXT: 0.     1     1.0    1.0    0.0       mulxl        (%rdi), %eax, %ecx
  76 # CHECK-NEXT: 1.     1     9.0    0.0    0.0       addl %eax, %eax
  77 # CHECK-NEXT:        1     5.0    0.5    0.0       <total>
  78
  79 # CHECK:      [1] Code Region
  80
  81 # CHECK:      Iterations:        1
  82 # CHECK-NEXT: Instructions:      2
  83 # CHECK-NEXT: Total Cycles:      12
  84 # CHECK-NEXT: Total uOps:        5
  85
  86 # CHECK:      Dispatch Width:    6
  87 # CHECK-NEXT: uOps Per Cycle:    0.42
  88 # CHECK-NEXT: IPC:               0.17
  89 # CHECK-NEXT: Block RThroughput: 1.0
  90
  91 # CHECK:      Instruction Info:
  92 # CHECK-NEXT: [1]: #uOps
  93 # CHECK-NEXT: [2]: Latency
  94 # CHECK-NEXT: [3]: RThroughput
  95 # CHECK-NEXT: [4]: MayLoad
  96 # CHECK-NEXT: [5]: MayStore
  97 # CHECK-NEXT: [6]: HasSideEffects (U)
  98
  99 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 100 # CHECK-NEXT:  4      9     1.00    *                   mulxq   (%rdi), %rax, %rcx
 101 # CHECK-NEXT:  1      1     0.25                        addq    %rax, %rax
 102
 103 # CHECK:      Resources:
 104 # CHECK-NEXT: [0]   - SKLDivider
 105 # CHECK-NEXT: [1]   - SKLFPDivider
 106 # CHECK-NEXT: [2]   - SKLPort0
 107 # CHECK-NEXT: [3]   - SKLPort1
 108 # CHECK-NEXT: [4]   - SKLPort2
 109 # CHECK-NEXT: [5]   - SKLPort3
 110 # CHECK-NEXT: [6]   - SKLPort4
 111 # CHECK-NEXT: [7]   - SKLPort5
 112 # CHECK-NEXT: [8]   - SKLPort6
 113 # CHECK-NEXT: [9]   - SKLPort7
 114
 115 # CHECK:      Resource pressure per iteration:
 116 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]
 117 # CHECK-NEXT:  -      -      -     1.00    -     1.00    -     1.00   1.00    -
 118
 119 # CHECK:      Resource pressure by instruction:
 120 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Instructions:
 121 # CHECK-NEXT:  -      -      -     1.00    -     1.00    -     1.00    -      -     mulxq       (%rdi), %rax, %rcx
 122 # CHECK-NEXT:  -      -      -      -      -      -      -      -     1.00    -     addq        %rax, %rax
 123
 124 # CHECK:      Timeline view:
 125 # CHECK-NEXT:                     01
 126 # CHECK-NEXT: Index     0123456789
 127
 128 # CHECK:      [0,0]     DeeeeeeeeeER   mulxq    (%rdi), %rax, %rcx
 129 # CHECK-NEXT: [0,1]     D========eER   addq     %rax, %rax
 130
 131 # CHECK:      Average Wait times (based on the timeline view):
 132 # CHECK-NEXT: [0]: Executions
 133 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
 134 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
 135 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
 136
 137 # CHECK:            [0]    [1]    [2]    [3]
 138 # CHECK-NEXT: 0.     1     1.0    1.0    0.0       mulxq        (%rdi), %rax, %rcx
 139 # CHECK-NEXT: 1.     1     9.0    0.0    0.0       addq %rax, %rax
 140 # CHECK-NEXT:        1     5.0    0.5    0.0       <total>