llvm/test/tools/llvm-mca/X86/option-all-views-2.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views                          < %s | FileCheck %s -check-prefixes=ALL,FULLREPORT
   3 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views -resource-pressure       < %s | FileCheck %s -check-prefixes=ALL,FULLREPORT
   4 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure -all-views       < %s | FileCheck %s -check-prefixes=ALL,FULLREPORT
   5 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false -all-views < %s | FileCheck %s -check-prefixes=ALL,FULLREPORT
   6 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL
   7
   8 add %eax, %eax
   9
  10 # ALL:             Iterations:        100
  11 # ALL-NEXT:        Instructions:      100
  12 # ALL-NEXT:        Total Cycles:      103
  13 # ALL-NEXT:        Total uOps:        100
  14
  15 # ALL:             Dispatch Width:    2
  16 # ALL-NEXT:        uOps Per Cycle:    0.97
  17 # ALL-NEXT:        IPC:               0.97
  18 # ALL-NEXT:        Block RThroughput: 0.5
  19
  20 # ALL:             Cycles with backend pressure increase [ 76.70% ]
  21 # ALL-NEXT:        Throughput Bottlenecks:
  22 # ALL-NEXT:          Resource Pressure       [ 0.00% ]
  23 # ALL-NEXT:          Data Dependencies:      [ 76.70% ]
  24 # ALL-NEXT:          - Register Dependencies [ 76.70% ]
  25 # ALL-NEXT:          - Memory Dependencies   [ 0.00% ]
  26
  27 # ALL:             Critical sequence based on the simulation:
  28
  29 # ALL:                           Instruction                                 Dependency Information
  30 # ALL-NEXT:         +----< 0.    addl   %eax, %eax
  31 # ALL-NEXT:         |
  32 # ALL-NEXT:         |    < loop carried >
  33 # ALL-NEXT:         |
  34 # ALL-NEXT:         +----> 0.    addl   %eax, %eax                        ## REGISTER dependency:  %eax
  35 # ALL-NEXT:         |
  36 # ALL-NEXT:         |    < loop carried >
  37 # ALL-NEXT:         |
  38 # ALL-NEXT:         +----> 0.    addl   %eax, %eax                        ## REGISTER dependency:  %eax
  39
  40 # ALL:             Instruction Info:
  41 # ALL-NEXT:        [1]: #uOps
  42 # ALL-NEXT:        [2]: Latency
  43 # ALL-NEXT:        [3]: RThroughput
  44 # ALL-NEXT:        [4]: MayLoad
  45 # ALL-NEXT:        [5]: MayStore
  46 # ALL-NEXT:        [6]: HasSideEffects (U)
  47
  48 # ALL:             [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  49 # ALL-NEXT:         1      1     0.50                        addl       %eax, %eax
  50
  51 # ALL:             Dynamic Dispatch Stall Cycles:
  52 # ALL-NEXT:        RAT     - Register unavailable:                      0
  53 # ALL-NEXT:        RCU     - Retire tokens unavailable:                 0
  54 # ALL-NEXT:        SCHEDQ  - Scheduler full:                            61  (59.2%)
  55 # ALL-NEXT:        LQ      - Load queue full:                           0
  56 # ALL-NEXT:        SQ      - Store queue full:                          0
  57 # ALL-NEXT:        GROUP   - Static restrictions on the dispatch group: 0
  58 # ALL-NEXT:        USH     - Uncategorised Structural Hazard:           0
  59
  60 # ALL:             Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
  61 # ALL-NEXT:        [# dispatched], [# cycles]
  62 # ALL-NEXT:         0,              22  (21.4%)
  63 # ALL-NEXT:         1,              62  (60.2%)
  64 # ALL-NEXT:         2,              19  (18.4%)
  65
  66 # ALL:             Schedulers - number of cycles where we saw N micro opcodes issued:
  67 # ALL-NEXT:        [# issued], [# cycles]
  68 # ALL-NEXT:         0,          3  (2.9%)
  69 # ALL-NEXT:         1,          100  (97.1%)
  70
  71 # ALL:             Scheduler's queue usage:
  72 # ALL-NEXT:        [1] Resource name.
  73 # ALL-NEXT:        [2] Average number of used buffer entries.
  74 # ALL-NEXT:        [3] Maximum number of used buffer entries.
  75 # ALL-NEXT:        [4] Total number of buffer entries.
  76
  77 # ALL:              [1]            [2]        [3]        [4]
  78 # ALL-NEXT:        JALU01           15         20         20
  79 # ALL-NEXT:        JFPU01           0          0          18
  80 # ALL-NEXT:        JLSAGU           0          0          12
  81
  82 # ALL:             Retire Control Unit - number of cycles where we saw N instructions retired:
  83 # ALL-NEXT:        [# retired], [# cycles]
  84 # ALL-NEXT:         0,           3  (2.9%)
  85 # ALL-NEXT:         1,           100  (97.1%)
  86
  87 # ALL:             Total ROB Entries:                64
  88 # ALL-NEXT:        Max Used ROB Entries:             22  ( 34.4% )
  89 # ALL-NEXT:        Average Used ROB Entries per cy:  17  ( 26.6% )
  90
  91 # ALL:             Register File statistics:
  92 # ALL-NEXT:        Total number of mappings created:    200
  93 # ALL-NEXT:        Max number of mappings used:         44
  94
  95 # ALL:             *  Register File #1 -- JFpuPRF:
  96 # ALL-NEXT:           Number of physical registers:     72
  97 # ALL-NEXT:           Total number of mappings created: 0
  98 # ALL-NEXT:           Max number of mappings used:      0
  99
 100 # ALL:             *  Register File #2 -- JIntegerPRF:
 101 # ALL-NEXT:           Number of physical registers:     64
 102 # ALL-NEXT:           Total number of mappings created: 200
 103 # ALL-NEXT:           Max number of mappings used:      44
 104
 105 # FULLREPORT:      Resources:
 106 # FULLREPORT-NEXT: [0]   - JALU0
 107 # FULLREPORT-NEXT: [1]   - JALU1
 108 # FULLREPORT-NEXT: [2]   - JDiv
 109 # FULLREPORT-NEXT: [3]   - JFPA
 110 # FULLREPORT-NEXT: [4]   - JFPM
 111 # FULLREPORT-NEXT: [5]   - JFPU0
 112 # FULLREPORT-NEXT: [6]   - JFPU1
 113 # FULLREPORT-NEXT: [7]   - JLAGU
 114 # FULLREPORT-NEXT: [8]   - JMul
 115 # FULLREPORT-NEXT: [9]   - JSAGU
 116 # FULLREPORT-NEXT: [10]  - JSTC
 117 # FULLREPORT-NEXT: [11]  - JVALU0
 118 # FULLREPORT-NEXT: [12]  - JVALU1
 119 # FULLREPORT-NEXT: [13]  - JVIMUL
 120
 121 # FULLREPORT:      Resource pressure per iteration:
 122 # FULLREPORT-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
 123 # FULLREPORT-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -
 124
 125 # FULLREPORT:      Resource pressure by instruction:
 126 # FULLREPORT-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
 127 # FULLREPORT-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -     addl       %eax, %eax
 128
 129 # ALL:             Timeline view:
 130 # ALL-NEXT:                            012
 131 # ALL-NEXT:        Index     0123456789
 132
 133 # ALL:             [0,0]     DeER .    . .   addl       %eax, %eax
 134 # ALL-NEXT:        [1,0]     D=eER.    . .   addl       %eax, %eax
 135 # ALL-NEXT:        [2,0]     .D=eER    . .   addl       %eax, %eax
 136 # ALL-NEXT:        [3,0]     .D==eER   . .   addl       %eax, %eax
 137 # ALL-NEXT:        [4,0]     . D==eER  . .   addl       %eax, %eax
 138 # ALL-NEXT:        [5,0]     . D===eER . .   addl       %eax, %eax
 139 # ALL-NEXT:        [6,0]     .  D===eER. .   addl       %eax, %eax
 140 # ALL-NEXT:        [7,0]     .  D====eER .   addl       %eax, %eax
 141 # ALL-NEXT:        [8,0]     .   D====eER.   addl       %eax, %eax
 142 # ALL-NEXT:        [9,0]     .   D=====eER   addl       %eax, %eax
 143
 144 # ALL:             Average Wait times (based on the timeline view):
 145 # ALL-NEXT:        [0]: Executions
 146 # ALL-NEXT:        [1]: Average time spent waiting in a scheduler's queue
 147 # ALL-NEXT:        [2]: Average time spent waiting in a scheduler's queue while ready
 148 # ALL-NEXT:        [3]: Average time elapsed from WB until retire stage
 149
 150 # ALL:                   [0]    [1]    [2]    [3]
 151 # ALL-NEXT:        0.     10    3.5    0.1    0.0       addl    %eax, %eax