llvm/utils/TableGen/CodeGenTarget.h

   1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file defines wrappers for the Target class and related global
  10 // functionality.  This makes it easier to access the data and provides a single
  11 // place that needs to check it for validity.  All of these classes abort
  12 // on error conditions.
  13 //
  14 //===----------------------------------------------------------------------===//
  15
  16 #ifndef LLVM_UTILS_TABLEGEN_CODEGENTARGET_H
  17 #define LLVM_UTILS_TABLEGEN_CODEGENTARGET_H
  18
  19 #include "CodeGenHwModes.h"
  20 #include "InfoByHwMode.h"
  21 #include "SDNodeProperties.h"
  22 #include "llvm/ADT/ArrayRef.h"
  23 #include "llvm/ADT/DenseMap.h"
  24 #include "llvm/ADT/SmallVector.h"
  25 #include "llvm/ADT/StringRef.h"
  26 #include "llvm/CodeGen/MachineValueType.h"
  27 #include <cassert>
  28 #include <memory>
  29 #include <optional>
  30 #include <string>
  31 #include <vector>
  32
  33 namespace llvm {
  34
  35 class RecordKeeper;
  36 class Record;
  37 class CodeGenInstruction;
  38 class CodeGenRegBank;
  39 class CodeGenRegister;
  40 class CodeGenRegisterClass;
  41 class CodeGenSchedModels;
  42 class CodeGenSubRegIndex;
  43
  44 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
  45 /// record corresponds to.
  46 MVT::SimpleValueType getValueType(const Record *Rec);
  47
  48 StringRef getName(MVT::SimpleValueType T);
  49 StringRef getEnumName(MVT::SimpleValueType T);
  50
  51 /// getQualifiedName - Return the name of the specified record, with a
  52 /// namespace qualifier if the record contains one.
  53 std::string getQualifiedName(const Record *R);
  54
  55 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
  56 ///
  57 class CodeGenTarget {
  58   RecordKeeper &Records;
  59   Record *TargetRec;
  60
  61   mutable DenseMap<const Record*,
  62                    std::unique_ptr<CodeGenInstruction>> Instructions;
  63   mutable std::unique_ptr<CodeGenRegBank> RegBank;
  64   mutable std::vector<Record*> RegAltNameIndices;
  65   mutable SmallVector<ValueTypeByHwMode, 8> LegalValueTypes;
  66   CodeGenHwModes CGH;
  67   void ReadRegAltNameIndices() const;
  68   void ReadInstructions() const;
  69   void ReadLegalValueTypes() const;
  70
  71   mutable std::unique_ptr<CodeGenSchedModels> SchedModels;
  72
  73   mutable StringRef InstNamespace;
  74   mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
  75   mutable unsigned NumPseudoInstructions = 0;
  76 public:
  77   CodeGenTarget(RecordKeeper &Records);
  78   ~CodeGenTarget();
  79
  80   Record *getTargetRecord() const { return TargetRec; }
  81   StringRef getName() const;
  82
  83   /// getInstNamespace - Return the target-specific instruction namespace.
  84   ///
  85   StringRef getInstNamespace() const;
  86
  87   /// getRegNamespace - Return the target-specific register namespace.
  88   StringRef getRegNamespace() const;
  89
  90   /// getInstructionSet - Return the InstructionSet object.
  91   ///
  92   Record *getInstructionSet() const;
  93
  94   /// getAllowRegisterRenaming - Return the AllowRegisterRenaming flag value for
  95   /// this target.
  96   ///
  97   bool getAllowRegisterRenaming() const;
  98
  99   /// getAsmParser - Return the AssemblyParser definition for this target.
 100   ///
 101   Record *getAsmParser() const;
 102
 103   /// getAsmParserVariant - Return the AssemblyParserVariant definition for
 104   /// this target.
 105   ///
 106   Record *getAsmParserVariant(unsigned i) const;
 107
 108   /// getAsmParserVariantCount - Return the AssemblyParserVariant definition
 109   /// available for this target.
 110   ///
 111   unsigned getAsmParserVariantCount() const;
 112
 113   /// getAsmWriter - Return the AssemblyWriter definition for this target.
 114   ///
 115   Record *getAsmWriter() const;
 116
 117   /// getRegBank - Return the register bank description.
 118   CodeGenRegBank &getRegBank() const;
 119
 120   /// Return the largest register class on \p RegBank which supports \p Ty and
 121   /// covers \p SubIdx if it exists.
 122   std::optional<CodeGenRegisterClass *>
 123   getSuperRegForSubReg(const ValueTypeByHwMode &Ty, CodeGenRegBank &RegBank,
 124                        const CodeGenSubRegIndex *SubIdx,
 125                        bool MustBeAllocatable = false) const;
 126
 127   /// getRegisterByName - If there is a register with the specific AsmName,
 128   /// return it.
 129   const CodeGenRegister *getRegisterByName(StringRef Name) const;
 130
 131   const std::vector<Record*> &getRegAltNameIndices() const {
 132     if (RegAltNameIndices.empty()) ReadRegAltNameIndices();
 133     return RegAltNameIndices;
 134   }
 135
 136   const CodeGenRegisterClass &getRegisterClass(Record *R) const;
 137
 138   /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
 139   /// specified physical register.
 140   std::vector<ValueTypeByHwMode> getRegisterVTs(Record *R) const;
 141
 142   ArrayRef<ValueTypeByHwMode> getLegalValueTypes() const {
 143     if (LegalValueTypes.empty())
 144       ReadLegalValueTypes();
 145     return LegalValueTypes;
 146   }
 147
 148   CodeGenSchedModels &getSchedModels() const;
 149
 150   const CodeGenHwModes &getHwModes() const { return CGH; }
 151
 152 private:
 153   DenseMap<const Record*, std::unique_ptr<CodeGenInstruction>> &
 154   getInstructions() const {
 155     if (Instructions.empty()) ReadInstructions();
 156     return Instructions;
 157   }
 158 public:
 159
 160   CodeGenInstruction &getInstruction(const Record *InstRec) const {
 161     if (Instructions.empty()) ReadInstructions();
 162     auto I = Instructions.find(InstRec);
 163     assert(I != Instructions.end() && "Not an instruction");
 164     return *I->second;
 165   }
 166
 167   /// Returns the number of predefined instructions.
 168   static unsigned getNumFixedInstructions();
 169
 170   /// Returns the number of pseudo instructions.
 171   unsigned getNumPseudoInstructions() const {
 172     if (InstrsByEnum.empty())
 173       ComputeInstrsByEnum();
 174     return NumPseudoInstructions;
 175   }
 176
 177   /// Return all of the instructions defined by the target, ordered by their
 178   /// enum value.
 179   /// The following order of instructions is also guaranteed:
 180   /// - fixed / generic instructions as declared in TargetOpcodes.def, in order;
 181   /// - pseudo instructions in lexicographical order sorted by name;
 182   /// - other instructions in lexicographical order sorted by name.
 183   ArrayRef<const CodeGenInstruction *> getInstructionsByEnumValue() const {
 184     if (InstrsByEnum.empty())
 185       ComputeInstrsByEnum();
 186     return InstrsByEnum;
 187   }
 188
 189   typedef ArrayRef<const CodeGenInstruction *>::const_iterator inst_iterator;
 190   inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
 191   inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
 192
 193
 194   /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
 195   ///
 196   bool isLittleEndianEncoding() const;
 197
 198   /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
 199   /// encodings, reverse the bit order of all instructions.
 200   void reverseBitsForLittleEndianEncoding();
 201
 202   /// guessInstructionProperties - should we just guess unset instruction
 203   /// properties?
 204   bool guessInstructionProperties() const;
 205
 206 private:
 207   void ComputeInstrsByEnum() const;
 208 };
 209
 210 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
 211 /// tablegen class in TargetSelectionDAG.td
 212 class ComplexPattern {
 213   Record *Ty;
 214   unsigned NumOperands;
 215   std::string SelectFunc;
 216   std::vector<Record*> RootNodes;
 217   unsigned Properties; // Node properties
 218   unsigned Complexity;
 219 public:
 220   ComplexPattern(Record *R);
 221
 222   Record *getValueType() const { return Ty; }
 223   unsigned getNumOperands() const { return NumOperands; }
 224   const std::string &getSelectFunc() const { return SelectFunc; }
 225   const std::vector<Record*> &getRootNodes() const {
 226     return RootNodes;
 227   }
 228   bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
 229   unsigned getComplexity() const { return Complexity; }
 230 };
 231
 232 } // End llvm namespace
 233
 234 #endif