llvm/lib/Target/M68k/M68k.td

   1 //===-- M68k.td - Motorola 680x0 target definitions --------*- tablegen -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 ///
   9 /// \file
  10 /// This is a target description file for the Motorola 680x0 family, referred
  11 /// to here as the "M68k" architecture.
  12 ///
  13 //===----------------------------------------------------------------------===//
  14
  15 include "llvm/Target/Target.td"
  16
  17 //===----------------------------------------------------------------------===//
  18 // M68k Subtarget features
  19 //===----------------------------------------------------------------------===//
  20
  21 def FeatureISA00
  22   : SubtargetFeature<"isa-68000", "SubtargetKind", "M00",
  23                      "Is M68000 ISA supported">;
  24
  25 def FeatureISA10
  26   : SubtargetFeature<"isa-68010", "SubtargetKind", "M10",
  27                      "Is M68010 ISA supported",
  28                      [ FeatureISA00 ]>;
  29
  30 def FeatureISA20
  31   : SubtargetFeature<"isa-68020", "SubtargetKind", "M20",
  32                      "Is M68020 ISA supported",
  33                      [ FeatureISA10 ]>;
  34
  35 def FeatureISA30
  36   : SubtargetFeature<"isa-68030", "SubtargetKind", "M30",
  37                      "Is M68030 ISA supported",
  38                      [ FeatureISA20 ]>;
  39
  40 def FeatureISA881
  41   : SubtargetFeature<"isa-68881", "FPUKind", "M881",
  42                      "Is M68881 (FPU) ISA supported">;
  43
  44 def FeatureISA882
  45   : SubtargetFeature<"isa-68882", "FPUKind", "M882",
  46                      "Is M68882 (FPU) ISA supported",
  47                      [ FeatureISA881 ]>;
  48
  49 def FeatureISA40
  50   : SubtargetFeature<"isa-68040", "SubtargetKind", "M40",
  51                      "Is M68040 ISA supported",
  52                      [ FeatureISA30, FeatureISA882 ]>;
  53
  54 def FeatureISA60
  55   : SubtargetFeature<"isa-68060", "SubtargetKind", "M60",
  56                      "Is M68060 ISA supported",
  57                      [ FeatureISA40 ]>;
  58
  59 foreach i = {0-6} in
  60   def FeatureReserveA#i :
  61       SubtargetFeature<"reserve-a"#i, "UserReservedRegister[M68k::A"#i#"]",
  62                        "true", "Reserve A"#i#" register">;
  63 foreach i = {0-7} in
  64   def FeatureReserveD#i :
  65       SubtargetFeature<"reserve-d"#i, "UserReservedRegister[M68k::D"#i#"]",
  66                        "true", "Reserve D"#i#" register">;
  67
  68 //===----------------------------------------------------------------------===//
  69 // M68k processors supported.
  70 //===----------------------------------------------------------------------===//
  71
  72 include "M68kSchedule.td"
  73
  74 class Proc<string Name, list<SubtargetFeature> Features>
  75     : ProcessorModel<Name, GenericM68kModel, Features>;
  76
  77 def : Proc<"generic", [ FeatureISA00 ]>;
  78 def : Proc<"M68000",  [ FeatureISA00 ]>;
  79 def : Proc<"M68010",  [ FeatureISA10 ]>;
  80 def : Proc<"M68020",  [ FeatureISA20 ]>;
  81 def : Proc<"M68030",  [ FeatureISA30 ]>;
  82 def : Proc<"M68040",  [ FeatureISA40 ]>;
  83 def : Proc<"M68060",  [ FeatureISA60 ]>;
  84
  85 //===----------------------------------------------------------------------===//
  86 // Register File Description
  87 //===----------------------------------------------------------------------===//
  88
  89 include "M68kRegisterInfo.td"
  90 include "GISel/M68kRegisterBanks.td"
  91
  92 //===----------------------------------------------------------------------===//
  93 // Instruction Descriptions
  94 //===----------------------------------------------------------------------===//
  95
  96 include "M68kInstrInfo.td"
  97
  98 def M68kInstrInfo : InstrInfo;
  99
 100 //===----------------------------------------------------------------------===//
 101 // Calling Conventions
 102 //===----------------------------------------------------------------------===//
 103
 104 include "M68kCallingConv.td"
 105
 106 //===---------------------------------------------------------------------===//
 107 // Assembly Printers
 108 //===---------------------------------------------------------------------===//
 109
 110 def M68kAsmWriter : AsmWriter {
 111  string AsmWriterClassName = "InstPrinter";
 112  bit isMCAsmWriter = 1;
 113 }
 114
 115 //===---------------------------------------------------------------------===//
 116 // Assembly Parsers
 117 //===---------------------------------------------------------------------===//
 118
 119 def M68kAsmParser : AsmParser {
 120   let ShouldEmitMatchRegisterName = 0;
 121   let ShouldEmitMatchRegisterAltName = 0;
 122 }
 123
 124 def M68kAsmParserVariant : AsmParserVariant {
 125   int Variant = 0;
 126 }
 127
 128 //===----------------------------------------------------------------------===//
 129 // Target
 130 //===----------------------------------------------------------------------===//
 131
 132 def M68k : Target {
 133   let InstructionSet = M68kInstrInfo;
 134   let AssemblyParsers = [M68kAsmParser];
 135   let AssemblyWriters = [M68kAsmWriter];
 136 }