1 //===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
10 #define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
12 #include "AMDGPUFrameLowering.h"
13 #include "SIRegisterInfo.h"
17 class SIFrameLowering final
: public AMDGPUFrameLowering
{
19 SIFrameLowering(StackDirection D
, Align StackAl
, int LAO
,
20 Align TransAl
= Align(1))
21 : AMDGPUFrameLowering(D
, StackAl
, LAO
, TransAl
) {}
22 ~SIFrameLowering() override
= default;
24 void emitEntryFunctionPrologue(MachineFunction
&MF
,
25 MachineBasicBlock
&MBB
) const;
26 void emitPrologue(MachineFunction
&MF
,
27 MachineBasicBlock
&MBB
) const override
;
28 void emitEpilogue(MachineFunction
&MF
,
29 MachineBasicBlock
&MBB
) const override
;
30 StackOffset
getFrameIndexReference(const MachineFunction
&MF
, int FI
,
31 Register
&FrameReg
) const override
;
33 void determineCalleeSaves(MachineFunction
&MF
, BitVector
&SavedRegs
,
34 RegScavenger
*RS
= nullptr) const override
;
35 void determineCalleeSavesSGPR(MachineFunction
&MF
, BitVector
&SavedRegs
,
36 RegScavenger
*RS
= nullptr) const;
37 void determinePrologEpilogSGPRSaves(MachineFunction
&MF
, BitVector
&SavedRegs
,
38 bool NeedExecCopyReservedReg
) const;
39 void emitCSRSpillStores(MachineFunction
&MF
, MachineBasicBlock
&MBB
,
40 MachineBasicBlock::iterator MBBI
, DebugLoc
&DL
,
41 LiveRegUnits
&LiveUnits
, Register FrameReg
,
42 Register FramePtrRegScratchCopy
) const;
43 void emitCSRSpillRestores(MachineFunction
&MF
, MachineBasicBlock
&MBB
,
44 MachineBasicBlock::iterator MBBI
, DebugLoc
&DL
,
45 LiveRegUnits
&LiveUnits
, Register FrameReg
,
46 Register FramePtrRegScratchCopy
) const;
48 assignCalleeSavedSpillSlots(MachineFunction
&MF
,
49 const TargetRegisterInfo
*TRI
,
50 std::vector
<CalleeSavedInfo
> &CSI
) const override
;
52 bool allocateScavengingFrameIndexesNearIncomingSP(
53 const MachineFunction
&MF
) const override
;
55 bool isSupportedStackID(TargetStackID::Value ID
) const override
;
57 void processFunctionBeforeFrameFinalized(
59 RegScavenger
*RS
= nullptr) const override
;
61 void processFunctionBeforeFrameIndicesReplaced(
62 MachineFunction
&MF
, RegScavenger
*RS
= nullptr) const override
;
64 MachineBasicBlock::iterator
65 eliminateCallFramePseudoInstr(MachineFunction
&MF
,
66 MachineBasicBlock
&MBB
,
67 MachineBasicBlock::iterator MI
) const override
;
70 void emitEntryFunctionFlatScratchInit(MachineFunction
&MF
,
71 MachineBasicBlock
&MBB
,
72 MachineBasicBlock::iterator I
,
74 Register ScratchWaveOffsetReg
) const;
76 Register
getEntryFunctionReservedScratchRsrcReg(MachineFunction
&MF
) const;
78 void emitEntryFunctionScratchRsrcRegSetup(
79 MachineFunction
&MF
, MachineBasicBlock
&MBB
,
80 MachineBasicBlock::iterator I
, const DebugLoc
&DL
,
81 Register PreloadedPrivateBufferReg
, Register ScratchRsrcReg
,
82 Register ScratchWaveOffsetReg
) const;
85 bool hasFP(const MachineFunction
&MF
) const override
;
87 bool requiresStackPointerReference(const MachineFunction
&MF
) const;
90 } // end namespace llvm
92 #endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H