Revert " [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432)"
[llvm-project.git] / llvm / lib / Target / AVR / AVRSubtarget.h
blob17505ce1f2258b4c4cc1b4acb7e3490094c0038e
1 //===-- AVRSubtarget.h - Define Subtarget for the AVR -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the AVR specific subclass of TargetSubtargetInfo.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_AVR_SUBTARGET_H
14 #define LLVM_AVR_SUBTARGET_H
16 #include "llvm/CodeGen/TargetSubtargetInfo.h"
17 #include "llvm/IR/DataLayout.h"
18 #include "llvm/Target/TargetMachine.h"
20 #include "AVRFrameLowering.h"
21 #include "AVRISelLowering.h"
22 #include "AVRInstrInfo.h"
23 #include "AVRSelectionDAGInfo.h"
24 #include "MCTargetDesc/AVRMCTargetDesc.h"
26 #define GET_SUBTARGETINFO_HEADER
27 #include "AVRGenSubtargetInfo.inc"
29 namespace llvm {
31 /// A specific AVR target MCU.
32 class AVRSubtarget : public AVRGenSubtargetInfo {
33 public:
34 //! Creates an AVR subtarget.
35 //! \param TT The target triple.
36 //! \param CPU The CPU to target.
37 //! \param FS The feature string.
38 //! \param TM The target machine.
39 AVRSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
40 const AVRTargetMachine &TM);
42 const AVRInstrInfo *getInstrInfo() const override { return &InstrInfo; }
43 const TargetFrameLowering *getFrameLowering() const override {
44 return &FrameLowering;
46 const AVRTargetLowering *getTargetLowering() const override {
47 return &TLInfo;
49 const AVRSelectionDAGInfo *getSelectionDAGInfo() const override {
50 return &TSInfo;
52 const AVRRegisterInfo *getRegisterInfo() const override {
53 return &InstrInfo.getRegisterInfo();
56 /// Parses a subtarget feature string, setting appropriate options.
57 /// \note Definition of function is auto generated by `tblgen`.
58 void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
60 AVRSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
61 const TargetMachine &TM);
63 // Subtarget feature getters.
64 #define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
65 bool GETTER() const { return ATTRIBUTE; }
66 #include "AVRGenSubtargetInfo.inc"
68 uint8_t getIORegisterOffset() const { return hasMemMappedGPR() ? 0x20 : 0x0; }
70 bool enableSubRegLiveness() const override { return true; }
72 /// Gets the ELF architecture for the e_flags field
73 /// of an ELF object file.
74 unsigned getELFArch() const {
75 assert(ELFArch != 0 &&
76 "every device must have an associate ELF architecture");
77 return ELFArch;
80 /// Get I/O register addresses.
81 int getIORegRAMPZ() const { return hasELPM() ? 0x3b : -1; }
82 int getIORegEIND() const { return hasEIJMPCALL() ? 0x3c : -1; }
83 int getIORegSPL() const { return 0x3d; }
84 int getIORegSPH() const { return hasSmallStack() ? -1 : 0x3e; }
85 int getIORegSREG() const { return 0x3f; }
87 /// Get GPR aliases.
88 int getRegTmpIndex() const { return hasTinyEncoding() ? 16 : 0; }
89 int getRegZeroIndex() const { return hasTinyEncoding() ? 17 : 1; }
91 Register getTmpRegister() const {
92 return hasTinyEncoding() ? AVR::R16 : AVR::R0;
94 Register getZeroRegister() const {
95 return hasTinyEncoding() ? AVR::R17 : AVR::R1;
98 private:
99 /// The ELF e_flags architecture.
100 unsigned ELFArch = 0;
102 // Subtarget feature settings
103 #define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
104 bool ATTRIBUTE = DEFAULT;
105 #include "AVRGenSubtargetInfo.inc"
107 AVRInstrInfo InstrInfo;
108 AVRFrameLowering FrameLowering;
109 AVRTargetLowering TLInfo;
110 AVRSelectionDAGInfo TSInfo;
113 } // end namespace llvm
115 #endif // LLVM_AVR_SUBTARGET_H