1 //===- HexagonRDFOpt.cpp --------------------------------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #include "HexagonInstrInfo.h"
10 #include "HexagonSubtarget.h"
11 #include "MCTargetDesc/HexagonBaseInfo.h"
13 #include "RDFDeadCode.h"
14 #include "llvm/ADT/DenseMap.h"
15 #include "llvm/ADT/STLExtras.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/CodeGen/MachineDominanceFrontier.h"
18 #include "llvm/CodeGen/MachineDominators.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineOperand.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/RDFGraph.h"
25 #include "llvm/CodeGen/RDFLiveness.h"
26 #include "llvm/CodeGen/RDFRegisters.h"
27 #include "llvm/InitializePasses.h"
28 #include "llvm/Pass.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Compiler.h"
31 #include "llvm/Support/Debug.h"
32 #include "llvm/Support/ErrorHandling.h"
33 #include "llvm/Support/raw_ostream.h"
43 void initializeHexagonRDFOptPass(PassRegistry
&);
44 FunctionPass
*createHexagonRDFOpt();
46 } // end namespace llvm
48 static unsigned RDFCount
= 0;
50 static cl::opt
<unsigned>
51 RDFLimit("hexagon-rdf-limit",
52 cl::init(std::numeric_limits
<unsigned>::max()));
54 extern cl::opt
<unsigned> RDFFuncBlockLimit
;
56 static cl::opt
<bool> RDFDump("hexagon-rdf-dump", cl::Hidden
);
57 static cl::opt
<bool> RDFTrackReserved("hexagon-rdf-track-reserved", cl::Hidden
);
61 class HexagonRDFOpt
: public MachineFunctionPass
{
63 HexagonRDFOpt() : MachineFunctionPass(ID
) {}
65 void getAnalysisUsage(AnalysisUsage
&AU
) const override
{
66 AU
.addRequired
<MachineDominatorTreeWrapperPass
>();
67 AU
.addRequired
<MachineDominanceFrontier
>();
69 MachineFunctionPass::getAnalysisUsage(AU
);
72 StringRef
getPassName() const override
{
73 return "Hexagon RDF optimizations";
76 bool runOnMachineFunction(MachineFunction
&MF
) override
;
78 MachineFunctionProperties
getRequiredProperties() const override
{
79 return MachineFunctionProperties().set(
80 MachineFunctionProperties::Property::NoVRegs
);
86 MachineDominatorTree
*MDT
;
87 MachineRegisterInfo
*MRI
;
90 struct HexagonCP
: public CopyPropagation
{
91 HexagonCP(DataFlowGraph
&G
) : CopyPropagation(G
) {}
93 bool interpretAsCopy(const MachineInstr
*MI
, EqualityMap
&EM
) override
;
96 struct HexagonDCE
: public DeadCodeElimination
{
97 HexagonDCE(DataFlowGraph
&G
, MachineRegisterInfo
&MRI
)
98 : DeadCodeElimination(G
, MRI
) {}
100 bool rewrite(NodeAddr
<InstrNode
*> IA
, SetVector
<NodeId
> &Remove
);
101 void removeOperand(NodeAddr
<InstrNode
*> IA
, unsigned OpNum
);
106 } // end anonymous namespace
108 char HexagonRDFOpt::ID
= 0;
110 INITIALIZE_PASS_BEGIN(HexagonRDFOpt
, "hexagon-rdf-opt",
111 "Hexagon RDF optimizations", false, false)
112 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass
)
113 INITIALIZE_PASS_DEPENDENCY(MachineDominanceFrontier
)
114 INITIALIZE_PASS_END(HexagonRDFOpt
, "hexagon-rdf-opt",
115 "Hexagon RDF optimizations", false, false)
117 bool HexagonCP::interpretAsCopy(const MachineInstr
*MI
, EqualityMap
&EM
) {
118 auto mapRegs
= [&EM
] (RegisterRef DstR
, RegisterRef SrcR
) -> void {
119 EM
.insert(std::make_pair(DstR
, SrcR
));
122 DataFlowGraph
&DFG
= getDFG();
123 unsigned Opc
= MI
->getOpcode();
125 case Hexagon::A2_combinew
: {
126 const MachineOperand
&DstOp
= MI
->getOperand(0);
127 const MachineOperand
&HiOp
= MI
->getOperand(1);
128 const MachineOperand
&LoOp
= MI
->getOperand(2);
129 assert(DstOp
.getSubReg() == 0 && "Unexpected subregister");
130 mapRegs(DFG
.makeRegRef(DstOp
.getReg(), Hexagon::isub_hi
),
131 DFG
.makeRegRef(HiOp
.getReg(), HiOp
.getSubReg()));
132 mapRegs(DFG
.makeRegRef(DstOp
.getReg(), Hexagon::isub_lo
),
133 DFG
.makeRegRef(LoOp
.getReg(), LoOp
.getSubReg()));
136 case Hexagon::A2_addi
: {
137 const MachineOperand
&A
= MI
->getOperand(2);
138 if (!A
.isImm() || A
.getImm() != 0)
142 case Hexagon::A2_tfr
: {
143 const MachineOperand
&DstOp
= MI
->getOperand(0);
144 const MachineOperand
&SrcOp
= MI
->getOperand(1);
145 mapRegs(DFG
.makeRegRef(DstOp
.getReg(), DstOp
.getSubReg()),
146 DFG
.makeRegRef(SrcOp
.getReg(), SrcOp
.getSubReg()));
151 return CopyPropagation::interpretAsCopy(MI
, EM
);
154 bool HexagonDCE::run() {
155 bool Collected
= collect();
159 const SetVector
<NodeId
> &DeadNodes
= getDeadNodes();
160 const SetVector
<NodeId
> &DeadInstrs
= getDeadInstrs();
162 using RefToInstrMap
= DenseMap
<NodeId
, NodeId
>;
165 SetVector
<NodeId
> PartlyDead
;
166 DataFlowGraph
&DFG
= getDFG();
168 for (NodeAddr
<BlockNode
*> BA
: DFG
.getFunc().Addr
->members(DFG
)) {
169 for (auto TA
: BA
.Addr
->members_if(DFG
.IsCode
<NodeAttrs::Stmt
>, DFG
)) {
170 NodeAddr
<StmtNode
*> SA
= TA
;
171 for (NodeAddr
<RefNode
*> RA
: SA
.Addr
->members(DFG
)) {
172 R2I
.insert(std::make_pair(RA
.Id
, SA
.Id
));
173 if (DFG
.IsDef(RA
) && DeadNodes
.count(RA
.Id
))
174 if (!DeadInstrs
.count(SA
.Id
))
175 PartlyDead
.insert(SA
.Id
);
181 SetVector
<NodeId
> Remove
= DeadInstrs
;
183 bool Changed
= false;
184 for (NodeId N
: PartlyDead
) {
185 auto SA
= DFG
.addr
<StmtNode
*>(N
);
187 dbgs() << "Partly dead: " << *SA
.Addr
->getCode();
188 Changed
|= rewrite(SA
, Remove
);
191 return erase(Remove
) || Changed
;
194 void HexagonDCE::removeOperand(NodeAddr
<InstrNode
*> IA
, unsigned OpNum
) {
195 MachineInstr
*MI
= NodeAddr
<StmtNode
*>(IA
).Addr
->getCode();
197 auto getOpNum
= [MI
] (MachineOperand
&Op
) -> unsigned {
198 for (unsigned i
= 0, n
= MI
->getNumOperands(); i
!= n
; ++i
)
199 if (&MI
->getOperand(i
) == &Op
)
201 llvm_unreachable("Invalid operand");
203 DenseMap
<NodeId
,unsigned> OpMap
;
204 DataFlowGraph
&DFG
= getDFG();
205 NodeList Refs
= IA
.Addr
->members(DFG
);
206 for (NodeAddr
<RefNode
*> RA
: Refs
)
207 OpMap
.insert(std::make_pair(RA
.Id
, getOpNum(RA
.Addr
->getOp())));
209 MI
->removeOperand(OpNum
);
211 for (NodeAddr
<RefNode
*> RA
: Refs
) {
212 unsigned N
= OpMap
[RA
.Id
];
214 RA
.Addr
->setRegRef(&MI
->getOperand(N
), DFG
);
216 RA
.Addr
->setRegRef(&MI
->getOperand(N
-1), DFG
);
220 bool HexagonDCE::rewrite(NodeAddr
<InstrNode
*> IA
, SetVector
<NodeId
> &Remove
) {
221 if (!getDFG().IsCode
<NodeAttrs::Stmt
>(IA
))
223 DataFlowGraph
&DFG
= getDFG();
224 MachineInstr
&MI
= *NodeAddr
<StmtNode
*>(IA
).Addr
->getCode();
225 auto &HII
= static_cast<const HexagonInstrInfo
&>(DFG
.getTII());
226 if (HII
.getAddrMode(MI
) != HexagonII::PostInc
)
228 unsigned Opc
= MI
.getOpcode();
229 unsigned OpNum
, NewOpc
;
231 case Hexagon::L2_loadri_pi
:
232 NewOpc
= Hexagon::L2_loadri_io
;
235 case Hexagon::L2_loadrd_pi
:
236 NewOpc
= Hexagon::L2_loadrd_io
;
239 case Hexagon::V6_vL32b_pi
:
240 NewOpc
= Hexagon::V6_vL32b_ai
;
243 case Hexagon::S2_storeri_pi
:
244 NewOpc
= Hexagon::S2_storeri_io
;
247 case Hexagon::S2_storerd_pi
:
248 NewOpc
= Hexagon::S2_storerd_io
;
251 case Hexagon::V6_vS32b_pi
:
252 NewOpc
= Hexagon::V6_vS32b_ai
;
258 auto IsDead
= [this] (NodeAddr
<DefNode
*> DA
) -> bool {
259 return getDeadNodes().count(DA
.Id
);
262 MachineOperand
&Op
= MI
.getOperand(OpNum
);
263 for (NodeAddr
<DefNode
*> DA
: IA
.Addr
->members_if(DFG
.IsDef
, DFG
)) {
264 if (&DA
.Addr
->getOp() != &Op
)
266 Defs
= DFG
.getRelatedRefs(IA
, DA
);
267 if (!llvm::all_of(Defs
, IsDead
))
272 // Mark all nodes in Defs for removal.
277 dbgs() << "Rewriting: " << MI
;
278 MI
.setDesc(HII
.get(NewOpc
));
279 MI
.getOperand(OpNum
+2).setImm(0);
280 removeOperand(IA
, OpNum
);
282 dbgs() << " to: " << MI
;
287 bool HexagonRDFOpt::runOnMachineFunction(MachineFunction
&MF
) {
288 if (skipFunction(MF
.getFunction()))
291 // Perform RDF optimizations only if number of basic blocks in the
292 // function is less than the limit
293 if (MF
.size() > RDFFuncBlockLimit
) {
295 dbgs() << "Skipping " << getPassName() << ": too many basic blocks\n";
299 if (RDFLimit
.getPosition()) {
300 if (RDFCount
>= RDFLimit
)
305 MDT
= &getAnalysis
<MachineDominatorTreeWrapperPass
>().getDomTree();
306 const auto &MDF
= getAnalysis
<MachineDominanceFrontier
>();
307 const auto &HII
= *MF
.getSubtarget
<HexagonSubtarget
>().getInstrInfo();
308 const auto &HRI
= *MF
.getSubtarget
<HexagonSubtarget
>().getRegisterInfo();
309 MRI
= &MF
.getRegInfo();
313 MF
.print(dbgs() << "Before " << getPassName() << "\n", nullptr);
315 DataFlowGraph
G(MF
, HII
, HRI
, *MDT
, MDF
);
316 // Dead phi nodes are necessary for copy propagation: we can add a use
317 // of a register in a block where it would need a phi node, but which
318 // was dead (and removed) during the graph build time.
319 DataFlowGraph::Config Cfg
;
320 Cfg
.Options
= RDFTrackReserved
321 ? BuildOptions::KeepDeadPhis
322 : BuildOptions::KeepDeadPhis
| BuildOptions::OmitReserved
;
326 dbgs() << "Starting copy propagation on: " << MF
.getName() << '\n'
327 << PrintNode
<FuncNode
*>(G
.getFunc(), G
) << '\n';
333 dbgs() << "Starting dead code elimination on: " << MF
.getName() << '\n'
334 << PrintNode
<FuncNode
*>(G
.getFunc(), G
) << '\n';
335 HexagonDCE
DCE(G
, *MRI
);
337 Changed
|= DCE
.run();
341 dbgs() << "Starting liveness recomputation on: " << MF
.getName() << '\n'
342 << PrintNode
<FuncNode
*>(G
.getFunc(), G
) << '\n';
344 Liveness
LV(*MRI
, G
);
352 MF
.print(dbgs() << "After " << getPassName() << "\n", nullptr);
357 FunctionPass
*llvm::createHexagonRDFOpt() {
358 return new HexagonRDFOpt();