Revert " [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432)"
[llvm-project.git] / llvm / lib / Target / MSP430 / MSP430.td
blob38aa30fcf4dd1ee9cda403efe1eb00055c00d11f
1 //===-- MSP430.td - Describe the MSP430 Target Machine -----*- tablegen -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 // This is the top level entry point for the MSP430 target.
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
12 // Target-independent interfaces
13 //===----------------------------------------------------------------------===//
15 include "llvm/Target/Target.td"
17 //===----------------------------------------------------------------------===//
18 // Subtarget Features. 
19 //===----------------------------------------------------------------------===//
20 def FeatureX
21  : SubtargetFeature<"ext", "ExtendedInsts", "true",
22                     "Enable MSP430-X extensions">;
24 def FeatureHWMult16
25  : SubtargetFeature<"hwmult16", "HWMultMode", "HWMult16",
26                     "Enable 16-bit hardware multiplier">;
28 def FeatureHWMult32
29  : SubtargetFeature<"hwmult32", "HWMultMode", "HWMult32",
30                     "Enable 32-bit hardware multiplier">;
32 def FeatureHWMultF5
33  : SubtargetFeature<"hwmultf5", "HWMultMode", "HWMultF5",
34                     "Enable F5 series hardware multiplier">;
36 //===----------------------------------------------------------------------===//
37 // MSP430 supported processors.
38 //===----------------------------------------------------------------------===//
39 class Proc<string Name, list<SubtargetFeature> Features>
40  : Processor<Name, NoItineraries, Features>;
42 def : Proc<"generic",         []>;
43 def : Proc<"msp430",          []>;
44 def : Proc<"msp430x",         [FeatureX]>;
46 //===----------------------------------------------------------------------===//
47 // Register File Description
48 //===----------------------------------------------------------------------===//
50 include "MSP430RegisterInfo.td"
52 //===----------------------------------------------------------------------===//
53 // Calling Convention Description
54 //===----------------------------------------------------------------------===//
56 include "MSP430CallingConv.td"
58 //===----------------------------------------------------------------------===//
59 // Instruction Descriptions
60 //===----------------------------------------------------------------------===//
62 include "MSP430InstrInfo.td"
64 def MSP430InstrInfo : InstrInfo;
66 //===---------------------------------------------------------------------===//
67 // Assembly Printers
68 //===---------------------------------------------------------------------===//
70 def MSP430AsmWriter : AsmWriter {
71   string AsmWriterClassName = "InstPrinter";
74 //===---------------------------------------------------------------------===//
75 // Assembly Parsers
76 //===---------------------------------------------------------------------===//
78 def MSP430AsmParser : AsmParser {
79   let AllowDuplicateRegisterNames = 1;
80   let ShouldEmitMatchRegisterAltName = 1;
83 //===----------------------------------------------------------------------===//
84 // Target Declaration
85 //===----------------------------------------------------------------------===//
87 def MSP430 : Target {
88   let InstructionSet = MSP430InstrInfo;
89   let AssemblyParsers = [MSP430AsmParser];