llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp

   1 //===- NVPTXProxyRegErasure.cpp - NVPTX Proxy Register Instruction Erasure -==//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // The pass is needed to remove ProxyReg instructions and restore related
  10 // registers. The instructions were needed at instruction selection stage to
  11 // make sure that callseq_end nodes won't be removed as "dead nodes". This can
  12 // happen when we expand instructions into libcalls and the call site doesn't
  13 // care about the libcall chain. Call site cares about data flow only, and the
  14 // latest data flow node happens to be before callseq_end. Therefore the node
  15 // becomes dangling and "dead". The ProxyReg acts like an additional data flow
  16 // node *after* the callseq_end in the chain and ensures that everything will be
  17 // preserved.
  18 //
  19 //===----------------------------------------------------------------------===//
  20
  21 #include "NVPTX.h"
  22 #include "llvm/CodeGen/MachineFunctionPass.h"
  23 #include "llvm/CodeGen/MachineInstrBuilder.h"
  24 #include "llvm/CodeGen/MachineRegisterInfo.h"
  25 #include "llvm/CodeGen/TargetInstrInfo.h"
  26 #include "llvm/CodeGen/TargetRegisterInfo.h"
  27
  28 using namespace llvm;
  29
  30 namespace llvm {
  31 void initializeNVPTXProxyRegErasurePass(PassRegistry &);
  32 }
  33
  34 namespace {
  35
  36 struct NVPTXProxyRegErasure : public MachineFunctionPass {
  37 public:
  38   static char ID;
  39   NVPTXProxyRegErasure() : MachineFunctionPass(ID) {
  40     initializeNVPTXProxyRegErasurePass(*PassRegistry::getPassRegistry());
  41   }
  42
  43   bool runOnMachineFunction(MachineFunction &MF) override;
  44
  45   StringRef getPassName() const override {
  46     return "NVPTX Proxy Register Instruction Erasure";
  47   }
  48
  49   void getAnalysisUsage(AnalysisUsage &AU) const override {
  50     MachineFunctionPass::getAnalysisUsage(AU);
  51   }
  52
  53 private:
  54   void replaceMachineInstructionUsage(MachineFunction &MF, MachineInstr &MI);
  55
  56   void replaceRegisterUsage(MachineInstr &Instr, MachineOperand &From,
  57                             MachineOperand &To);
  58 };
  59
  60 } // namespace
  61
  62 char NVPTXProxyRegErasure::ID = 0;
  63
  64 INITIALIZE_PASS(NVPTXProxyRegErasure, "nvptx-proxyreg-erasure", "NVPTX ProxyReg Erasure", false, false)
  65
  66 bool NVPTXProxyRegErasure::runOnMachineFunction(MachineFunction &MF) {
  67   SmallVector<MachineInstr *, 16> RemoveList;
  68
  69   for (auto &BB : MF) {
  70     for (auto &MI : BB) {
  71       switch (MI.getOpcode()) {
  72       case NVPTX::ProxyRegI1:
  73       case NVPTX::ProxyRegI16:
  74       case NVPTX::ProxyRegI32:
  75       case NVPTX::ProxyRegI64:
  76       case NVPTX::ProxyRegF32:
  77       case NVPTX::ProxyRegF64:
  78         replaceMachineInstructionUsage(MF, MI);
  79         RemoveList.push_back(&MI);
  80         break;
  81       }
  82     }
  83   }
  84
  85   for (auto *MI : RemoveList) {
  86     MI->eraseFromParent();
  87   }
  88
  89   return !RemoveList.empty();
  90 }
  91
  92 void NVPTXProxyRegErasure::replaceMachineInstructionUsage(MachineFunction &MF,
  93                                                           MachineInstr &MI) {
  94   auto &InOp = *MI.uses().begin();
  95   auto &OutOp = *MI.defs().begin();
  96
  97   assert(InOp.isReg() && "ProxyReg input operand should be a register.");
  98   assert(OutOp.isReg() && "ProxyReg output operand should be a register.");
  99
 100   for (auto &BB : MF) {
 101     for (auto &I : BB) {
 102       replaceRegisterUsage(I, OutOp, InOp);
 103     }
 104   }
 105 }
 106
 107 void NVPTXProxyRegErasure::replaceRegisterUsage(MachineInstr &Instr,
 108                                                 MachineOperand &From,
 109                                                 MachineOperand &To) {
 110   for (auto &Op : Instr.uses()) {
 111     if (Op.isReg() && Op.getReg() == From.getReg()) {
 112       Op.setReg(To.getReg());
 113     }
 114   }
 115 }
 116
 117 MachineFunctionPass *llvm::createNVPTXProxyRegErasurePass() {
 118   return new NVPTXProxyRegErasure();
 119 }