Revert " [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432)"
[llvm-project.git] / llvm / lib / Target / SPIRV / SPIRV.h
blobe597a1dc8dc06c9f046c6cc885afe92b5d1c3304
1 //===-- SPIRV.h - Top-level interface for SPIR-V representation -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRV_H
10 #define LLVM_LIB_TARGET_SPIRV_SPIRV_H
12 #include "MCTargetDesc/SPIRVMCTargetDesc.h"
13 #include "llvm/CodeGen/MachineFunctionPass.h"
14 #include "llvm/Target/TargetMachine.h"
16 namespace llvm {
17 class SPIRVTargetMachine;
18 class SPIRVSubtarget;
19 class InstructionSelector;
20 class RegisterBankInfo;
22 ModulePass *createSPIRVPrepareFunctionsPass(const SPIRVTargetMachine &TM);
23 FunctionPass *createSPIRVMergeRegionExitTargetsPass();
24 FunctionPass *createSPIRVStripConvergenceIntrinsicsPass();
25 FunctionPass *createSPIRVRegularizerPass();
26 FunctionPass *createSPIRVPreLegalizerPass();
27 FunctionPass *createSPIRVPostLegalizerPass();
28 ModulePass *createSPIRVEmitIntrinsicsPass(SPIRVTargetMachine *TM);
29 InstructionSelector *
30 createSPIRVInstructionSelector(const SPIRVTargetMachine &TM,
31 const SPIRVSubtarget &Subtarget,
32 const RegisterBankInfo &RBI);
34 void initializeSPIRVModuleAnalysisPass(PassRegistry &);
35 void initializeSPIRVConvergenceRegionAnalysisWrapperPassPass(PassRegistry &);
36 void initializeSPIRVPreLegalizerPass(PassRegistry &);
37 void initializeSPIRVPostLegalizerPass(PassRegistry &);
38 void initializeSPIRVEmitIntrinsicsPass(PassRegistry &);
39 } // namespace llvm
41 #endif // LLVM_LIB_TARGET_SPIRV_SPIRV_H