1 // WebAssemblyInstrFloat.td-WebAssembly Float codegen support ---*- tablegen -*-
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// WebAssembly Floating-point operand code-gen constructs.
12 //===----------------------------------------------------------------------===//
14 multiclass UnaryFP<SDNode node, string name, bits<32> f32Inst,
16 defm _F32 : I<(outs F32:$dst), (ins F32:$src), (outs), (ins),
17 [(set F32:$dst, (node F32:$src))],
18 !strconcat("f32.", !strconcat(name, "\t$dst, $src")),
19 !strconcat("f32.", name), f32Inst>;
20 defm _F64 : I<(outs F64:$dst), (ins F64:$src), (outs), (ins),
21 [(set F64:$dst, (node F64:$src))],
22 !strconcat("f64.", !strconcat(name, "\t$dst, $src")),
23 !strconcat("f64.", name), f64Inst>;
25 multiclass BinaryFP<SDNode node, string name, bits<32> f32Inst,
27 defm _F32 : I<(outs F32:$dst), (ins F32:$lhs, F32:$rhs), (outs), (ins),
28 [(set F32:$dst, (node F32:$lhs, F32:$rhs))],
29 !strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
30 !strconcat("f32.", name), f32Inst>;
31 defm _F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
32 [(set F64:$dst, (node F64:$lhs, F64:$rhs))],
33 !strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
34 !strconcat("f64.", name), f64Inst>;
36 multiclass ComparisonFP<CondCode cond, string name, bits<32> f32Inst, bits<32> f64Inst> {
37 defm _F32 : I<(outs I32:$dst), (ins F32:$lhs, F32:$rhs), (outs), (ins),
38 [(set I32:$dst, (setcc F32:$lhs, F32:$rhs, cond))],
39 !strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
40 !strconcat("f32.", name), f32Inst>;
41 defm _F64 : I<(outs I32:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
42 [(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))],
43 !strconcat("f64.", !strconcat(name, "\t$dst, $lhs, $rhs")),
44 !strconcat("f64.", name), f64Inst>;
47 let isCommutable = 1 in
48 defm ADD : BinaryFP<fadd, "add ", 0x92, 0xa0>;
49 defm SUB : BinaryFP<fsub, "sub ", 0x93, 0xa1>;
50 let isCommutable = 1 in
51 defm MUL : BinaryFP<fmul, "mul ", 0x94, 0xa2>;
52 defm DIV : BinaryFP<fdiv, "div ", 0x95, 0xa3>;
53 defm SQRT : UnaryFP<fsqrt, "sqrt", 0x91, 0x9f>;
55 defm ABS : UnaryFP<fabs, "abs ", 0x8b, 0x99>;
56 defm NEG : UnaryFP<fneg, "neg ", 0x8c, 0x9a>;
57 defm COPYSIGN : BinaryFP<fcopysign, "copysign", 0x98, 0xa6>;
59 let isCommutable = 1 in {
60 defm MIN : BinaryFP<fminimum, "min ", 0x96, 0xa4>;
61 defm MAX : BinaryFP<fmaximum, "max ", 0x97, 0xa5>;
64 defm CEIL : UnaryFP<fceil, "ceil", 0x8d, 0x9b>;
65 defm FLOOR : UnaryFP<ffloor, "floor", 0x8e, 0x9c>;
66 defm TRUNC : UnaryFP<ftrunc, "trunc", 0x8f, 0x9d>;
67 defm NEAREST : UnaryFP<fnearbyint, "nearest", 0x90, 0x9e>;
69 // DAGCombine oddly folds casts into the rhs of copysign. Unfold them.
70 def : Pat<(fcopysign F64:$lhs, F32:$rhs),
71 (COPYSIGN_F64 F64:$lhs, (F64_PROMOTE_F32 F32:$rhs))>;
72 def : Pat<(fcopysign F32:$lhs, F64:$rhs),
73 (COPYSIGN_F32 F32:$lhs, (F32_DEMOTE_F64 F64:$rhs))>;
75 // WebAssembly doesn't expose inexact exceptions, so map frint to fnearbyint.
76 def : Pat<(frint f32:$src), (NEAREST_F32 f32:$src)>;
77 def : Pat<(frint f64:$src), (NEAREST_F64 f64:$src)>;
79 // WebAssembly always rounds ties-to-even, so map froundeven to fnearbyint.
80 def : Pat<(froundeven f32:$src), (NEAREST_F32 f32:$src)>;
81 def : Pat<(froundeven f64:$src), (NEAREST_F64 f64:$src)>;
83 let isCommutable = 1 in {
84 defm EQ : ComparisonFP<SETOEQ, "eq ", 0x5b, 0x61>;
85 defm NE : ComparisonFP<SETUNE, "ne ", 0x5c, 0x62>;
87 defm LT : ComparisonFP<SETOLT, "lt ", 0x5d, 0x63>;
88 defm LE : ComparisonFP<SETOLE, "le ", 0x5f, 0x65>;
89 defm GT : ComparisonFP<SETOGT, "gt ", 0x5e, 0x64>;
90 defm GE : ComparisonFP<SETOGE, "ge ", 0x60, 0x66>;
92 // Don't care floating-point comparisons, supported via other comparisons.
93 def : Pat<(seteq f32:$lhs, f32:$rhs), (EQ_F32 f32:$lhs, f32:$rhs)>;
94 def : Pat<(setne f32:$lhs, f32:$rhs), (NE_F32 f32:$lhs, f32:$rhs)>;
95 def : Pat<(setlt f32:$lhs, f32:$rhs), (LT_F32 f32:$lhs, f32:$rhs)>;
96 def : Pat<(setle f32:$lhs, f32:$rhs), (LE_F32 f32:$lhs, f32:$rhs)>;
97 def : Pat<(setgt f32:$lhs, f32:$rhs), (GT_F32 f32:$lhs, f32:$rhs)>;
98 def : Pat<(setge f32:$lhs, f32:$rhs), (GE_F32 f32:$lhs, f32:$rhs)>;
99 def : Pat<(seteq f64:$lhs, f64:$rhs), (EQ_F64 f64:$lhs, f64:$rhs)>;
100 def : Pat<(setne f64:$lhs, f64:$rhs), (NE_F64 f64:$lhs, f64:$rhs)>;
101 def : Pat<(setlt f64:$lhs, f64:$rhs), (LT_F64 f64:$lhs, f64:$rhs)>;
102 def : Pat<(setle f64:$lhs, f64:$rhs), (LE_F64 f64:$lhs, f64:$rhs)>;
103 def : Pat<(setgt f64:$lhs, f64:$rhs), (GT_F64 f64:$lhs, f64:$rhs)>;
104 def : Pat<(setge f64:$lhs, f64:$rhs), (GE_F64 f64:$lhs, f64:$rhs)>;
106 defm SELECT_F32 : I<(outs F32:$dst), (ins F32:$lhs, F32:$rhs, I32:$cond),
108 [(set F32:$dst, (select I32:$cond, F32:$lhs, F32:$rhs))],
109 "f32.select\t$dst, $lhs, $rhs, $cond", "f32.select", 0x1b>;
110 defm SELECT_F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs, I32:$cond),
112 [(set F64:$dst, (select I32:$cond, F64:$lhs, F64:$rhs))],
113 "f64.select\t$dst, $lhs, $rhs, $cond", "f64.select", 0x1b>;
115 // ISD::SELECT requires its operand to conform to getBooleanContents, but
116 // WebAssembly's select interprets any non-zero value as true, so we can fold
117 // a setne with 0 into a select.
118 def : Pat<(select (i32 (setne I32:$cond, 0)), F32:$lhs, F32:$rhs),
119 (SELECT_F32 F32:$lhs, F32:$rhs, I32:$cond)>;
120 def : Pat<(select (i32 (setne I32:$cond, 0)), F64:$lhs, F64:$rhs),
121 (SELECT_F64 F64:$lhs, F64:$rhs, I32:$cond)>;
123 // And again, this time with seteq instead of setne and the arms reversed.
124 def : Pat<(select (i32 (seteq I32:$cond, 0)), F32:$lhs, F32:$rhs),
125 (SELECT_F32 F32:$rhs, F32:$lhs, I32:$cond)>;
126 def : Pat<(select (i32 (seteq I32:$cond, 0)), F64:$lhs, F64:$rhs),
127 (SELECT_F64 F64:$rhs, F64:$lhs, I32:$cond)>;