1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5 target triple = "aarch64"
7 define void @test_ms1(ptr nocapture %dst, i32 %c, i32 %len) local_unnamed_addr #0 {
9 %0 = trunc i32 %c to i8
10 %conv = zext i32 %len to i64
11 tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 %0, i64 %conv, i1 false)
15 declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1
17 define void @test_ms2_const(ptr nocapture %dst, i32 %c) local_unnamed_addr #0 {
19 %0 = trunc i32 %c to i8
20 tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 %0, i64 16, i1 false)
24 define void @test_zero_const(ptr nocapture %dst) local_unnamed_addr #0 {
26 tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 0, i64 64, i1 false)
30 define void @test_ms3_const_both(ptr nocapture %dst) local_unnamed_addr #0 {
32 tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 64, i64 16, i1 false)
36 define void @test_ms_vector(ptr nocapture %dst, i32 %c) local_unnamed_addr #0 {
38 %0 = trunc i32 %c to i8
39 tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 %0, i64 16, i1 false)
43 define void @test_ms4_const_both_unaligned(ptr nocapture %dst) local_unnamed_addr #0 {
45 tail call void @llvm.memset.p0.i64(ptr align 1 %dst, i8 64, i64 18, i1 false)
49 define void @minsize(ptr nocapture %dst) minsize { unreachable }
51 declare void @llvm.stackprotector(ptr, ptr) #2
53 attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" }
54 attributes #1 = { argmemonly nounwind }
60 tracksRegLiveness: true
63 liveins: $w1, $w2, $x0
65 ; CHECK-LABEL: name: test_ms1
66 ; CHECK: liveins: $w1, $w2, $x0
67 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
68 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
69 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
70 ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
71 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY2]](s32)
72 ; CHECK: G_MEMSET [[COPY]](p0), [[TRUNC]](s8), [[ZEXT]](s64), 1 :: (store (s8) into %ir.dst)
77 %3:_(s8) = G_TRUNC %1(s32)
78 %4:_(s64) = G_ZEXT %2(s32)
79 G_MEMSET %0(p0), %3(s8), %4(s64), 1 :: (store (s8) into %ir.dst)
86 tracksRegLiveness: true
91 ; CHECK-LABEL: name: test_ms2_const
92 ; CHECK: liveins: $w1, $x0
93 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
94 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
95 ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
96 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s8)
97 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 72340172838076673
98 ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
99 ; CHECK: G_STORE [[MUL]](s64), [[COPY]](p0) :: (store (s64) into %ir.dst, align 1)
100 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
101 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)
102 ; CHECK: G_STORE [[MUL]](s64), [[PTR_ADD]](p0) :: (store (s64) into %ir.dst + 8, align 1)
103 ; CHECK: RET_ReallyLR
106 %3:_(s64) = G_CONSTANT i64 16
107 %2:_(s8) = G_TRUNC %1(s32)
108 G_MEMSET %0(p0), %2(s8), %3(s64), 1 :: (store (s8) into %ir.dst)
113 name: test_zero_const
115 tracksRegLiveness: true
120 ; CHECK-LABEL: name: test_zero_const
121 ; CHECK: liveins: $w1, $x0
122 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
123 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
124 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
125 ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>) into %ir.dst, align 1)
126 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
127 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)
128 ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[PTR_ADD]](p0) :: (store (<2 x s64>) into %ir.dst + 16, align 1)
129 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
130 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64)
131 ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[PTR_ADD1]](p0) :: (store (<2 x s64>) into %ir.dst + 32, align 1)
132 ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
133 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C3]](s64)
134 ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[PTR_ADD2]](p0) :: (store (<2 x s64>) into %ir.dst + 48, align 1)
135 ; CHECK: RET_ReallyLR
137 %1:_(s32) = G_CONSTANT i32 0
138 %3:_(s64) = G_CONSTANT i64 64
139 %2:_(s8) = G_TRUNC %1(s32)
140 G_MEMSET %0(p0), %2(s8), %3(s64), 1 :: (store (s8) into %ir.dst)
146 name: test_ms3_const_both
148 tracksRegLiveness: true
153 ; CHECK-LABEL: name: test_ms3_const_both
154 ; CHECK: liveins: $x0
155 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
156 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4629771061636907072
157 ; CHECK: G_STORE [[C]](s64), [[COPY]](p0) :: (store (s64) into %ir.dst, align 1)
158 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
159 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)
160 ; CHECK: G_STORE [[C]](s64), [[PTR_ADD]](p0) :: (store (s64) into %ir.dst + 8, align 1)
161 ; CHECK: RET_ReallyLR
163 %1:_(s8) = G_CONSTANT i8 64
164 %2:_(s64) = G_CONSTANT i64 16
165 G_MEMSET %0(p0), %1(s8), %2(s64), 1 :: (store (s8) into %ir.dst)
172 tracksRegLiveness: true
177 ; CHECK-LABEL: name: test_ms_vector
178 ; CHECK: liveins: $w1, $x0
179 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
180 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
181 ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
182 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s8)
183 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 72340172838076673
184 ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
185 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MUL]](s64), [[MUL]](s64)
186 ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>) into %ir.dst, align 1)
187 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
188 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)
189 ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[PTR_ADD]](p0) :: (store (<2 x s64>) into %ir.dst + 16, align 1)
190 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
191 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64)
192 ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[PTR_ADD1]](p0) :: (store (<2 x s64>) into %ir.dst + 32, align 1)
193 ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 44
194 ; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C3]](s64)
195 ; CHECK: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[PTR_ADD2]](p0) :: (store (<2 x s64>) into %ir.dst + 44, align 1)
196 ; CHECK: RET_ReallyLR
199 %3:_(s64) = G_CONSTANT i64 60
200 %2:_(s8) = G_TRUNC %1(s32)
201 G_MEMSET %0(p0), %2(s8), %3(s64), 1 :: (store (s8) into %ir.dst)
206 name: test_ms4_const_both_unaligned
208 tracksRegLiveness: true
213 ; CHECK-LABEL: name: test_ms4_const_both_unaligned
214 ; CHECK: liveins: $x0
215 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
216 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4629771061636907072
217 ; CHECK: G_STORE [[C]](s64), [[COPY]](p0) :: (store (s64) into %ir.dst, align 1)
218 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
219 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)
220 ; CHECK: G_STORE [[C]](s64), [[PTR_ADD]](p0) :: (store (s64) into %ir.dst + 8, align 1)
221 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)
222 ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
223 ; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C2]](s64)
224 ; CHECK: G_STORE [[TRUNC]](s16), [[PTR_ADD1]](p0) :: (store (s16) into %ir.dst + 16, align 1)
225 ; CHECK: RET_ReallyLR
227 %1:_(s8) = G_CONSTANT i8 64
228 %2:_(s64) = G_CONSTANT i64 18
229 G_MEMSET %0(p0), %1(s8), %2(s64), 1 :: (store (s8) into %ir.dst)
236 tracksRegLiveness: true
240 ; CHECK-LABEL: name: minsize
241 ; CHECK: liveins: $w1, $x0
242 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
243 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
244 ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
245 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s8)
246 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 72340172838076673
247 ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[ZEXT]], [[C]]
248 ; CHECK: G_STORE [[MUL]](s64), [[COPY]](p0) :: (store (s64) into %ir.dst, align 1)
249 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
250 ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)
251 ; CHECK: G_STORE [[MUL]](s64), [[PTR_ADD]](p0) :: (store (s64) into %ir.dst + 8, align 1)
252 ; CHECK: RET_ReallyLR
255 %3:_(s64) = G_CONSTANT i64 16
256 %2:_(s8) = G_TRUNC %1(s32)
257 G_MEMSET %0(p0), %2(s8), %3(s64), 1 :: (store (s8) into %ir.dst)