1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc %s -verify-machineinstrs -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -mattr=+fullfp16 -o - | FileCheck %s
6 name: test_f64.intrinsic_trunc
10 tracksRegLiveness: true
11 machineFunctionInfo: {}
16 ; CHECK-LABEL: name: test_f64.intrinsic_trunc
18 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
19 ; CHECK: [[FRINTZDr:%[0-9]+]]:fpr64 = nofpexcept FRINTZDr [[COPY]]
20 ; CHECK: $d0 = COPY [[FRINTZDr]]
21 ; CHECK: RET_ReallyLR implicit $d0
22 %0:fpr(s64) = COPY $d0
23 %1:fpr(s64) = G_INTRINSIC_TRUNC %0
25 RET_ReallyLR implicit $d0
29 name: test_f32.intrinsic_trunc
33 tracksRegLiveness: true
34 machineFunctionInfo: {}
39 ; CHECK-LABEL: name: test_f32.intrinsic_trunc
41 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
42 ; CHECK: [[FRINTZSr:%[0-9]+]]:fpr32 = nofpexcept FRINTZSr [[COPY]]
43 ; CHECK: $s0 = COPY [[FRINTZSr]]
44 ; CHECK: RET_ReallyLR implicit $s0
45 %0:fpr(s32) = COPY $s0
46 %1:fpr(s32) = G_INTRINSIC_TRUNC %0
48 RET_ReallyLR implicit $s0
52 name: test_f16.intrinsic_trunc
56 tracksRegLiveness: true
59 machineFunctionInfo: {}
64 ; CHECK-LABEL: name: test_f16.intrinsic_trunc
66 ; CHECK: [[COPY:%[0-9]+]]:fpr16 = COPY $h0
67 ; CHECK: [[FRINTZHr:%[0-9]+]]:fpr16 = nofpexcept FRINTZHr [[COPY]]
68 ; CHECK: $h0 = COPY [[FRINTZHr]]
69 ; CHECK: RET_ReallyLR implicit $h0
70 %0:fpr(s16) = COPY $h0
71 %1:fpr(s16) = G_INTRINSIC_TRUNC %0
73 RET_ReallyLR implicit $h0
77 name: test_v4f16.intrinsic_trunc
81 tracksRegLiveness: true
84 machineFunctionInfo: {}
89 ; CHECK-LABEL: name: test_v4f16.intrinsic_trunc
91 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
92 ; CHECK: [[FRINTZv4f16_:%[0-9]+]]:fpr64 = nofpexcept FRINTZv4f16 [[COPY]]
93 ; CHECK: $d0 = COPY [[FRINTZv4f16_]]
94 ; CHECK: RET_ReallyLR implicit $d0
95 %0:fpr(<4 x s16>) = COPY $d0
96 %1:fpr(<4 x s16>) = G_INTRINSIC_TRUNC %0
97 $d0 = COPY %1(<4 x s16>)
98 RET_ReallyLR implicit $d0
102 name: test_v8f16.intrinsic_trunc
105 regBankSelected: true
106 tracksRegLiveness: true
109 machineFunctionInfo: {}
114 ; CHECK-LABEL: name: test_v8f16.intrinsic_trunc
115 ; CHECK: liveins: $q0
116 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
117 ; CHECK: [[FRINTZv8f16_:%[0-9]+]]:fpr128 = nofpexcept FRINTZv8f16 [[COPY]]
118 ; CHECK: $q0 = COPY [[FRINTZv8f16_]]
119 ; CHECK: RET_ReallyLR implicit $q0
120 %0:fpr(<8 x s16>) = COPY $q0
121 %1:fpr(<8 x s16>) = G_INTRINSIC_TRUNC %0
122 $q0 = COPY %1(<8 x s16>)
123 RET_ReallyLR implicit $q0
127 name: test_v2f32.intrinsic_trunc
130 regBankSelected: true
131 tracksRegLiveness: true
134 machineFunctionInfo: {}
139 ; CHECK-LABEL: name: test_v2f32.intrinsic_trunc
140 ; CHECK: liveins: $d0
141 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
142 ; CHECK: [[FRINTZv2f32_:%[0-9]+]]:fpr64 = nofpexcept FRINTZv2f32 [[COPY]]
143 ; CHECK: $d0 = COPY [[FRINTZv2f32_]]
144 ; CHECK: RET_ReallyLR implicit $d0
145 %0:fpr(<2 x s32>) = COPY $d0
146 %1:fpr(<2 x s32>) = G_INTRINSIC_TRUNC %0
147 $d0 = COPY %1(<2 x s32>)
148 RET_ReallyLR implicit $d0
152 name: test_v4f32.intrinsic_trunc
155 regBankSelected: true
156 tracksRegLiveness: true
159 machineFunctionInfo: {}
164 ; CHECK-LABEL: name: test_v4f32.intrinsic_trunc
165 ; CHECK: liveins: $q0
166 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
167 ; CHECK: [[FRINTZv4f32_:%[0-9]+]]:fpr128 = nofpexcept FRINTZv4f32 [[COPY]]
168 ; CHECK: $q0 = COPY [[FRINTZv4f32_]]
169 ; CHECK: RET_ReallyLR implicit $q0
170 %0:fpr(<4 x s32>) = COPY $q0
171 %1:fpr(<4 x s32>) = G_INTRINSIC_TRUNC %0
172 $q0 = COPY %1(<4 x s32>)
173 RET_ReallyLR implicit $q0
177 name: test_v2f64.intrinsic_trunc
180 regBankSelected: true
181 tracksRegLiveness: true
184 machineFunctionInfo: {}
189 ; CHECK-LABEL: name: test_v2f64.intrinsic_trunc
190 ; CHECK: liveins: $q0
191 ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
192 ; CHECK: [[FRINTZv2f64_:%[0-9]+]]:fpr128 = nofpexcept FRINTZv2f64 [[COPY]]
193 ; CHECK: $q0 = COPY [[FRINTZv2f64_]]
194 ; CHECK: RET_ReallyLR implicit $q0
195 %0:fpr(<2 x s64>) = COPY $q0
196 %1:fpr(<2 x s64>) = G_INTRINSIC_TRUNC %0
197 $q0 = COPY %1(<2 x s64>)
198 RET_ReallyLR implicit $q0