1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple aarch64 -run-pass=machine-sink -sink-insts-to-avoid-spills \
3 # RUN: -machine-sink-cycle-limit=1 -verify-machineinstrs %s -o - 2>&1 | \
4 # RUN: FileCheck %s --check-prefix=SINK1
6 # RUN: llc -mtriple aarch64 -run-pass=machine-sink -sink-insts-to-avoid-spills \
7 # RUN: -machine-sink-cycle-limit=2 -verify-machineinstrs %s -o - 2>&1 | \
8 # RUN: FileCheck %s --check-prefix=SINK2
11 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
12 target triple = "aarch64"
14 @A = external dso_local global [100 x i32], align 4
15 %struct.A = type { i32, i32, i32, i32, i32, i32 }
17 define i32 @do_sink_use_is_not_a_copy(i32 %n) {
19 %cmp63 = icmp sgt i32 %n, 0
20 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
22 for.body.preheader: ; preds = %entry
23 %0 = load i32, ptr @A, align 4
26 for.cond.cleanup: ; preds = %for.body, %entry
27 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
30 for.body: ; preds = %for.body, %for.body.preheader
31 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
32 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
33 %div = sdiv i32 %sum.065, %0
34 %lsr.iv.next = add i32 %lsr.iv, -1
35 %exitcond.not = icmp eq i32 %lsr.iv.next, 0
36 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
41 name: do_sink_use_is_not_a_copy
43 exposesReturnsTwice: false
45 regBankSelected: false
48 tracksRegLiveness: true
51 - { id: 0, class: gpr32, preferred-register: '' }
52 - { id: 1, class: gpr32all, preferred-register: '' }
53 - { id: 2, class: gpr32sp, preferred-register: '' }
54 - { id: 3, class: gpr32, preferred-register: '' }
55 - { id: 4, class: gpr32all, preferred-register: '' }
56 - { id: 5, class: gpr32all, preferred-register: '' }
57 - { id: 6, class: gpr32common, preferred-register: '' }
58 - { id: 7, class: gpr32, preferred-register: '' }
59 - { id: 8, class: gpr64common, preferred-register: '' }
60 - { id: 9, class: gpr32, preferred-register: '' }
61 - { id: 10, class: gpr32, preferred-register: '' }
62 - { id: 11, class: gpr32, preferred-register: '' }
64 - { reg: '$w0', virtual-reg: '%6' }
66 isFrameAddressTaken: false
67 isReturnAddressTaken: false
77 cvBytesOfCalleeSavedRegisters: 0
78 hasOpaqueSPAdjustment: false
80 hasMustTailInVarArgFunc: false
87 debugValueSubstitutions: []
89 machineFunctionInfo: {}
91 ; SINK1-LABEL: name: do_sink_use_is_not_a_copy
93 ; SINK1: successors: %bb.1(0x50000000), %bb.2(0x30000000)
95 ; SINK1: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
96 ; SINK1: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
97 ; SINK1: Bcc 11, %bb.2, implicit $nzcv
99 ; SINK1: bb.1.for.body.preheader:
100 ; SINK1: successors: %bb.3(0x80000000)
101 ; SINK1: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
102 ; SINK1: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
104 ; SINK1: bb.2.for.cond.cleanup:
105 ; SINK1: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3
106 ; SINK1: $w0 = COPY [[PHI]]
107 ; SINK1: RET_ReallyLR implicit $w0
108 ; SINK1: bb.3.for.body:
109 ; SINK1: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
110 ; SINK1: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3
111 ; SINK1: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3
112 ; SINK1: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]
113 ; SINK1: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
114 ; SINK1: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv
115 ; SINK1: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
116 ; SINK1: Bcc 0, %bb.2, implicit $nzcv
118 ; SINK2-LABEL: name: do_sink_use_is_not_a_copy
120 ; SINK2: successors: %bb.1(0x50000000), %bb.2(0x30000000)
121 ; SINK2: liveins: $w0
122 ; SINK2: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
123 ; SINK2: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
124 ; SINK2: Bcc 11, %bb.2, implicit $nzcv
126 ; SINK2: bb.1.for.body.preheader:
127 ; SINK2: successors: %bb.3(0x80000000)
128 ; SINK2: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
129 ; SINK2: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
131 ; SINK2: bb.2.for.cond.cleanup:
132 ; SINK2: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3
133 ; SINK2: $w0 = COPY [[PHI]]
134 ; SINK2: RET_ReallyLR implicit $w0
135 ; SINK2: bb.3.for.body:
136 ; SINK2: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
137 ; SINK2: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3
138 ; SINK2: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3
139 ; SINK2: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]
140 ; SINK2: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
141 ; SINK2: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv
142 ; SINK2: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
143 ; SINK2: Bcc 0, %bb.2, implicit $nzcv
146 successors: %bb.1(0x50000000), %bb.2(0x30000000)
149 %6:gpr32common = COPY $w0
150 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv
151 Bcc 11, %bb.2, implicit $nzcv
154 bb.1.for.body.preheader:
155 successors: %bb.3(0x80000000)
157 %8:gpr64common = ADRP target-flags(aarch64-page) @A
158 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
161 bb.2.for.cond.cleanup:
162 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3
164 RET_ReallyLR implicit $w0
167 successors: %bb.2(0x04000000), %bb.3(0x7c000000)
169 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3
170 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3
171 %10:gpr32 = SDIVWr %3, %9
172 %4:gpr32all = COPY %10
173 %11:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv
174 %5:gpr32all = COPY %11
175 Bcc 0, %bb.2, implicit $nzcv