1 # NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 # RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve -run-pass=peephole-opt -verify-machineinstrs %s -o - | FileCheck %s
4 # Test instruction sequences where PTEST is redundant and thus gets removed.
8 tracksRegLiveness: true
10 - { id: 0, class: ppr_3b }
11 - { id: 1, class: zpr }
12 - { id: 2, class: zpr }
13 - { id: 3, class: ppr }
14 - { id: 4, class: gpr32 }
15 - { id: 5, class: gpr32 }
17 - { reg: '$p0', virtual-reg: '%0' }
18 - { reg: '$z0', virtual-reg: '%1' }
19 - { reg: '$z1', virtual-reg: '%2' }
24 liveins: $p0, $z0, $z1
26 ; Here we check the expected sequence with subsequent tests
27 ; just asserting there is no PTEST instruction.
29 ; CHECK-LABEL: name: cmpeq_nxv16i8
30 ; CHECK: %3:ppr = CMPEQ_PPzZZ_B %0, %1, %2, implicit-def $nzcv
31 ; CHECK-NEXT: %4:gpr32 = COPY $wzr
32 ; CHECK-NEXT: %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
36 %3:ppr = CMPEQ_PPzZZ_B %0, %1, %2, implicit-def dead $nzcv
37 PTEST_PP %0, killed %3, implicit-def $nzcv
39 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
41 RET_ReallyLR implicit $w0
47 tracksRegLiveness: true
49 - { id: 0, class: ppr_3b }
50 - { id: 1, class: zpr }
51 - { id: 2, class: zpr }
52 - { id: 3, class: ppr_3b }
53 - { id: 4, class: ppr }
54 - { id: 5, class: ppr }
55 - { id: 6, class: gpr32 }
56 - { id: 7, class: gpr32 }
58 - { reg: '$p0', virtual-reg: '%0' }
59 - { reg: '$z0', virtual-reg: '%1' }
60 - { reg: '$z1', virtual-reg: '%2' }
65 liveins: $p0, $z0, $z1
67 ; CHECK-LABEL: name: cmpeq_nxv8i16
72 %4:ppr = CMPEQ_PPzZZ_H %0, %1, %2, implicit-def dead $nzcv
73 PTEST_PP %0, %4, implicit-def $nzcv
75 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
77 RET_ReallyLR implicit $w0
83 tracksRegLiveness: true
85 - { id: 0, class: ppr_3b }
86 - { id: 1, class: zpr }
87 - { id: 2, class: zpr }
88 - { id: 3, class: ppr_3b }
89 - { id: 4, class: ppr }
90 - { id: 5, class: ppr }
91 - { id: 6, class: gpr32 }
92 - { id: 7, class: gpr32 }
94 - { reg: '$p0', virtual-reg: '%0' }
95 - { reg: '$z0', virtual-reg: '%1' }
96 - { reg: '$z1', virtual-reg: '%2' }
101 liveins: $p0, $z0, $z1
103 ; CHECK-LABEL: name: cmpeq_nxv4i32
108 %4:ppr = CMPEQ_PPzZZ_S %0, %1, %2, implicit-def dead $nzcv
109 PTEST_PP %0, %4, implicit-def $nzcv
111 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
113 RET_ReallyLR implicit $w0
119 tracksRegLiveness: true
121 - { id: 0, class: ppr_3b }
122 - { id: 1, class: zpr }
123 - { id: 2, class: zpr }
124 - { id: 3, class: ppr_3b }
125 - { id: 4, class: ppr }
126 - { id: 5, class: ppr }
127 - { id: 6, class: gpr32 }
128 - { id: 7, class: gpr32 }
130 - { reg: '$p0', virtual-reg: '%0' }
131 - { reg: '$z0', virtual-reg: '%1' }
132 - { reg: '$z1', virtual-reg: '%2' }
137 liveins: $p0, $z0, $z1
139 ; CHECK-LABEL: name: cmpeq_nxv2i64
144 %4:ppr = CMPEQ_PPzZZ_D %0, %1, %2, implicit-def dead $nzcv
145 PTEST_PP %0, %4, implicit-def $nzcv
147 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
149 RET_ReallyLR implicit $w0
153 name: cmpeq_imm_nxv16i8
155 tracksRegLiveness: true
157 - { id: 0, class: ppr_3b }
158 - { id: 1, class: zpr }
159 - { id: 2, class: ppr }
160 - { id: 3, class: ppr }
161 - { id: 4, class: gpr32 }
162 - { id: 5, class: gpr32 }
164 - { reg: '$p0', virtual-reg: '%0' }
165 - { reg: '$z0', virtual-reg: '%1' }
172 ; CHECK-LABEL: name: cmpeq_imm_nxv16i8
176 %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv
177 %3:ppr = PTRUE_B 31, implicit $vg
178 PTEST_PP killed %3, killed %2, implicit-def $nzcv
180 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
182 RET_ReallyLR implicit $w0
186 name: cmpeq_imm_nxv8i16
188 tracksRegLiveness: true
190 - { id: 0, class: ppr_3b }
191 - { id: 1, class: zpr }
192 - { id: 2, class: ppr }
193 - { id: 3, class: ppr }
194 - { id: 4, class: ppr }
195 - { id: 5, class: gpr32 }
196 - { id: 6, class: gpr32 }
198 - { reg: '$p0', virtual-reg: '%0' }
199 - { reg: '$z0', virtual-reg: '%1' }
206 ; CHECK-LABEL: name: cmpeq_imm_nxv8i16
210 %2:ppr = CMPEQ_PPzZI_H %0, %1, 0, implicit-def dead $nzcv
211 PTEST_PP %0, %2, implicit-def $nzcv
213 %6:gpr32 = CSINCWr %5, $wzr, 0, implicit $nzcv
215 RET_ReallyLR implicit $w0
219 name: cmpeq_imm_nxv4i32
221 tracksRegLiveness: true
223 - { id: 0, class: ppr_3b }
224 - { id: 1, class: zpr }
225 - { id: 2, class: ppr }
226 - { id: 3, class: ppr }
227 - { id: 4, class: ppr }
228 - { id: 5, class: gpr32 }
229 - { id: 6, class: gpr32 }
231 - { reg: '$p0', virtual-reg: '%0' }
232 - { reg: '$z0', virtual-reg: '%1' }
239 ; CHECK-LABEL: name: cmpeq_imm_nxv4i32
243 %2:ppr = CMPEQ_PPzZI_S %0, %1, 0, implicit-def dead $nzcv
244 PTEST_PP %0, %2, implicit-def $nzcv
246 %6:gpr32 = CSINCWr %5, $wzr, 0, implicit $nzcv
248 RET_ReallyLR implicit $w0
252 name: cmpeq_imm_nxv2i64
254 tracksRegLiveness: true
256 - { id: 0, class: ppr_3b }
257 - { id: 1, class: zpr }
258 - { id: 2, class: ppr }
259 - { id: 3, class: ppr }
260 - { id: 4, class: ppr }
261 - { id: 5, class: gpr32 }
262 - { id: 6, class: gpr32 }
264 - { reg: '$p0', virtual-reg: '%0' }
265 - { reg: '$z0', virtual-reg: '%1' }
272 ; CHECK-LABEL: name: cmpeq_imm_nxv2i64
276 %2:ppr = CMPEQ_PPzZI_D %0, %1, 0, implicit-def dead $nzcv
277 PTEST_PP %0, %2, implicit-def $nzcv
279 %6:gpr32 = CSINCWr %5, $wzr, 0, implicit $nzcv
281 RET_ReallyLR implicit $w0
285 name: cmpeq_wide_nxv16i8
287 tracksRegLiveness: true
289 - { id: 0, class: ppr_3b }
290 - { id: 1, class: zpr }
291 - { id: 2, class: zpr }
292 - { id: 3, class: ppr }
293 - { id: 4, class: gpr32 }
294 - { id: 5, class: gpr32 }
296 - { reg: '$p0', virtual-reg: '%0' }
297 - { reg: '$z0', virtual-reg: '%1' }
298 - { reg: '$z1', virtual-reg: '%2' }
303 liveins: $p0, $z0, $z1
305 ; CHECK-LABEL: name: cmpeq_wide_nxv16i8
310 %3:ppr = CMPEQ_WIDE_PPzZZ_B %0, %1, %2, implicit-def dead $nzcv
311 PTEST_PP %0, killed %3, implicit-def $nzcv
313 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
315 RET_ReallyLR implicit $w0
319 name: cmpeq_wide_nxv8i16
321 tracksRegLiveness: true
323 - { id: 0, class: ppr_3b }
324 - { id: 1, class: zpr }
325 - { id: 2, class: zpr }
326 - { id: 3, class: ppr_3b }
327 - { id: 4, class: ppr }
328 - { id: 5, class: ppr }
329 - { id: 6, class: gpr32 }
330 - { id: 7, class: gpr32 }
332 - { reg: '$p0', virtual-reg: '%0' }
333 - { reg: '$z0', virtual-reg: '%1' }
334 - { reg: '$z1', virtual-reg: '%2' }
339 liveins: $p0, $z0, $z1
341 ; CHECK-LABEL: name: cmpeq_wide_nxv8i16
346 %4:ppr = CMPEQ_WIDE_PPzZZ_H %0, %1, %2, implicit-def dead $nzcv
347 PTEST_PP %0, %4, implicit-def $nzcv
349 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
351 RET_ReallyLR implicit $w0
355 name: cmpeq_wide_nxv4i32
357 tracksRegLiveness: true
359 - { id: 0, class: ppr_3b }
360 - { id: 1, class: zpr }
361 - { id: 2, class: zpr }
362 - { id: 3, class: ppr_3b }
363 - { id: 4, class: ppr }
364 - { id: 5, class: ppr }
365 - { id: 6, class: gpr32 }
366 - { id: 7, class: gpr32 }
368 - { reg: '$p0', virtual-reg: '%0' }
369 - { reg: '$z0', virtual-reg: '%1' }
370 - { reg: '$z1', virtual-reg: '%2' }
375 liveins: $p0, $z0, $z1
377 ; CHECK-LABEL: name: cmpeq_wide_nxv4i32
382 %4:ppr = CMPEQ_WIDE_PPzZZ_S %0, %1, %2, implicit-def dead $nzcv
383 PTEST_PP %0, %4, implicit-def $nzcv
385 %7:gpr32 = CSINCWr %6, $wzr, 0, implicit $nzcv
387 RET_ReallyLR implicit $w0
391 name: cmpeq_imm_nxv16i8_ptest_not_all_active
393 tracksRegLiveness: true
395 - { id: 0, class: ppr_3b }
396 - { id: 1, class: zpr }
397 - { id: 2, class: ppr }
398 - { id: 3, class: ppr }
399 - { id: 4, class: gpr32 }
400 - { id: 5, class: gpr32 }
402 - { reg: '$p0', virtual-reg: '%0' }
403 - { reg: '$z0', virtual-reg: '%1' }
410 ; CHECK-LABEL: name: cmpeq_imm_nxv16i8_ptest_not_all_active
411 ; CHECK: %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv
412 ; CHECK-NEXT: %3:ppr = PTRUE_B 0, implicit $vg
413 ; CHECK-NEXT: PTEST_PP killed %3, killed %2, implicit-def $nzcv
414 ; CHECK-NEXT: %4:gpr32 = COPY $wzr
415 ; CHECK-NEXT: %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
418 %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv
419 %3:ppr = PTRUE_B 0, implicit $vg
420 PTEST_PP killed %3, killed %2, implicit-def $nzcv
422 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
424 RET_ReallyLR implicit $w0
428 name: cmpeq_imm_nxv16i8_ptest_of_halfs
430 tracksRegLiveness: true
432 - { id: 0, class: ppr_3b }
433 - { id: 1, class: zpr }
434 - { id: 2, class: ppr }
435 - { id: 3, class: ppr }
436 - { id: 4, class: gpr32 }
437 - { id: 5, class: gpr32 }
439 - { reg: '$p0', virtual-reg: '%0' }
440 - { reg: '$z0', virtual-reg: '%1' }
447 ; CHECK-LABEL: name: cmpeq_imm_nxv16i8_ptest_of_halfs
448 ; CHECK: %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv
449 ; CHECK-NEXT: %3:ppr = PTRUE_H 31, implicit $vg
450 ; CHECK-NEXT: PTEST_PP killed %3, killed %2, implicit-def $nzcv
451 ; CHECK-NEXT: %4:gpr32 = COPY $wzr
452 ; CHECK-NEXT: %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
455 %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv
456 %3:ppr = PTRUE_H 31, implicit $vg
457 PTEST_PP killed %3, killed %2, implicit-def $nzcv
459 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
461 RET_ReallyLR implicit $w0
465 name: cmpeq_imm_nxv16i8_ptest_with_unique_pg
467 tracksRegLiveness: true
469 - { id: 0, class: ppr_3b }
470 - { id: 1, class: zpr }
471 - { id: 2, class: ppr }
472 - { id: 3, class: ppr }
473 - { id: 4, class: gpr32 }
474 - { id: 5, class: gpr32 }
476 - { reg: '$p0', virtual-reg: '%0' }
477 - { reg: '$p1', virtual-reg: '%3' }
478 - { reg: '$z0', virtual-reg: '%1' }
483 liveins: $p0, $p1, $z0
485 ; CHECK-LABEL: name: cmpeq_imm_nxv16i8_ptest_with_unique_pg
486 ; CHECK: %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv
487 ; CHECK-NEXT: %3:ppr = COPY $p1
488 ; CHECK-NEXT: PTEST_PP killed %3, killed %2, implicit-def $nzcv
489 ; CHECK-NEXT: %4:gpr32 = COPY $wzr
490 ; CHECK-NEXT: %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
493 %2:ppr = CMPEQ_PPzZI_B %0, %1, 0, implicit-def dead $nzcv
495 PTEST_PP killed %3, killed %2, implicit-def $nzcv
497 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
499 RET_ReallyLR implicit $w0
503 name: cmpeq_nxv16i8_ptest_with_matching_operands
505 tracksRegLiveness: true
507 - { id: 0, class: ppr_3b }
508 - { id: 1, class: zpr }
509 - { id: 2, class: zpr }
510 - { id: 3, class: ppr }
511 - { id: 4, class: gpr32 }
512 - { id: 5, class: gpr32 }
514 - { reg: '$p0', virtual-reg: '%0' }
515 - { reg: '$z0', virtual-reg: '%1' }
516 - { reg: '$z1', virtual-reg: '%2' }
521 liveins: $p0, $z0, $z1
523 ; CHECK-LABEL: name: cmpeq_nxv16i8_ptest_with_matching_operands
528 %3:ppr = CMPEQ_PPzZZ_B %0, %1, %2, implicit-def dead $nzcv
529 PTEST_PP %3, killed %3, implicit-def $nzcv
531 %5:gpr32 = CSINCWr %4, $wzr, 0, implicit $nzcv
533 RET_ReallyLR implicit $w0
536 ## NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: