1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3 ; RUN: llc < %s -mtriple=aarch64-- -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
5 declare i4 @llvm.usub.sat.i4(i4, i4)
6 declare i8 @llvm.usub.sat.i8(i8, i8)
7 declare i16 @llvm.usub.sat.i16(i16, i16)
8 declare i32 @llvm.usub.sat.i32(i32, i32)
9 declare i64 @llvm.usub.sat.i64(i64, i64)
11 define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
12 ; CHECK-SD-LABEL: func32:
14 ; CHECK-SD-NEXT: mul w8, w1, w2
15 ; CHECK-SD-NEXT: subs w8, w0, w8
16 ; CHECK-SD-NEXT: csel w0, wzr, w8, lo
19 ; CHECK-GI-LABEL: func32:
21 ; CHECK-GI-NEXT: mul w8, w1, w2
22 ; CHECK-GI-NEXT: subs w8, w0, w8
23 ; CHECK-GI-NEXT: cset w9, lo
24 ; CHECK-GI-NEXT: tst w9, #0x1
25 ; CHECK-GI-NEXT: csel w0, wzr, w8, ne
28 %tmp = call i32 @llvm.usub.sat.i32(i32 %x, i32 %a)
32 define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {
33 ; CHECK-SD-LABEL: func64:
35 ; CHECK-SD-NEXT: subs x8, x0, x2
36 ; CHECK-SD-NEXT: csel x0, xzr, x8, lo
39 ; CHECK-GI-LABEL: func64:
41 ; CHECK-GI-NEXT: subs x8, x0, x2
42 ; CHECK-GI-NEXT: cset w9, lo
43 ; CHECK-GI-NEXT: tst w9, #0x1
44 ; CHECK-GI-NEXT: csel x0, xzr, x8, ne
47 %tmp = call i64 @llvm.usub.sat.i64(i64 %x, i64 %z)
51 define i16 @func16(i16 %x, i16 %y, i16 %z) nounwind {
52 ; CHECK-SD-LABEL: func16:
54 ; CHECK-SD-NEXT: mul w8, w1, w2
55 ; CHECK-SD-NEXT: and w9, w0, #0xffff
56 ; CHECK-SD-NEXT: subs w8, w9, w8, uxth
57 ; CHECK-SD-NEXT: csel w0, wzr, w8, lo
60 ; CHECK-GI-LABEL: func16:
62 ; CHECK-GI-NEXT: mul w8, w1, w2
63 ; CHECK-GI-NEXT: and w9, w0, #0xffff
64 ; CHECK-GI-NEXT: sub w8, w9, w8, uxth
65 ; CHECK-GI-NEXT: cmp w8, w8, uxth
66 ; CHECK-GI-NEXT: csel w0, wzr, w8, ne
69 %tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %a)
73 define i8 @func8(i8 %x, i8 %y, i8 %z) nounwind {
74 ; CHECK-SD-LABEL: func8:
76 ; CHECK-SD-NEXT: mul w8, w1, w2
77 ; CHECK-SD-NEXT: and w9, w0, #0xff
78 ; CHECK-SD-NEXT: subs w8, w9, w8, uxtb
79 ; CHECK-SD-NEXT: csel w0, wzr, w8, lo
82 ; CHECK-GI-LABEL: func8:
84 ; CHECK-GI-NEXT: mul w8, w1, w2
85 ; CHECK-GI-NEXT: and w9, w0, #0xff
86 ; CHECK-GI-NEXT: sub w8, w9, w8, uxtb
87 ; CHECK-GI-NEXT: cmp w8, w8, uxtb
88 ; CHECK-GI-NEXT: csel w0, wzr, w8, ne
91 %tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %a)
95 define i4 @func4(i4 %x, i4 %y, i4 %z) nounwind {
96 ; CHECK-SD-LABEL: func4:
98 ; CHECK-SD-NEXT: mul w8, w1, w2
99 ; CHECK-SD-NEXT: and w9, w0, #0xf
100 ; CHECK-SD-NEXT: and w8, w8, #0xf
101 ; CHECK-SD-NEXT: subs w8, w9, w8
102 ; CHECK-SD-NEXT: csel w0, wzr, w8, lo
105 ; CHECK-GI-LABEL: func4:
106 ; CHECK-GI: // %bb.0:
107 ; CHECK-GI-NEXT: mul w8, w1, w2
108 ; CHECK-GI-NEXT: and w9, w0, #0xf
109 ; CHECK-GI-NEXT: and w8, w8, #0xf
110 ; CHECK-GI-NEXT: sub w8, w9, w8
111 ; CHECK-GI-NEXT: and w9, w8, #0xf
112 ; CHECK-GI-NEXT: cmp w8, w9
113 ; CHECK-GI-NEXT: csel w0, wzr, w8, ne
116 %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %a)
119 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: