| blob | e25fa3c001cf53b3769fe863a6a4d364dd4d3dc1 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
3 ; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s \
4 ; RUN: --check-prefix=SMALL64
5 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
6 ; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large < %s \
7 ; RUN: | FileCheck %s --check-prefix=LARGE64
8 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
9 ; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s \
10 ; RUN: --check-prefix=SMALL32
11 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
12 ; RUN: -mtriple powerpc-ibm-aix-xcoff --code-model=large < %s \
13 ; RUN: | FileCheck %s --check-prefix=LARGE32
15 @ThreadLocalVarInit = thread_local(localexec) global double 0x4021947AE147AE14, align 8
16 @VarInit = global double 8.787000e+01, align 8
17 @IThreadLocalVarUninit = internal thread_local(localexec) global double 0.000000e+00, align 8
18 @IThreadLocalVarInit = internal thread_local(localexec) global double 5.870000e+00, align 8
19 @ThreadLocalVarUninit = thread_local(localexec) global double 0.000000e+00, align 8
20 declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) #1
22 define void @storeITLUninit(double noundef %x) {
23 ; SMALL64-LABEL: storeITLUninit:
24 ; SMALL64: # %bb.0: # %entry
25 ; SMALL64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
26 ; SMALL64-NEXT: stfdx f1, r13, r3
27 ; SMALL64-NEXT: blr
28 ;
29 ; LARGE64-LABEL: storeITLUninit:
30 ; LARGE64: # %bb.0: # %entry
31 ; LARGE64-NEXT: addis r3, L..C0@u(r2)
32 ; LARGE64-NEXT: ld r3, L..C0@l(r3)
33 ; LARGE64-NEXT: stfdx f1, r13, r3
34 ; LARGE64-NEXT: blr
35 ;
36 ; SMALL32-LABEL: storeITLUninit:
37 ; SMALL32: # %bb.0: # %entry
38 ; SMALL32-NEXT: mflr r0
39 ; SMALL32-NEXT: stwu r1, -32(r1)
40 ; SMALL32-NEXT: lwz r4, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
41 ; SMALL32-NEXT: bla .__get_tpointer[PR]
42 ; SMALL32-NEXT: stw r0, 40(r1)
43 ; SMALL32-NEXT: stfdx f1, r3, r4
44 ; SMALL32-NEXT: addi r1, r1, 32
45 ; SMALL32-NEXT: lwz r0, 8(r1)
46 ; SMALL32-NEXT: mtlr r0
47 ; SMALL32-NEXT: blr
48 ;
49 ; LARGE32-LABEL: storeITLUninit:
50 ; LARGE32: # %bb.0: # %entry
51 ; LARGE32-NEXT: mflr r0
52 ; LARGE32-NEXT: stwu r1, -32(r1)
53 ; LARGE32-NEXT: stw r0, 40(r1)
54 ; LARGE32-NEXT: addis r3, L..C0@u(r2)
55 ; LARGE32-NEXT: lwz r4, L..C0@l(r3)
56 ; LARGE32-NEXT: bla .__get_tpointer[PR]
57 ; LARGE32-NEXT: stfdx f1, r3, r4
58 ; LARGE32-NEXT: addi r1, r1, 32
59 ; LARGE32-NEXT: lwz r0, 8(r1)
60 ; LARGE32-NEXT: mtlr r0
61 ; LARGE32-NEXT: blr
62 entry:
63 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit)
64 store double %x, ptr %0, align 8
65 ret void
66 }
68 define void @storeITLInit(double noundef %x) {
69 ; SMALL64-LABEL: storeITLInit:
70 ; SMALL64: # %bb.0: # %entry
71 ; SMALL64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
72 ; SMALL64-NEXT: stfdx f1, r13, r3
73 ; SMALL64-NEXT: blr
74 ;
75 ; LARGE64-LABEL: storeITLInit:
76 ; LARGE64: # %bb.0: # %entry
77 ; LARGE64-NEXT: addis r3, L..C1@u(r2)
78 ; LARGE64-NEXT: ld r3, L..C1@l(r3)
79 ; LARGE64-NEXT: stfdx f1, r13, r3
80 ; LARGE64-NEXT: blr
81 ;
82 ; SMALL32-LABEL: storeITLInit:
83 ; SMALL32: # %bb.0: # %entry
84 ; SMALL32-NEXT: mflr r0
85 ; SMALL32-NEXT: stwu r1, -32(r1)
86 ; SMALL32-NEXT: lwz r4, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
87 ; SMALL32-NEXT: bla .__get_tpointer[PR]
88 ; SMALL32-NEXT: stw r0, 40(r1)
89 ; SMALL32-NEXT: stfdx f1, r3, r4
90 ; SMALL32-NEXT: addi r1, r1, 32
91 ; SMALL32-NEXT: lwz r0, 8(r1)
92 ; SMALL32-NEXT: mtlr r0
93 ; SMALL32-NEXT: blr
94 ;
95 ; LARGE32-LABEL: storeITLInit:
96 ; LARGE32: # %bb.0: # %entry
97 ; LARGE32-NEXT: mflr r0
98 ; LARGE32-NEXT: stwu r1, -32(r1)
99 ; LARGE32-NEXT: stw r0, 40(r1)
100 ; LARGE32-NEXT: addis r3, L..C1@u(r2)
101 ; LARGE32-NEXT: lwz r4, L..C1@l(r3)
102 ; LARGE32-NEXT: bla .__get_tpointer[PR]
103 ; LARGE32-NEXT: stfdx f1, r3, r4
104 ; LARGE32-NEXT: addi r1, r1, 32
105 ; LARGE32-NEXT: lwz r0, 8(r1)
106 ; LARGE32-NEXT: mtlr r0
107 ; LARGE32-NEXT: blr
108 entry:
109 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarInit)
110 store double %x, ptr %0, align 8
111 ret void
112 }
114 define void @storeTLUninit(double noundef %x) {
115 ; SMALL64-LABEL: storeTLUninit:
116 ; SMALL64: # %bb.0: # %entry
117 ; SMALL64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
118 ; SMALL64-NEXT: stfdx f1, r13, r3
119 ; SMALL64-NEXT: blr
120 ;
121 ; LARGE64-LABEL: storeTLUninit:
122 ; LARGE64: # %bb.0: # %entry
123 ; LARGE64-NEXT: addis r3, L..C2@u(r2)
124 ; LARGE64-NEXT: ld r3, L..C2@l(r3)
125 ; LARGE64-NEXT: stfdx f1, r13, r3
126 ; LARGE64-NEXT: blr
127 ;
128 ; SMALL32-LABEL: storeTLUninit:
129 ; SMALL32: # %bb.0: # %entry
130 ; SMALL32-NEXT: mflr r0
131 ; SMALL32-NEXT: stwu r1, -32(r1)
132 ; SMALL32-NEXT: lwz r4, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
133 ; SMALL32-NEXT: bla .__get_tpointer[PR]
134 ; SMALL32-NEXT: stw r0, 40(r1)
135 ; SMALL32-NEXT: stfdx f1, r3, r4
136 ; SMALL32-NEXT: addi r1, r1, 32
137 ; SMALL32-NEXT: lwz r0, 8(r1)
138 ; SMALL32-NEXT: mtlr r0
139 ; SMALL32-NEXT: blr
140 ;
141 ; LARGE32-LABEL: storeTLUninit:
142 ; LARGE32: # %bb.0: # %entry
143 ; LARGE32-NEXT: mflr r0
144 ; LARGE32-NEXT: stwu r1, -32(r1)
145 ; LARGE32-NEXT: stw r0, 40(r1)
146 ; LARGE32-NEXT: addis r3, L..C2@u(r2)
147 ; LARGE32-NEXT: lwz r4, L..C2@l(r3)
148 ; LARGE32-NEXT: bla .__get_tpointer[PR]
149 ; LARGE32-NEXT: stfdx f1, r3, r4
150 ; LARGE32-NEXT: addi r1, r1, 32
151 ; LARGE32-NEXT: lwz r0, 8(r1)
152 ; LARGE32-NEXT: mtlr r0
153 ; LARGE32-NEXT: blr
154 entry:
155 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @ThreadLocalVarUninit)
156 store double %x, ptr %0, align 8
157 ret void
158 }
160 define void @storeTLInit(double noundef %x) {
161 ; SMALL64-LABEL: storeTLInit:
162 ; SMALL64: # %bb.0: # %entry
163 ; SMALL64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
164 ; SMALL64-NEXT: stfdx f1, r13, r3
165 ; SMALL64-NEXT: blr
166 ;
167 ; LARGE64-LABEL: storeTLInit:
168 ; LARGE64: # %bb.0: # %entry
169 ; LARGE64-NEXT: addis r3, L..C3@u(r2)
170 ; LARGE64-NEXT: ld r3, L..C3@l(r3)
171 ; LARGE64-NEXT: stfdx f1, r13, r3
172 ; LARGE64-NEXT: blr
173 ;
174 ; SMALL32-LABEL: storeTLInit:
175 ; SMALL32: # %bb.0: # %entry
176 ; SMALL32-NEXT: mflr r0
177 ; SMALL32-NEXT: stwu r1, -32(r1)
178 ; SMALL32-NEXT: lwz r4, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
179 ; SMALL32-NEXT: bla .__get_tpointer[PR]
180 ; SMALL32-NEXT: stw r0, 40(r1)
181 ; SMALL32-NEXT: stfdx f1, r3, r4
182 ; SMALL32-NEXT: addi r1, r1, 32
183 ; SMALL32-NEXT: lwz r0, 8(r1)
184 ; SMALL32-NEXT: mtlr r0
185 ; SMALL32-NEXT: blr
186 ;
187 ; LARGE32-LABEL: storeTLInit:
188 ; LARGE32: # %bb.0: # %entry
189 ; LARGE32-NEXT: mflr r0
190 ; LARGE32-NEXT: stwu r1, -32(r1)
191 ; LARGE32-NEXT: stw r0, 40(r1)
192 ; LARGE32-NEXT: addis r3, L..C3@u(r2)
193 ; LARGE32-NEXT: lwz r4, L..C3@l(r3)
194 ; LARGE32-NEXT: bla .__get_tpointer[PR]
195 ; LARGE32-NEXT: stfdx f1, r3, r4
196 ; LARGE32-NEXT: addi r1, r1, 32
197 ; LARGE32-NEXT: lwz r0, 8(r1)
198 ; LARGE32-NEXT: mtlr r0
199 ; LARGE32-NEXT: blr
200 entry:
201 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @ThreadLocalVarInit)
202 store double %x, ptr %0, align 8
203 ret void
204 }
206 define double @loadITLUninit() {
207 ; SMALL64-LABEL: loadITLUninit:
208 ; SMALL64: # %bb.0: # %entry
209 ; SMALL64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
210 ; SMALL64-NEXT: lfdx f1, r13, r3
211 ; SMALL64-NEXT: blr
212 ;
213 ; LARGE64-LABEL: loadITLUninit:
214 ; LARGE64: # %bb.0: # %entry
215 ; LARGE64-NEXT: addis r3, L..C0@u(r2)
216 ; LARGE64-NEXT: ld r3, L..C0@l(r3)
217 ; LARGE64-NEXT: lfdx f1, r13, r3
218 ; LARGE64-NEXT: blr
219 ;
220 ; SMALL32-LABEL: loadITLUninit:
221 ; SMALL32: # %bb.0: # %entry
222 ; SMALL32-NEXT: mflr r0
223 ; SMALL32-NEXT: stwu r1, -32(r1)
224 ; SMALL32-NEXT: lwz r4, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
225 ; SMALL32-NEXT: stw r0, 40(r1)
226 ; SMALL32-NEXT: bla .__get_tpointer[PR]
227 ; SMALL32-NEXT: lfdx f1, r3, r4
228 ; SMALL32-NEXT: addi r1, r1, 32
229 ; SMALL32-NEXT: lwz r0, 8(r1)
230 ; SMALL32-NEXT: mtlr r0
231 ; SMALL32-NEXT: blr
232 ;
233 ; LARGE32-LABEL: loadITLUninit:
234 ; LARGE32: # %bb.0: # %entry
235 ; LARGE32-NEXT: mflr r0
236 ; LARGE32-NEXT: stwu r1, -32(r1)
237 ; LARGE32-NEXT: stw r0, 40(r1)
238 ; LARGE32-NEXT: addis r3, L..C0@u(r2)
239 ; LARGE32-NEXT: lwz r4, L..C0@l(r3)
240 ; LARGE32-NEXT: bla .__get_tpointer[PR]
241 ; LARGE32-NEXT: lfdx f1, r3, r4
242 ; LARGE32-NEXT: addi r1, r1, 32
243 ; LARGE32-NEXT: lwz r0, 8(r1)
244 ; LARGE32-NEXT: mtlr r0
245 ; LARGE32-NEXT: blr
246 entry:
247 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit)
248 %1 = load double, ptr %0, align 8
249 ret double %1
250 }
252 define double @loadITLUninit2() {
253 ; SMALL64-LABEL: loadITLUninit2:
254 ; SMALL64: # %bb.0: # %entry
255 ; SMALL64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
256 ; SMALL64-NEXT: lfdx f0, r13, r3
257 ; SMALL64-NEXT: ld r3, L..C4(r2) # @VarInit
258 ; SMALL64-NEXT: lfd f1, 0(r3)
259 ; SMALL64-NEXT: xsadddp f1, f0, f1
260 ; SMALL64-NEXT: blr
261 ;
262 ; LARGE64-LABEL: loadITLUninit2:
263 ; LARGE64: # %bb.0: # %entry
264 ; LARGE64-NEXT: addis r3, L..C0@u(r2)
265 ; LARGE64-NEXT: ld r3, L..C0@l(r3)
266 ; LARGE64-NEXT: lfdx f0, r13, r3
267 ; LARGE64-NEXT: addis r3, L..C4@u(r2)
268 ; LARGE64-NEXT: ld r3, L..C4@l(r3)
269 ; LARGE64-NEXT: lfd f1, 0(r3)
270 ; LARGE64-NEXT: xsadddp f1, f0, f1
271 ; LARGE64-NEXT: blr
272 ;
273 ; SMALL32-LABEL: loadITLUninit2:
274 ; SMALL32: # %bb.0: # %entry
275 ; SMALL32-NEXT: mflr r0
276 ; SMALL32-NEXT: stwu r1, -32(r1)
277 ; SMALL32-NEXT: lwz r4, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
278 ; SMALL32-NEXT: stw r0, 40(r1)
279 ; SMALL32-NEXT: bla .__get_tpointer[PR]
280 ; SMALL32-NEXT: lfdx f0, r3, r4
281 ; SMALL32-NEXT: lwz r3, L..C4(r2) # @VarInit
282 ; SMALL32-NEXT: lfd f1, 0(r3)
283 ; SMALL32-NEXT: xsadddp f1, f0, f1
284 ; SMALL32-NEXT: addi r1, r1, 32
285 ; SMALL32-NEXT: lwz r0, 8(r1)
286 ; SMALL32-NEXT: mtlr r0
287 ; SMALL32-NEXT: blr
288 ;
289 ; LARGE32-LABEL: loadITLUninit2:
290 ; LARGE32: # %bb.0: # %entry
291 ; LARGE32-NEXT: mflr r0
292 ; LARGE32-NEXT: stwu r1, -32(r1)
293 ; LARGE32-NEXT: stw r0, 40(r1)
294 ; LARGE32-NEXT: addis r3, L..C0@u(r2)
295 ; LARGE32-NEXT: lwz r4, L..C0@l(r3)
296 ; LARGE32-NEXT: bla .__get_tpointer[PR]
297 ; LARGE32-NEXT: lfdx f0, r3, r4
298 ; LARGE32-NEXT: addis r3, L..C4@u(r2)
299 ; LARGE32-NEXT: lwz r3, L..C4@l(r3)
300 ; LARGE32-NEXT: lfd f1, 0(r3)
301 ; LARGE32-NEXT: xsadddp f1, f0, f1
302 ; LARGE32-NEXT: addi r1, r1, 32
303 ; LARGE32-NEXT: lwz r0, 8(r1)
304 ; LARGE32-NEXT: mtlr r0
305 ; LARGE32-NEXT: blr
306 entry:
307 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit)
308 %1 = load double, ptr %0, align 8
309 %2 = load double, ptr @VarInit, align 8
310 %add = fadd double %1, %2
311 ret double %add
312 }
314 define double @loadITLInit() {
315 ; SMALL64-LABEL: loadITLInit:
316 ; SMALL64: # %bb.0: # %entry
317 ; SMALL64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
318 ; SMALL64-NEXT: lfdx f1, r13, r3
319 ; SMALL64-NEXT: blr
320 ;
321 ; LARGE64-LABEL: loadITLInit:
322 ; LARGE64: # %bb.0: # %entry
323 ; LARGE64-NEXT: addis r3, L..C1@u(r2)
324 ; LARGE64-NEXT: ld r3, L..C1@l(r3)
325 ; LARGE64-NEXT: lfdx f1, r13, r3
326 ; LARGE64-NEXT: blr
327 ;
328 ; SMALL32-LABEL: loadITLInit:
329 ; SMALL32: # %bb.0: # %entry
330 ; SMALL32-NEXT: mflr r0
331 ; SMALL32-NEXT: stwu r1, -32(r1)
332 ; SMALL32-NEXT: lwz r4, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
333 ; SMALL32-NEXT: stw r0, 40(r1)
334 ; SMALL32-NEXT: bla .__get_tpointer[PR]
335 ; SMALL32-NEXT: lfdx f1, r3, r4
336 ; SMALL32-NEXT: addi r1, r1, 32
337 ; SMALL32-NEXT: lwz r0, 8(r1)
338 ; SMALL32-NEXT: mtlr r0
339 ; SMALL32-NEXT: blr
340 ;
341 ; LARGE32-LABEL: loadITLInit:
342 ; LARGE32: # %bb.0: # %entry
343 ; LARGE32-NEXT: mflr r0
344 ; LARGE32-NEXT: stwu r1, -32(r1)
345 ; LARGE32-NEXT: stw r0, 40(r1)
346 ; LARGE32-NEXT: addis r3, L..C1@u(r2)
347 ; LARGE32-NEXT: lwz r4, L..C1@l(r3)
348 ; LARGE32-NEXT: bla .__get_tpointer[PR]
349 ; LARGE32-NEXT: lfdx f1, r3, r4
350 ; LARGE32-NEXT: addi r1, r1, 32
351 ; LARGE32-NEXT: lwz r0, 8(r1)
352 ; LARGE32-NEXT: mtlr r0
353 ; LARGE32-NEXT: blr
354 entry:
355 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarInit)
356 %1 = load double, ptr %0, align 8
357 ret double %1
358 }
360 define double @loadITLInit2() {
361 ; SMALL64-LABEL: loadITLInit2:
362 ; SMALL64: # %bb.0: # %entry
363 ; SMALL64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
364 ; SMALL64-NEXT: lfdx f0, r13, r3
365 ; SMALL64-NEXT: ld r3, L..C4(r2) # @VarInit
366 ; SMALL64-NEXT: lfd f1, 0(r3)
367 ; SMALL64-NEXT: xsadddp f1, f0, f1
368 ; SMALL64-NEXT: blr
369 ;
370 ; LARGE64-LABEL: loadITLInit2:
371 ; LARGE64: # %bb.0: # %entry
372 ; LARGE64-NEXT: addis r3, L..C1@u(r2)
373 ; LARGE64-NEXT: ld r3, L..C1@l(r3)
374 ; LARGE64-NEXT: lfdx f0, r13, r3
375 ; LARGE64-NEXT: addis r3, L..C4@u(r2)
376 ; LARGE64-NEXT: ld r3, L..C4@l(r3)
377 ; LARGE64-NEXT: lfd f1, 0(r3)
378 ; LARGE64-NEXT: xsadddp f1, f0, f1
379 ; LARGE64-NEXT: blr
380 ;
381 ; SMALL32-LABEL: loadITLInit2:
382 ; SMALL32: # %bb.0: # %entry
383 ; SMALL32-NEXT: mflr r0
384 ; SMALL32-NEXT: stwu r1, -32(r1)
385 ; SMALL32-NEXT: lwz r4, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
386 ; SMALL32-NEXT: stw r0, 40(r1)
387 ; SMALL32-NEXT: bla .__get_tpointer[PR]
388 ; SMALL32-NEXT: lfdx f0, r3, r4
389 ; SMALL32-NEXT: lwz r3, L..C4(r2) # @VarInit
390 ; SMALL32-NEXT: lfd f1, 0(r3)
391 ; SMALL32-NEXT: xsadddp f1, f0, f1
392 ; SMALL32-NEXT: addi r1, r1, 32
393 ; SMALL32-NEXT: lwz r0, 8(r1)
394 ; SMALL32-NEXT: mtlr r0
395 ; SMALL32-NEXT: blr
396 ;
397 ; LARGE32-LABEL: loadITLInit2:
398 ; LARGE32: # %bb.0: # %entry
399 ; LARGE32-NEXT: mflr r0
400 ; LARGE32-NEXT: stwu r1, -32(r1)
401 ; LARGE32-NEXT: stw r0, 40(r1)
402 ; LARGE32-NEXT: addis r3, L..C1@u(r2)
403 ; LARGE32-NEXT: lwz r4, L..C1@l(r3)
404 ; LARGE32-NEXT: bla .__get_tpointer[PR]
405 ; LARGE32-NEXT: lfdx f0, r3, r4
406 ; LARGE32-NEXT: addis r3, L..C4@u(r2)
407 ; LARGE32-NEXT: lwz r3, L..C4@l(r3)
408 ; LARGE32-NEXT: lfd f1, 0(r3)
409 ; LARGE32-NEXT: xsadddp f1, f0, f1
410 ; LARGE32-NEXT: addi r1, r1, 32
411 ; LARGE32-NEXT: lwz r0, 8(r1)
412 ; LARGE32-NEXT: mtlr r0
413 ; LARGE32-NEXT: blr
414 entry:
415 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarInit)
416 %1 = load double, ptr %0, align 8
417 %2 = load double, ptr @VarInit, align 8
418 %add = fadd double %1, %2
419 ret double %add
420 }
422 define double @loadTLUninit() {
423 ; SMALL64-LABEL: loadTLUninit:
424 ; SMALL64: # %bb.0: # %entry
425 ; SMALL64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
426 ; SMALL64-NEXT: lfdx f1, r13, r3
427 ; SMALL64-NEXT: blr
428 ;
429 ; LARGE64-LABEL: loadTLUninit:
430 ; LARGE64: # %bb.0: # %entry
431 ; LARGE64-NEXT: addis r3, L..C2@u(r2)
432 ; LARGE64-NEXT: ld r3, L..C2@l(r3)
433 ; LARGE64-NEXT: lfdx f1, r13, r3
434 ; LARGE64-NEXT: blr
435 ;
436 ; SMALL32-LABEL: loadTLUninit:
437 ; SMALL32: # %bb.0: # %entry
438 ; SMALL32-NEXT: mflr r0
439 ; SMALL32-NEXT: stwu r1, -32(r1)
440 ; SMALL32-NEXT: lwz r4, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
441 ; SMALL32-NEXT: stw r0, 40(r1)
442 ; SMALL32-NEXT: bla .__get_tpointer[PR]
443 ; SMALL32-NEXT: lfdx f1, r3, r4
444 ; SMALL32-NEXT: addi r1, r1, 32
445 ; SMALL32-NEXT: lwz r0, 8(r1)
446 ; SMALL32-NEXT: mtlr r0
447 ; SMALL32-NEXT: blr
448 ;
449 ; LARGE32-LABEL: loadTLUninit:
450 ; LARGE32: # %bb.0: # %entry
451 ; LARGE32-NEXT: mflr r0
452 ; LARGE32-NEXT: stwu r1, -32(r1)
453 ; LARGE32-NEXT: stw r0, 40(r1)
454 ; LARGE32-NEXT: addis r3, L..C2@u(r2)
455 ; LARGE32-NEXT: lwz r4, L..C2@l(r3)
456 ; LARGE32-NEXT: bla .__get_tpointer[PR]
457 ; LARGE32-NEXT: lfdx f1, r3, r4
458 ; LARGE32-NEXT: addi r1, r1, 32
459 ; LARGE32-NEXT: lwz r0, 8(r1)
460 ; LARGE32-NEXT: mtlr r0
461 ; LARGE32-NEXT: blr
462 entry:
463 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @ThreadLocalVarUninit)
464 %1 = load double, ptr %0, align 8
465 ret double %1
466 }
468 define double @loadTLUninit2() {
469 ; SMALL64-LABEL: loadTLUninit2:
470 ; SMALL64: # %bb.0: # %entry
471 ; SMALL64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
472 ; SMALL64-NEXT: lfdx f0, r13, r3
473 ; SMALL64-NEXT: ld r3, L..C4(r2) # @VarInit
474 ; SMALL64-NEXT: lfd f1, 0(r3)
475 ; SMALL64-NEXT: xsadddp f1, f0, f1
476 ; SMALL64-NEXT: blr
477 ;
478 ; LARGE64-LABEL: loadTLUninit2:
479 ; LARGE64: # %bb.0: # %entry
480 ; LARGE64-NEXT: addis r3, L..C2@u(r2)
481 ; LARGE64-NEXT: ld r3, L..C2@l(r3)
482 ; LARGE64-NEXT: lfdx f0, r13, r3
483 ; LARGE64-NEXT: addis r3, L..C4@u(r2)
484 ; LARGE64-NEXT: ld r3, L..C4@l(r3)
485 ; LARGE64-NEXT: lfd f1, 0(r3)
486 ; LARGE64-NEXT: xsadddp f1, f0, f1
487 ; LARGE64-NEXT: blr
488 ;
489 ; SMALL32-LABEL: loadTLUninit2:
490 ; SMALL32: # %bb.0: # %entry
491 ; SMALL32-NEXT: mflr r0
492 ; SMALL32-NEXT: stwu r1, -32(r1)
493 ; SMALL32-NEXT: lwz r4, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
494 ; SMALL32-NEXT: stw r0, 40(r1)
495 ; SMALL32-NEXT: bla .__get_tpointer[PR]
496 ; SMALL32-NEXT: lfdx f0, r3, r4
497 ; SMALL32-NEXT: lwz r3, L..C4(r2) # @VarInit
498 ; SMALL32-NEXT: lfd f1, 0(r3)
499 ; SMALL32-NEXT: xsadddp f1, f0, f1
500 ; SMALL32-NEXT: addi r1, r1, 32
501 ; SMALL32-NEXT: lwz r0, 8(r1)
502 ; SMALL32-NEXT: mtlr r0
503 ; SMALL32-NEXT: blr
504 ;
505 ; LARGE32-LABEL: loadTLUninit2:
506 ; LARGE32: # %bb.0: # %entry
507 ; LARGE32-NEXT: mflr r0
508 ; LARGE32-NEXT: stwu r1, -32(r1)
509 ; LARGE32-NEXT: stw r0, 40(r1)
510 ; LARGE32-NEXT: addis r3, L..C2@u(r2)
511 ; LARGE32-NEXT: lwz r4, L..C2@l(r3)
512 ; LARGE32-NEXT: bla .__get_tpointer[PR]
513 ; LARGE32-NEXT: lfdx f0, r3, r4
514 ; LARGE32-NEXT: addis r3, L..C4@u(r2)
515 ; LARGE32-NEXT: lwz r3, L..C4@l(r3)
516 ; LARGE32-NEXT: lfd f1, 0(r3)
517 ; LARGE32-NEXT: xsadddp f1, f0, f1
518 ; LARGE32-NEXT: addi r1, r1, 32
519 ; LARGE32-NEXT: lwz r0, 8(r1)
520 ; LARGE32-NEXT: mtlr r0
521 ; LARGE32-NEXT: blr
522 entry:
523 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @ThreadLocalVarUninit)
524 %1 = load double, ptr %0, align 8
525 %2 = load double, ptr @VarInit, align 8
526 %add = fadd double %1, %2
527 ret double %add
528 }
530 define double @loadTLInit() {
531 ; SMALL64-LABEL: loadTLInit:
532 ; SMALL64: # %bb.0: # %entry
533 ; SMALL64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
534 ; SMALL64-NEXT: lfdx f1, r13, r3
535 ; SMALL64-NEXT: blr
536 ;
537 ; LARGE64-LABEL: loadTLInit:
538 ; LARGE64: # %bb.0: # %entry
539 ; LARGE64-NEXT: addis r3, L..C3@u(r2)
540 ; LARGE64-NEXT: ld r3, L..C3@l(r3)
541 ; LARGE64-NEXT: lfdx f1, r13, r3
542 ; LARGE64-NEXT: blr
543 ;
544 ; SMALL32-LABEL: loadTLInit:
545 ; SMALL32: # %bb.0: # %entry
546 ; SMALL32-NEXT: mflr r0
547 ; SMALL32-NEXT: stwu r1, -32(r1)
548 ; SMALL32-NEXT: lwz r4, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
549 ; SMALL32-NEXT: stw r0, 40(r1)
550 ; SMALL32-NEXT: bla .__get_tpointer[PR]
551 ; SMALL32-NEXT: lfdx f1, r3, r4
552 ; SMALL32-NEXT: addi r1, r1, 32
553 ; SMALL32-NEXT: lwz r0, 8(r1)
554 ; SMALL32-NEXT: mtlr r0
555 ; SMALL32-NEXT: blr
556 ;
557 ; LARGE32-LABEL: loadTLInit:
558 ; LARGE32: # %bb.0: # %entry
559 ; LARGE32-NEXT: mflr r0
560 ; LARGE32-NEXT: stwu r1, -32(r1)
561 ; LARGE32-NEXT: stw r0, 40(r1)
562 ; LARGE32-NEXT: addis r3, L..C3@u(r2)
563 ; LARGE32-NEXT: lwz r4, L..C3@l(r3)
564 ; LARGE32-NEXT: bla .__get_tpointer[PR]
565 ; LARGE32-NEXT: lfdx f1, r3, r4
566 ; LARGE32-NEXT: addi r1, r1, 32
567 ; LARGE32-NEXT: lwz r0, 8(r1)
568 ; LARGE32-NEXT: mtlr r0
569 ; LARGE32-NEXT: blr
570 entry:
571 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @ThreadLocalVarInit)
572 %1 = load double, ptr %0, align 8
573 ret double %1
574 }
576 define double @loadTLInit2() {
577 ; SMALL64-LABEL: loadTLInit2:
578 ; SMALL64: # %bb.0: # %entry
579 ; SMALL64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
580 ; SMALL64-NEXT: lfdx f0, r13, r3
581 ; SMALL64-NEXT: ld r3, L..C4(r2) # @VarInit
582 ; SMALL64-NEXT: lfd f1, 0(r3)
583 ; SMALL64-NEXT: xsadddp f1, f0, f1
584 ; SMALL64-NEXT: blr
585 ;
586 ; LARGE64-LABEL: loadTLInit2:
587 ; LARGE64: # %bb.0: # %entry
588 ; LARGE64-NEXT: addis r3, L..C3@u(r2)
589 ; LARGE64-NEXT: ld r3, L..C3@l(r3)
590 ; LARGE64-NEXT: lfdx f0, r13, r3
591 ; LARGE64-NEXT: addis r3, L..C4@u(r2)
592 ; LARGE64-NEXT: ld r3, L..C4@l(r3)
593 ; LARGE64-NEXT: lfd f1, 0(r3)
594 ; LARGE64-NEXT: xsadddp f1, f0, f1
595 ; LARGE64-NEXT: blr
596 ;
597 ; SMALL32-LABEL: loadTLInit2:
598 ; SMALL32: # %bb.0: # %entry
599 ; SMALL32-NEXT: mflr r0
600 ; SMALL32-NEXT: stwu r1, -32(r1)
601 ; SMALL32-NEXT: lwz r4, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
602 ; SMALL32-NEXT: stw r0, 40(r1)
603 ; SMALL32-NEXT: bla .__get_tpointer[PR]
604 ; SMALL32-NEXT: lfdx f0, r3, r4
605 ; SMALL32-NEXT: lwz r3, L..C4(r2) # @VarInit
606 ; SMALL32-NEXT: lfd f1, 0(r3)
607 ; SMALL32-NEXT: xsadddp f1, f0, f1
608 ; SMALL32-NEXT: addi r1, r1, 32
609 ; SMALL32-NEXT: lwz r0, 8(r1)
610 ; SMALL32-NEXT: mtlr r0
611 ; SMALL32-NEXT: blr
612 ;
613 ; LARGE32-LABEL: loadTLInit2:
614 ; LARGE32: # %bb.0: # %entry
615 ; LARGE32-NEXT: mflr r0
616 ; LARGE32-NEXT: stwu r1, -32(r1)
617 ; LARGE32-NEXT: stw r0, 40(r1)
618 ; LARGE32-NEXT: addis r3, L..C3@u(r2)
619 ; LARGE32-NEXT: lwz r4, L..C3@l(r3)
620 ; LARGE32-NEXT: bla .__get_tpointer[PR]
621 ; LARGE32-NEXT: lfdx f0, r3, r4
622 ; LARGE32-NEXT: addis r3, L..C4@u(r2)
623 ; LARGE32-NEXT: lwz r3, L..C4@l(r3)
624 ; LARGE32-NEXT: lfd f1, 0(r3)
625 ; LARGE32-NEXT: xsadddp f1, f0, f1
626 ; LARGE32-NEXT: addi r1, r1, 32
627 ; LARGE32-NEXT: lwz r0, 8(r1)
628 ; LARGE32-NEXT: mtlr r0
629 ; LARGE32-NEXT: blr
630 entry:
631 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @ThreadLocalVarInit)
632 %1 = load double, ptr %0, align 8
633 %2 = load double, ptr @VarInit, align 8
634 %add = fadd double %1, %2
635 ret double %add
636 }
638 ; TOC Entry Checks.
640 ; SMALL64-LABEL: .toc
641 ; SMALL64-LABEL: L..C0:
642 ; SMALL64-NEXT: .tc IThreadLocalVarUninit[TC],IThreadLocalVarUninit[UL]@le
643 ; SMALL64-LABEL: L..C1:
644 ; SMALL64-NEXT: .tc IThreadLocalVarInit[TC],IThreadLocalVarInit[TL]@le
645 ; SMALL64-LABEL: L..C2:
646 ; SMALL64-NEXT: .tc ThreadLocalVarUninit[TC],ThreadLocalVarUninit[TL]@le
647 ; SMALL64-LABEL: L..C3:
648 ; SMALL64-NEXT: .tc ThreadLocalVarInit[TC],ThreadLocalVarInit[TL]@le
649 ; SMALL64-LABEL: L..C4:
650 ; SMALL64-NEXT: .tc VarInit[TC],VarInit[RW]
652 ; LARGE64-LABEL: .toc
653 ; LARGE64-LABEL: L..C0:
654 ; LARGE64-NEXT: .tc IThreadLocalVarUninit[TE],IThreadLocalVarUninit[UL]@le
655 ; LARGE64-LABEL: L..C1:
656 ; LARGE64-NEXT: .tc IThreadLocalVarInit[TE],IThreadLocalVarInit[TL]@le
657 ; LARGE64-LABEL: L..C2:
658 ; LARGE64-NEXT: .tc ThreadLocalVarUninit[TE],ThreadLocalVarUninit[TL]@le
659 ; LARGE64-LABEL: L..C3:
660 ; LARGE64-NEXT: .tc ThreadLocalVarInit[TE],ThreadLocalVarInit[TL]@le
661 ; LARGE64-LABEL: L..C4:
662 ; LARGE64-NEXT: .tc VarInit[TE],VarInit[RW]
664 ; SMALL32-LABEL: .toc
665 ; SMALL32-LABEL: L..C0:
666 ; SMALL32-NEXT: .tc IThreadLocalVarUninit[TC],IThreadLocalVarUninit[UL]@le
667 ; SMALL32-LABEL: L..C1:
668 ; SMALL32-NEXT: .tc IThreadLocalVarInit[TC],IThreadLocalVarInit[TL]@le
669 ; SMALL32-LABEL: L..C2:
670 ; SMALL32-NEXT: .tc ThreadLocalVarUninit[TC],ThreadLocalVarUninit[TL]@le
671 ; SMALL32-LABEL: L..C3:
672 ; SMALL32-NEXT: .tc ThreadLocalVarInit[TC],ThreadLocalVarInit[TL]@le
673 ; SMALL32-LABEL: L..C4:
674 ; SMALL32-NEXT: .tc VarInit[TC],VarInit[RW]
676 ; LARGE32-LABEL: .toc
677 ; LARGE32-LABEL: L..C0:
678 ; LARGE32-NEXT: .tc IThreadLocalVarUninit[TE],IThreadLocalVarUninit[UL]@le
679 ; LARGE32-LABEL: L..C1:
680 ; LARGE32-NEXT: .tc IThreadLocalVarInit[TE],IThreadLocalVarInit[TL]@le
681 ; LARGE32-LABEL: L..C2:
682 ; LARGE32-NEXT: .tc ThreadLocalVarUninit[TE],ThreadLocalVarUninit[TL]@le
683 ; LARGE32-LABEL: L..C3:
684 ; LARGE32-NEXT: .tc ThreadLocalVarInit[TE],ThreadLocalVarInit[TL]@le
685 ; LARGE32-LABEL: L..C4:
686 ; LARGE32-NEXT: .tc VarInit[TE],VarInit[RW]