| blob | 6c0ea782c2a38320fe288a1052879430da8b46e8 |
1 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
2 ; RUN: -xcoff-traceback-table=false --code-model=large -filetype=obj -o %t.o < %s
3 ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
4 ; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
5 ; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
7 @ThreadLocalVarInit = thread_local(localexec) global i64 1, align 8
8 @VarInit = global i64 87, align 8
9 @IThreadLocalVarUninit = internal thread_local(localexec) global i64 0, align 8
10 @IThreadLocalVarUninit2 = internal thread_local(localexec) global i64 0, align 8
11 declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
13 define void @storeITLUninit(i64 noundef %x) {
14 entry:
15 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit)
16 store i64 %x, ptr %0, align 8
17 ret void
18 }
20 define i64 @loadTLInit() {
21 entry:
22 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @ThreadLocalVarInit)
23 %1 = load i64, ptr %0, align 8
24 %2 = load i64, ptr @VarInit, align 8
25 %add = add nsw i64 %2, %1
26 ret i64 %add
27 }
29 define signext i64 @loadTLUninit() {
30 entry:
31 %0 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit)
32 store i64 1, ptr %0, align 8
33 %1 = tail call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @IThreadLocalVarUninit2)
34 %2 = load i64, ptr %1, align 8
35 %add = add nsw i64 %2, 1
36 ret i64 %add
37 }
39 ; RELOC: File:
40 ; RELOC-NEXT: Format: aixcoff-rs6000
41 ; RELOC-NEXT: Arch: powerpc
42 ; RELOC-NEXT: AddressSize: 32bit
43 ; RELOC-NEXT: Relocations [
44 ; RELOC: Virtual Address: 0x12
45 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+21]])
46 ; RELOC-NEXT: IsSigned: No
47 ; RELOC-NEXT: FixupBitValue: 0
48 ; RELOC-NEXT: Length: 16
49 ; RELOC-NEXT: Type: R_TOCU (0x30)
50 ; RELOC-NEXT: }
51 ; RELOC: Virtual Address: 0x16
52 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+21]])
53 ; RELOC-NEXT: IsSigned: No
54 ; RELOC-NEXT: FixupBitValue: 0
55 ; RELOC-NEXT: Length: 16
56 ; RELOC-NEXT: Type: R_TOCL (0x31)
57 ; RELOC-NEXT: }
58 ; RELOC: Virtual Address: 0x18
59 ; RELOC-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
60 ; RELOC-NEXT: IsSigned: No
61 ; RELOC-NEXT: FixupBitValue: 0
62 ; RELOC-NEXT: Length: 26
63 ; RELOC-NEXT: Type: R_RBA (0x18)
64 ; RELOC-NEXT: }
65 ; RELOC: Virtual Address: 0x4E
66 ; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+23]])
67 ; RELOC-NEXT: IsSigned: No
68 ; RELOC-NEXT: FixupBitValue: 0
69 ; RELOC-NEXT: Length: 16
70 ; RELOC-NEXT: Type: R_TOCU (0x30)
71 ; RELOC-NEXT: }
72 ; RELOC: Virtual Address: 0x52
73 ; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+23]])
74 ; RELOC-NEXT: IsSigned: No
75 ; RELOC-NEXT: FixupBitValue: 0
76 ; RELOC-NEXT: Length: 16
77 ; RELOC-NEXT: Type: R_TOCL (0x31)
78 ; RELOC-NEXT: }
79 ; RELOC: Virtual Address: 0x54
80 ; RELOC-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
81 ; RELOC-NEXT: IsSigned: No
82 ; RELOC-NEXT: FixupBitValue: 0
83 ; RELOC-NEXT: Length: 26
84 ; RELOC-NEXT: Type: R_RBA (0x18)
85 ; RELOC-NEXT: }
86 ; RELOC: Virtual Address: 0xBE
87 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+27]])
88 ; RELOC-NEXT: IsSigned: No
89 ; RELOC-NEXT: FixupBitValue: 0
90 ; RELOC-NEXT: Length: 16
91 ; RELOC-NEXT: Type: R_TOCU (0x30)
92 ; RELOC-NEXT: }
93 ; RELOC: Virtual Address: 0xC2
94 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+27]])
95 ; RELOC-NEXT: IsSigned: No
96 ; RELOC-NEXT: FixupBitValue: 0
97 ; RELOC-NEXT: Length: 16
98 ; RELOC-NEXT: Type: R_TOCL (0x31)
99 ; RELOC-NEXT: }
100 ; RELOC: Virtual Address: 0x114
101 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+31]])
102 ; RELOC-NEXT: IsSigned: No
103 ; RELOC-NEXT: FixupBitValue: 0
104 ; RELOC-NEXT: Length: 32
105 ; RELOC-NEXT: Type: R_TLS_LE (0x23)
106 ; RELOC-NEXT: }
107 ; RELOC: Relocation {
108 ; RELOC-NEXT: Virtual Address: 0x118
109 ; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+29]])
110 ; RELOC-NEXT: IsSigned: No
111 ; RELOC-NEXT: FixupBitValue: 0
112 ; RELOC-NEXT: Length: 32
113 ; RELOC-NEXT: Type: R_TLS_LE (0x23)
114 ; RELOC-NEXT: }
115 ; RELOC: Virtual Address: 0x120
116 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+33]])
117 ; RELOC-NEXT: IsSigned: No
118 ; RELOC-NEXT: FixupBitValue: 0
119 ; RELOC-NEXT: Length: 32
120 ; RELOC-NEXT: Type: R_TLS_LE (0x23)
121 ; RELOC-NEXT: }
123 ; SYM: File:
124 ; SYM-NEXT: Format: aixcoff-rs6000
125 ; SYM-NEXT: Arch: powerpc
126 ; SYM-NEXT: AddressSize: 32bit
127 ; SYM-NEXT: Symbols [
128 ; SYM: Index: [[#NFA+1]]
129 ; SYM-NEXT: Name: .__get_tpointer
130 ; SYM-NEXT: Value (RelocatableAddress): 0x0
131 ; SYM-NEXT: Section: N_UNDEF
132 ; SYM-NEXT: Type: 0x0
133 ; SYM-NEXT: StorageClass: C_EXT (0x2)
134 ; SYM-NEXT: NumberOfAuxEntries: 1
135 ; SYM-NEXT: CSECT Auxiliary Entry {
136 ; SYM-NEXT: Index: [[#NFA+2]]
137 ; SYM-NEXT: SectionLen: 0
138 ; SYM-NEXT: ParameterHashIndex: 0x0
139 ; SYM-NEXT: TypeChkSectNum: 0x0
140 ; SYM-NEXT: SymbolAlignmentLog2: 0
141 ; SYM-NEXT: SymbolType: XTY_ER (0x0)
142 ; SYM-NEXT: StorageMappingClass: XMC_PR (0x0)
143 ; SYM-NEXT: StabInfoIndex: 0x0
144 ; SYM-NEXT: StabSectNum: 0x0
145 ; SYM-NEXT: }
146 ; SYM-NEXT: }
147 ; SYM: Index: [[#NFA+21]]
148 ; SYM-NEXT: Name: IThreadLocalVarUninit
149 ; SYM-NEXT: Value (RelocatableAddress): 0x114
150 ; SYM-NEXT: Section: .data
151 ; SYM-NEXT: Type: 0x0
152 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
153 ; SYM-NEXT: NumberOfAuxEntries: 1
154 ; SYM-NEXT: CSECT Auxiliary Entry {
155 ; SYM-NEXT: Index: [[#NFA+22]]
156 ; SYM-NEXT: SectionLen: 4
157 ; SYM-NEXT: ParameterHashIndex: 0x0
158 ; SYM-NEXT: TypeChkSectNum: 0x0
159 ; SYM-NEXT: SymbolAlignmentLog2: 2
160 ; SYM-NEXT: SymbolType: XTY_SD (0x1)
161 ; SYM-NEXT: StorageMappingClass: XMC_TE (0x16)
162 ; SYM-NEXT: StabInfoIndex: 0x0
163 ; SYM-NEXT: StabSectNum: 0x0
164 ; SYM-NEXT: }
165 ; SYM-NEXT: }
166 ; SYM: Index: [[#NFA+23]]
167 ; SYM-NEXT: Name: ThreadLocalVarInit
168 ; SYM-NEXT: Value (RelocatableAddress): 0x118
169 ; SYM-NEXT: Section: .data
170 ; SYM-NEXT: Type: 0x0
171 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
172 ; SYM-NEXT: NumberOfAuxEntries: 1
173 ; SYM-NEXT: CSECT Auxiliary Entry {
174 ; SYM-NEXT: Index: [[#NFA+24]]
175 ; SYM-NEXT: SectionLen: 4
176 ; SYM-NEXT: ParameterHashIndex: 0x0
177 ; SYM-NEXT: TypeChkSectNum: 0x0
178 ; SYM-NEXT: SymbolAlignmentLog2: 2
179 ; SYM-NEXT: SymbolType: XTY_SD (0x1)
180 ; SYM-NEXT: StorageMappingClass: XMC_TE (0x16)
181 ; SYM-NEXT: StabInfoIndex: 0x0
182 ; SYM-NEXT: StabSectNum: 0x0
183 ; SYM-NEXT: }
184 ; SYM-NEXT: }
185 ; SYM: Index: [[#NFA+27]]
186 ; SYM-NEXT: Name: IThreadLocalVarUninit2
187 ; SYM-NEXT: Value (RelocatableAddress): 0x120
188 ; SYM-NEXT: Section: .data
189 ; SYM-NEXT: Type: 0x0
190 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
191 ; SYM-NEXT: NumberOfAuxEntries: 1
192 ; SYM-NEXT: CSECT Auxiliary Entry {
193 ; SYM-NEXT: Index: [[#NFA+28]]
194 ; SYM-NEXT: SectionLen: 4
195 ; SYM-NEXT: ParameterHashIndex: 0x0
196 ; SYM-NEXT: TypeChkSectNum: 0x0
197 ; SYM-NEXT: SymbolAlignmentLog2: 2
198 ; SYM-NEXT: SymbolType: XTY_SD (0x1)
199 ; SYM-NEXT: StorageMappingClass: XMC_TE (0x16)
200 ; SYM-NEXT: StabInfoIndex: 0x0
201 ; SYM-NEXT: StabSectNum: 0x0
202 ; SYM-NEXT: }
203 ; SYM-NEXT: }
204 ; SYM: Index: [[#NFA+29]]
205 ; SYM-NEXT: Name: ThreadLocalVarInit
206 ; SYM-NEXT: Value (RelocatableAddress): 0x0
207 ; SYM-NEXT: Section: .tdata
208 ; SYM-NEXT: Type: 0x0
209 ; SYM-NEXT: StorageClass: C_EXT (0x2)
210 ; SYM-NEXT: NumberOfAuxEntries: 1
211 ; SYM-NEXT: CSECT Auxiliary Entry {
212 ; SYM-NEXT: Index: [[#NFA+30]]
213 ; SYM-NEXT: SectionLen: 8
214 ; SYM-NEXT: ParameterHashIndex: 0x0
215 ; SYM-NEXT: TypeChkSectNum: 0x0
216 ; SYM-NEXT: SymbolAlignmentLog2: 3
217 ; SYM-NEXT: SymbolType: XTY_SD (0x1)
218 ; SYM-NEXT: StorageMappingClass: XMC_TL (0x14)
219 ; SYM-NEXT: StabInfoIndex: 0x0
220 ; SYM-NEXT: StabSectNum: 0x0
221 ; SYM-NEXT: }
222 ; SYM-NEXT: }
223 ; SYM: Index: [[#NFA+31]]
224 ; SYM-NEXT: Name: IThreadLocalVarUninit
225 ; SYM-NEXT: Value (RelocatableAddress): 0x8
226 ; SYM-NEXT: Section: .tbss
227 ; SYM-NEXT: Type: 0x0
228 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
229 ; SYM-NEXT: NumberOfAuxEntries: 1
230 ; SYM-NEXT: CSECT Auxiliary Entry {
231 ; SYM-NEXT: Index: [[#NFA+32]]
232 ; SYM-NEXT: SectionLen: 8
233 ; SYM-NEXT: ParameterHashIndex: 0x0
234 ; SYM-NEXT: TypeChkSectNum: 0x0
235 ; SYM-NEXT: SymbolAlignmentLog2: 3
236 ; SYM-NEXT: SymbolType: XTY_CM (0x3)
237 ; SYM-NEXT: StorageMappingClass: XMC_UL (0x15)
238 ; SYM-NEXT: StabInfoIndex: 0x0
239 ; SYM-NEXT: StabSectNum: 0x0
240 ; SYM-NEXT: }
241 ; SYM-NEXT: }
242 ; SYM: Index: [[#NFA+33]]
243 ; SYM-NEXT: Name: IThreadLocalVarUninit2
244 ; SYM-NEXT: Value (RelocatableAddress): 0x10
245 ; SYM-NEXT: Section: .tbss
246 ; SYM-NEXT: Type: 0x0
247 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
248 ; SYM-NEXT: NumberOfAuxEntries: 1
249 ; SYM-NEXT: CSECT Auxiliary Entry {
250 ; SYM-NEXT: Index: [[#NFA+34]]
251 ; SYM-NEXT: SectionLen: 8
252 ; SYM-NEXT: ParameterHashIndex: 0x0
253 ; SYM-NEXT: TypeChkSectNum: 0x0
254 ; SYM-NEXT: SymbolAlignmentLog2: 3
255 ; SYM-NEXT: SymbolType: XTY_CM (0x3)
256 ; SYM-NEXT: StorageMappingClass: XMC_UL (0x15)
257 ; SYM-NEXT: StabInfoIndex: 0x0
258 ; SYM-NEXT: StabSectNum: 0x0
259 ; SYM-NEXT: }
260 ; SYM-NEXT: }
262 ; DIS: file format aixcoff-rs6000
263 ; DIS: Disassembly of section .text:
264 ; DIS: 00000000 (idx: [[#NFA+5]]) .storeITLUninit:
265 ; DIS-NEXT: mflr 0
266 ; DIS-NEXT: stwu 1, -32(1)
267 ; DIS-NEXT: stw 0, 40(1)
268 ; DIS-NEXT: mr 5, 3
269 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
270 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]
271 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 6, 0(3)
272 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]
273 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
274 ; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
275 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 3, 3, 6
276 ; DIS-NEXT: stw 4, 4(3)
277 ; DIS-NEXT: stw 5, 0(3)
278 ; DIS-NEXT: addi 1, 1, 32
279 ; DIS-NEXT: lwz 0, 8(1)
280 ; DIS-NEXT: mtlr 0
281 ; DIS-NEXT: blr
282 ; DIS: 00000040 (idx: [[#NFA+7]]) .loadTLInit:
283 ; DIS-NEXT: mflr 0
284 ; DIS-NEXT: stwu 1, -32(1)
285 ; DIS-NEXT: stw 0, 40(1)
286 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
287 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+23]]) ThreadLocalVarInit[TE]
288 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(3)
289 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+23]]) ThreadLocalVarInit[TE]
290 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
291 ; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
292 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 3, 3, 4
293 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(3)
294 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 0(3)
295 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 5, 2, 0
296 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+25]]) VarInit[TE]
297 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 5, 8(5)
298 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+25]]) VarInit[TE]
299 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 6, 4(5)
300 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 5, 0(5)
301 ; DIS-NEXT: addc 4, 6, 4
302 ; DIS-NEXT: adde 3, 5, 3
303 ; DIS-NEXT: addi 1, 1, 32
304 ; DIS-NEXT: lwz 0, 8(1)
305 ; DIS-NEXT: mtlr 0
306 ; DIS-NEXT: blr
307 ; DIS: 00000090 (idx: [[#NFA+9]]) .loadTLUninit:
308 ; DIS-NEXT: mflr 0
309 ; DIS-NEXT: stwu 1, -32(1)
310 ; DIS-NEXT: stw 0, 40(1)
311 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
312 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]
313 ; DIS-NEXT: li 5, 1
314 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 0(3)
315 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]
316 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
317 ; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
318 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 4, 3, 4
319 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 5, 4(4)
320 ; DIS-NEXT: li 5, 0
321 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stw 5, 0(4)
322 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
323 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: [[#NFA+27]]) IThreadLocalVarUninit2[TE]
324 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 12(4)
325 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: [[#NFA+27]]) IThreadLocalVarUninit2[TE]
326 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} add 3, 3, 4
327 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(3)
328 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 3, 0(3)
329 ; DIS-NEXT: addic 4, 4, 1
330 ; DIS-NEXT: addze 3, 3
331 ; DIS-NEXT: addi 1, 1, 32
332 ; DIS-NEXT: lwz 0, 8(1)
333 ; DIS-NEXT: mtlr 0
334 ; DIS-NEXT: blr
336 ; DIS: Disassembly of section .data:
337 ; DIS: 000000e8 (idx: [[#NFA+11]]) VarInit[RW]:
338 ; DIS-NEXT: e8: 00 00 00 00
339 ; DIS-NEXT: ec: 00 00 00 57
340 ; DIS: 000000f0 (idx: [[#NFA+13]]) storeITLUninit[DS]:
341 ; DIS-NEXT: f0: 00 00 00 00
342 ; DIS-NEXT: 000000f0: R_POS (idx: [[#NFA+5]]) .storeITLUninit
343 ; DIS-NEXT: f4: 00 00 01 14
344 ; DIS-NEXT: 000000f4: R_POS (idx: [[#NFA+19]]) TOC[TC0]
345 ; DIS-NEXT: f8: 00 00 00 00
346 ; DIS: 000000fc (idx: [[#NFA+15]]) loadTLInit[DS]:
347 ; DIS-NEXT: fc: 00 00 00 40
348 ; DIS-NEXT: 000000fc: R_POS (idx: [[#NFA+7]]) .loadTLInit
349 ; DIS-NEXT: 100: 00 00 01 14
350 ; DIS-NEXT: 00000100: R_POS (idx: [[#NFA+19]]) TOC[TC0]
351 ; DIS-NEXT: 104: 00 00 00 00
352 ; DIS: 00000108 (idx: [[#NFA+17]]) loadTLUninit[DS]:
353 ; DIS-NEXT: 108: 00 00 00 90
354 ; DIS-NEXT: 00000108: R_POS (idx: [[#NFA+9]]) .loadTLUninit
355 ; DIS-NEXT: 10c: 00 00 01 14
356 ; DIS-NEXT: 0000010c: R_POS (idx: [[#NFA+19]]) TOC[TC0]
357 ; DIS-NEXT: 110: 00 00 00 00
358 ; DIS: 00000114 (idx: [[#NFA+21]]) IThreadLocalVarUninit[TE]:
359 ; DIS-NEXT: 114: 00 00 00 08
360 ; DIS-NEXT: 00000114: R_TLS_LE (idx: [[#NFA+31]]) IThreadLocalVarUninit[UL]
361 ; DIS: 00000118 (idx: [[#NFA+23]]) ThreadLocalVarInit[TE]:
362 ; DIS-NEXT: 118: 00 00 00 00
363 ; DIS-NEXT: 00000118: R_TLS_LE (idx: [[#NFA+29]]) ThreadLocalVarInit[TL]
364 ; DIS: 0000011c (idx: [[#NFA+25]]) VarInit[TE]:
365 ; DIS-NEXT: 11c: 00 00 00 e8
366 ; DIS-NEXT: 0000011c: R_POS (idx: [[#NFA+11]]) VarInit[RW]
367 ; DIS: 00000120 (idx: [[#NFA+27]]) IThreadLocalVarUninit2[TE]:
368 ; DIS-NEXT: 120: 00 00 00 10
369 ; DIS-NEXT: 00000120: R_TLS_LE (idx: [[#NFA+33]]) IThreadLocalVarUninit2[UL]
371 ; DIS: Disassembly of section .tdata:
372 ; DIS: 00000000 (idx: [[#NFA+29]]) ThreadLocalVarInit[TL]:
373 ; DIS-NEXT: 0: 00 00 00 00
374 ; DIS-NEXT: 4: 00 00 00 01
376 ; DIS: Disassembly of section .tbss:
377 ; DIS: 00000008 (idx: [[#NFA+31]]) IThreadLocalVarUninit[UL]:
378 ; DIS-NEXT: ...
379 ; DIS: 00000010 (idx: [[#NFA+33]]) IThreadLocalVarUninit2[UL]:
380 ; DIS-NEXT: ...