1 ; This test is designed to run 4 times, once with function attribute +c,
2 ; once with function attribute -c for eq/ne in icmp
3 ; The optimization should appear only with +c, otherwise default isel should be
6 ; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=+c,+f,+d -filetype=obj \
7 ; RUN: -disable-block-placement < %s \
8 ; RUN: | llvm-objdump -d --triple=riscv32 --mattr=+c,+f,+d -M no-aliases - \
9 ; RUN: | FileCheck -check-prefix=RV32IFDC %s
11 ; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=+zca,+f,+d -filetype=obj \
12 ; RUN: -disable-block-placement < %s \
13 ; RUN: | llvm-objdump -d --triple=riscv32 --mattr=+zca,+f,+d -M no-aliases - \
14 ; RUN: | FileCheck -check-prefix=RV32IFDC %s
16 ; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=-c,+f,+d -filetype=obj \
17 ; RUN: -disable-block-placement < %s \
18 ; RUN: | llvm-objdump -d --triple=riscv32 --mattr=-c,+f,+d -M no-aliases - \
19 ; RUN: | FileCheck -check-prefix=RV32IFD %s
22 ; constant is small and fit in 6 bit (compress imm)
23 ; RV32IFDC-LABEL: <f_small_pos_eq>:
24 ; RV32IFDC: c.li [[REG:.*]], 0x14
25 ; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
26 ; --- no compress extension
27 ; RV32IFD-LABEL: <f_small_pos_eq>:
28 ; RV32IFD: addi [[REG:.*]], zero, 0x14
29 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
30 define i32 @f_small_pos_eq(i32 %in0) minsize {
31 %cmp = icmp eq i32 %in0, 20
32 br i1 %cmp, label %if.then, label %if.else
34 %call = shl i32 %in0, 1
37 %call2 = add i32 %in0, 42
41 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
45 ; constant is small and fit in 6 bit (compress imm)
46 ; RV32IFDC-LABEL: <f_small_pos_ne>:
47 ; RV32IFDC: c.li [[REG:.*]], 0x14
48 ; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
49 ; --- no compress extension
50 ; RV32IFD-LABEL: <f_small_pos_ne>:
51 ; RV32IFD: addi [[REG:.*]], zero, 0x14
52 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
53 define i32 @f_small_pos_ne(i32 %in0) minsize {
54 %cmp = icmp ne i32 %in0, 20
55 br i1 %cmp, label %if.then, label %if.else
57 %call = shl i32 %in0, 1
60 %call2 = add i32 %in0, 42
64 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
68 ; constant is small and fit in 6 bit (compress imm)
69 ; RV32IFDC-LABEL: <f_small_neg_eq>:
70 ; RV32IFDC: c.li [[REG:.*]], -0x14
71 ; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
72 ; --- no compress extension
73 ; RV32IFD-LABEL: <f_small_neg_eq>:
74 ; RV32IFD: addi [[REG:.*]], zero, -0x14
75 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
76 define i32 @f_small_neg_eq(i32 %in0) minsize {
77 %cmp = icmp eq i32 %in0, -20
78 br i1 %cmp, label %if.then, label %if.else
80 %call = shl i32 %in0, 1
83 %call2 = add i32 %in0, 42
87 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
91 ; constant is small and fit in 6 bit (compress imm)
92 ; RV32IFDC-LABEL: <f_small_neg_ne>:
93 ; RV32IFDC: c.li [[REG:.*]], -0x14
94 ; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
95 ; --- no compress extension
96 ; RV32IFD-LABEL: <f_small_neg_ne>:
97 ; RV32IFD: addi [[REG:.*]], zero, -0x14
98 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
99 define i32 @f_small_neg_ne(i32 %in0) minsize {
100 %cmp = icmp ne i32 %in0, -20
101 br i1 %cmp, label %if.then, label %if.else
103 %call = shl i32 %in0, 1
106 %call2 = add i32 %in0, 42
110 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
114 ; constant is small and fit in 6 bit (compress imm)
115 ; RV32IFDC-LABEL: <f_small_edge_pos_eq>:
116 ; RV32IFDC: c.li [[REG:.*]], 0x1f
117 ; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
118 ; --- no compress extension
119 ; RV32IFD-LABEL: <f_small_edge_pos_eq>:
120 ; RV32IFD: addi [[REG:.*]], zero, 0x1f
121 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
122 define i32 @f_small_edge_pos_eq(i32 %in0) minsize {
123 %cmp = icmp eq i32 %in0, 31
124 br i1 %cmp, label %if.then, label %if.else
126 %call = shl i32 %in0, 1
129 %call2 = add i32 %in0, 42
133 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
137 ; constant is small and fit in 6 bit (compress imm)
138 ; RV32IFDC-LABEL: <f_small_edge_pos_ne>:
139 ; RV32IFDC: c.li [[REG:.*]], 0x1f
140 ; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
141 ; --- no compress extension
142 ; RV32IFD-LABEL: <f_small_edge_pos_ne>:
143 ; RV32IFD: addi [[REG:.*]], zero, 0x1f
144 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
145 define i32 @f_small_edge_pos_ne(i32 %in0) minsize {
146 %cmp = icmp ne i32 %in0, 31
147 br i1 %cmp, label %if.then, label %if.else
149 %call = shl i32 %in0, 1
152 %call2 = add i32 %in0, 42
156 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
160 ; constant is small and fit in 6 bit (compress imm)
161 ; RV32IFDC-LABEL: <f_small_edge_neg_eq>:
162 ; RV32IFDC: c.li [[REG:.*]], -0x20
163 ; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
164 ; --- no compress extension
165 ; RV32IFD-LABEL: <f_small_edge_neg_eq>:
166 ; RV32IFD: addi [[REG:.*]], zero, -0x20
167 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
168 define i32 @f_small_edge_neg_eq(i32 %in0) minsize {
169 %cmp = icmp eq i32 %in0, -32
170 br i1 %cmp, label %if.then, label %if.else
172 %call = shl i32 %in0, 1
175 %call2 = add i32 %in0, 42
179 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
183 ; constant is small and fit in 6 bit (compress imm)
184 ; RV32IFDC-LABEL: <f_small_edge_neg_ne>:
185 ; RV32IFDC: c.li [[REG:.*]], -0x20
186 ; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
187 ; --- no compress extension
188 ; RV32IFD-LABEL: <f_small_edge_neg_ne>:
189 ; RV32IFD: addi [[REG:.*]], zero, -0x20
190 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
191 define i32 @f_small_edge_neg_ne(i32 %in0) minsize {
192 %cmp = icmp ne i32 %in0, -32
193 br i1 %cmp, label %if.then, label %if.else
195 %call = shl i32 %in0, 1
198 %call2 = add i32 %in0, 42
202 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
206 ; constant is medium and not fit in 6 bit (compress imm),
207 ; but fit in 12 bit (imm)
208 ; RV32IFDC-LABEL: <f_medium_ledge_pos_eq>:
209 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x20
210 ; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]
211 ; --- no compress extension
212 ; RV32IFD-LABEL: <f_medium_ledge_pos_eq>:
213 ; RV32IFD: addi [[REG:.*]], zero, 0x20
214 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
215 define i32 @f_medium_ledge_pos_eq(i32 %in0) minsize {
216 %cmp = icmp eq i32 %in0, 32
217 br i1 %cmp, label %if.then, label %if.else
219 %call = shl i32 %in0, 1
222 %call2 = add i32 %in0, 42
226 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
230 ; constant is medium and not fit in 6 bit (compress imm),
231 ; but fit in 12 bit (imm)
232 ; RV32IFDC-LABEL: <f_medium_ledge_pos_ne>:
233 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x20
234 ; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]
235 ; --- no compress extension
236 ; RV32IFD-LABEL: <f_medium_ledge_pos_ne>:
237 ; RV32IFD: addi [[REG:.*]], zero, 0x20
238 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
239 define i32 @f_medium_ledge_pos_ne(i32 %in0) minsize {
240 %cmp = icmp ne i32 %in0, 32
241 br i1 %cmp, label %if.then, label %if.else
243 %call = shl i32 %in0, 1
246 %call2 = add i32 %in0, 42
250 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
254 ; constant is medium and not fit in 6 bit (compress imm),
255 ; but fit in 12 bit (imm)
256 ; RV32IFDC-LABEL: <f_medium_ledge_neg_eq>:
257 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x21
258 ; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]
259 ; --- no compress extension
260 ; RV32IFD-LABEL: <f_medium_ledge_neg_eq>:
261 ; RV32IFD: addi [[REG:.*]], zero, -0x21
262 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
263 define i32 @f_medium_ledge_neg_eq(i32 %in0) minsize {
264 %cmp = icmp eq i32 %in0, -33
265 br i1 %cmp, label %if.then, label %if.else
267 %call = shl i32 %in0, 1
270 %call2 = add i32 %in0, 42
274 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
278 ; constant is medium and not fit in 6 bit (compress imm),
279 ; but fit in 12 bit (imm)
280 ; RV32IFDC-LABEL: <f_medium_ledge_neg_ne>:
281 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x21
282 ; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]
283 ; --- no compress extension
284 ; RV32IFD-LABEL: <f_medium_ledge_neg_ne>:
285 ; RV32IFD: addi [[REG:.*]], zero, -0x21
286 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
287 define i32 @f_medium_ledge_neg_ne(i32 %in0) minsize {
288 %cmp = icmp ne i32 %in0, -33
289 br i1 %cmp, label %if.then, label %if.else
291 %call = shl i32 %in0, 1
294 %call2 = add i32 %in0, 42
298 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
302 ; constant is medium and not fit in 6 bit (compress imm),
303 ; but fit in 12 bit (imm)
304 ; RV32IFDC-LABEL: <f_medium_pos_eq>:
305 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x3f
306 ; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]
307 ; --- no compress extension
308 ; RV32IFD-LABEL: <f_medium_pos_eq>:
309 ; RV32IFD: addi [[REG:.*]], zero, 0x3f
310 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
311 define i32 @f_medium_pos_eq(i32 %in0) minsize {
312 %cmp = icmp eq i32 %in0, 63
313 br i1 %cmp, label %if.then, label %if.else
315 %call = shl i32 %in0, 1
318 %call2 = add i32 %in0, 42
322 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
326 ; constant is medium and not fit in 6 bit (compress imm),
327 ; but fit in 12 bit (imm)
328 ; RV32IFDC-LABEL: <f_medium_pos_ne>:
329 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x3f
330 ; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]
331 ; --- no compress extension
332 ; RV32IFD-LABEL: <f_medium_pos_ne>:
333 ; RV32IFD: addi [[REG:.*]], zero, 0x3f
334 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
335 define i32 @f_medium_pos_ne(i32 %in0) minsize {
336 %cmp = icmp ne i32 %in0, 63
337 br i1 %cmp, label %if.then, label %if.else
339 %call = shl i32 %in0, 1
342 %call2 = add i32 %in0, 42
346 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
350 ; constant is medium and not fit in 6 bit (compress imm),
351 ; but fit in 12 bit (imm)
352 ; RV32IFDC-LABEL: <f_medium_neg_eq>:
353 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x3f
354 ; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]
355 ; --- no compress extension
356 ; RV32IFD-LABEL: <f_medium_neg_eq>:
357 ; RV32IFD: addi [[REG:.*]], zero, -0x3f
358 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
359 define i32 @f_medium_neg_eq(i32 %in0) minsize {
360 %cmp = icmp eq i32 %in0, -63
361 br i1 %cmp, label %if.then, label %if.else
363 %call = shl i32 %in0, 1
366 %call2 = add i32 %in0, 42
370 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
374 ; constant is medium and not fit in 6 bit (compress imm),
375 ; but fit in 12 bit (imm)
376 ; RV32IFDC-LABEL: <f_medium_neg_ne>:
377 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x3f
378 ; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]
379 ; --- no compress extension
380 ; RV32IFD-LABEL: <f_medium_neg_ne>:
381 ; RV32IFD: addi [[REG:.*]], zero, -0x3f
382 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
383 define i32 @f_medium_neg_ne(i32 %in0) minsize {
384 %cmp = icmp ne i32 %in0, -63
385 br i1 %cmp, label %if.then, label %if.else
387 %call = shl i32 %in0, 1
390 %call2 = add i32 %in0, 42
394 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
398 ; constant is medium and not fit in 6 bit (compress imm),
399 ; but fit in 12 bit (imm)
400 ; RV32IFDC-LABEL: <f_medium_bedge_pos_eq>:
401 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x7ff
402 ; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]
403 ; --- no compress extension
404 ; RV32IFD-LABEL: <f_medium_bedge_pos_eq>:
405 ; RV32IFD: addi [[REG:.*]], zero, 0x7ff
406 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
407 define i32 @f_medium_bedge_pos_eq(i32 %in0) minsize {
408 %cmp = icmp eq i32 %in0, 2047
409 br i1 %cmp, label %if.then, label %if.else
411 %call = shl i32 %in0, 1
414 %call2 = add i32 %in0, 42
418 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
422 ; constant is medium and not fit in 6 bit (compress imm),
423 ; but fit in 12 bit (imm)
424 ; RV32IFDC-LABEL: <f_medium_bedge_pos_ne>:
425 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x7ff
426 ; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]
427 ; --- no compress extension
428 ; RV32IFD-LABEL: <f_medium_bedge_pos_ne>:
429 ; RV32IFD: addi [[REG:.*]], zero, 0x7ff
430 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
431 define i32 @f_medium_bedge_pos_ne(i32 %in0) minsize {
432 %cmp = icmp ne i32 %in0, 2047
433 br i1 %cmp, label %if.then, label %if.else
435 %call = shl i32 %in0, 1
438 %call2 = add i32 %in0, 42
442 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
446 ; constant is medium and not fit in 6 bit (compress imm),
447 ; but fit in 12 bit (imm), negative value fit in 12 bit too.
448 ; RV32IFDC-LABEL: <f_medium_bedge_neg_eq>:
449 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x7ff
450 ; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]
451 ; --- no compress extension
452 ; RV32IFD-LABEL: <f_medium_bedge_neg_eq>:
453 ; RV32IFD: addi [[REG:.*]], zero, -0x7ff
454 ; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
455 define i32 @f_medium_bedge_neg_eq(i32 %in0) minsize {
456 %cmp = icmp eq i32 %in0, -2047
457 br i1 %cmp, label %if.then, label %if.else
459 %call = shl i32 %in0, 1
462 %call2 = add i32 %in0, 42
466 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
470 ; constant is medium and not fit in 6 bit (compress imm),
471 ; but fit in 12 bit (imm), negative value fit in 12 bit too.
472 ; RV32IFDC-LABEL: <f_medium_bedge_neg_ne>:
473 ; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x7ff
474 ; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]
475 ; --- no compress extension
476 ; RV32IFD-LABEL: <f_medium_bedge_neg_ne>:
477 ; RV32IFD: addi [[REG:.*]], zero, -0x7ff
478 ; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
479 define i32 @f_medium_bedge_neg_ne(i32 %in0) minsize {
480 %cmp = icmp ne i32 %in0, -2047
481 br i1 %cmp, label %if.then, label %if.else
483 %call = shl i32 %in0, 1
486 %call2 = add i32 %in0, 42
490 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
494 ; constant is big and do not fit in 12 bit (imm), fit in i32
495 ; RV32IFDC-LABEL: <f_big_ledge_pos_eq>:
496 ; RV32IFDC: c.li [[REG:.*]], 0x1
497 ; RV32IFDC: c.slli [[REG]], 0xb
498 ; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
499 ; --- no compress extension
500 ; RV32IFD-LABEL: <f_big_ledge_pos_eq>:
501 ; RV32IFD: addi [[REG1:.*]], zero, 0x1
502 ; RV32IFD: slli [[REG2:.*]], [[REG1]], 0xb
503 ; RV32IFD: bne [[ANOTHER:.*]], [[REG2]], [[PLACE:.*]]
504 define i32 @f_big_ledge_pos_eq(i32 %in0) minsize {
505 %cmp = icmp eq i32 %in0, 2048
506 br i1 %cmp, label %if.then, label %if.else
508 %call = shl i32 %in0, 1
511 %call2 = add i32 %in0, 42
515 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
519 ; constant is big and do not fit in 12 bit (imm), fit in i32
520 ; RV32IFDC-LABEL: <f_big_ledge_pos_ne>:
521 ; RV32IFDC: c.li [[REG:.*]], 0x1
522 ; RV32IFDC: c.slli [[REG]], 0xb
523 ; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
524 ; --- no compress extension
525 ; RV32IFD-LABEL: <f_big_ledge_pos_ne>:
526 ; RV32IFD: addi [[REG1:.*]], zero, 0x1
527 ; RV32IFD: slli [[REG2:.*]], [[REG1]], 0xb
528 ; RV32IFD: beq [[ANOTHER:.*]], [[REG2]], [[PLACE:.*]]
529 define i32 @f_big_ledge_pos_ne(i32 %in0) minsize {
530 %cmp = icmp ne i32 %in0, 2048
531 br i1 %cmp, label %if.then, label %if.else
533 %call = shl i32 %in0, 1
536 %call2 = add i32 %in0, 42
540 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
544 ; constant is big and do not fit in 12 bit (imm), fit in i32
545 ; RV32IFDC-LABEL: <f_big_ledge_neg_eq>:
546 ; RV32IFDC: c.lui [[REG1:.*]], 0xfffff
547 ; RV32IFDC: addi [[REG2:.*]], [[REG1]], 0x7ff
548 ; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
549 ; --- no compress extension
550 ; RV32IFD-LABEL: <f_big_ledge_neg_eq>:
551 ; RV32IFD: lui [[REG1:.*]], 0xfffff
552 ; RV32IFD: addi [[REG2:.*]], [[REG1]], 0x7ff
553 ; RV32IFD: bne [[ANOTHER:.*]], [[REG2]], [[PLACE:.*]]
554 define i32 @f_big_ledge_neg_eq(i32 %in0) minsize {
555 %cmp = icmp eq i32 %in0, -2049
556 br i1 %cmp, label %if.then, label %if.else
558 %call = shl i32 %in0, 1
561 %call2 = add i32 %in0, 42
565 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]
569 ; constant is big and do not fit in 12 bit (imm), fit in i32
570 ; RV32IFDC-LABEL: <f_big_ledge_neg_ne>:
571 ; RV32IFDC: c.lui [[REG1:.*]], 0xfffff
572 ; RV32IFDC: addi [[REG2:.*]], [[REG1]], 0x7ff
573 ; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]
574 ; --- no compress extension
575 ; RV32IFD-LABEL: <f_big_ledge_neg_ne>:
576 ; RV32IFD: lui [[REG1:.*]], 0xfffff
577 ; RV32IFD: addi [[REG2:.*]], [[REG1]], 0x7ff
578 ; RV32IFD: beq [[ANOTHER:.*]], [[REG2]], [[PLACE:.*]]
579 define i32 @f_big_ledge_neg_ne(i32 %in0) minsize {
580 %cmp = icmp ne i32 %in0, -2049
581 br i1 %cmp, label %if.then, label %if.else
583 %call = shl i32 %in0, 1
586 %call2 = add i32 %in0, 42
590 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]