1 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -join-liveintervals=false -verify-machineinstrs | FileCheck %s
3 ; Check that copyPhysReg() properly adds impl-use operands of the super
4 ; register while lowering a COPY of a GR128 bit reg.
6 define void @autogen_SD5585(ptr, i64) {
9 %L5 = load i1, ptr undef
10 %I8 = insertelement <8 x i64> undef, i64 %1, i32 3
11 %I21 = insertelement <8 x i64> zeroinitializer, i64 475435, i32 5
14 CF290: ; preds = %CF290, %BB
15 %B29 = urem <8 x i64> %I8, %I21
16 %Cmp31 = icmp sge i1 undef, undef
17 br i1 %Cmp31, label %CF290, label %CF296
19 CF296: ; preds = %CF290
20 %FC36 = sitofp <8 x i64> %B29 to <8 x double>
23 CF302: ; preds = %CF307, %CF296
24 %Shuff49 = shufflevector <8 x i64> undef, <8 x i64> zeroinitializer, <8 x i32> <i32 undef, i32 9, i32 11, i32 undef, i32 15, i32 1, i32 3, i32 5>
25 %L69 = load i16, ptr undef
28 CF307: ; preds = %CF302
29 %Cmp84 = icmp ne i16 undef, %L69
30 br i1 %Cmp84, label %CF302, label %CF301
32 CF301: ; preds = %CF307
33 %B126 = or i32 514315, undef
36 CF280: ; preds = %CF280, %CF301
37 %I139 = insertelement <8 x i64> %Shuff49, i64 undef, i32 2
38 %B155 = udiv <8 x i64> %I8, %I139
39 %Cmp157 = icmp ne i64 -1, undef
40 br i1 %Cmp157, label %CF280, label %CF281
42 CF281: ; preds = %CF280
43 %Cmp164 = icmp slt i1 %L5, %Cmp84
46 CF282: ; preds = %CF304, %CF281
49 CF289: ; preds = %CF289, %CF282
50 store i32 %B126, ptr %0
51 %Cmp219 = icmp slt i64 undef, undef
52 br i1 %Cmp219, label %CF289, label %CF304
54 CF304: ; preds = %CF289
55 %Cmp234 = icmp ult i64 0, undef
56 br i1 %Cmp234, label %CF282, label %CF283
58 CF283: ; preds = %CF308, %CF283, %CF304
59 %E251 = extractelement <8 x i64> %B155, i32 0
60 br i1 undef, label %CF283, label %CF308
62 CF308: ; preds = %CF283
63 store i1 %Cmp164, ptr undef
64 br i1 undef, label %CF283, label %CF293
66 CF293: ; preds = %CF308