1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2 ; Test 32-bit addition in which the second operand is constant and in which
3 ; three-operand forms are available.
5 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
10 define zeroext i1 @f1(i32 %dummy, i32 %a, ptr %res) {
13 ; CHECK-NEXT: alhsik %r0, %r3, 1
14 ; CHECK-NEXT: st %r0, 0(%r4)
16 ; CHECK-NEXT: risbg %r2, %r1, 63, 191, 35
18 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 1)
19 %val = extractvalue {i32, i1} %t, 0
20 %obit = extractvalue {i32, i1} %t, 1
21 store i32 %val, ptr %res
25 ; Check the high end of the ALHSIK range.
26 define zeroext i1 @f2(i32 %dummy, i32 %a, ptr %res) {
29 ; CHECK-NEXT: alhsik %r0, %r3, 32767
30 ; CHECK-NEXT: st %r0, 0(%r4)
32 ; CHECK-NEXT: risbg %r2, %r1, 63, 191, 35
34 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 32767)
35 %val = extractvalue {i32, i1} %t, 0
36 %obit = extractvalue {i32, i1} %t, 1
37 store i32 %val, ptr %res
41 ; Check the next value up, which must use ALFI instead.
42 define zeroext i1 @f3(i32 %dummy, i32 %a, ptr %res) {
45 ; CHECK-NEXT: alfi %r3, 32768
46 ; CHECK-NEXT: st %r3, 0(%r4)
48 ; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35
50 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 32768)
51 %val = extractvalue {i32, i1} %t, 0
52 %obit = extractvalue {i32, i1} %t, 1
53 store i32 %val, ptr %res
57 ; Check the high end of the negative ALHSIK range.
58 define zeroext i1 @f4(i32 %dummy, i32 %a, ptr %res) {
61 ; CHECK-NEXT: alhsik %r0, %r3, -1
62 ; CHECK-NEXT: st %r0, 0(%r4)
64 ; CHECK-NEXT: risbg %r2, %r1, 63, 191, 35
66 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 -1)
67 %val = extractvalue {i32, i1} %t, 0
68 %obit = extractvalue {i32, i1} %t, 1
69 store i32 %val, ptr %res
73 ; Check the low end of the ALHSIK range.
74 define zeroext i1 @f5(i32 %dummy, i32 %a, ptr %res) {
77 ; CHECK-NEXT: alhsik %r0, %r3, -32768
78 ; CHECK-NEXT: st %r0, 0(%r4)
80 ; CHECK-NEXT: risbg %r2, %r1, 63, 191, 35
82 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 -32768)
83 %val = extractvalue {i32, i1} %t, 0
84 %obit = extractvalue {i32, i1} %t, 1
85 store i32 %val, ptr %res
89 ; Check the next value down, which must use ALFI instead.
90 define zeroext i1 @f6(i32 %dummy, i32 %a, ptr %res) {
93 ; CHECK-NEXT: alfi %r3, 4294934527
94 ; CHECK-NEXT: st %r3, 0(%r4)
96 ; CHECK-NEXT: risbg %r2, %r0, 63, 191, 35
98 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 -32769)
99 %val = extractvalue {i32, i1} %t, 0
100 %obit = extractvalue {i32, i1} %t, 1
101 store i32 %val, ptr %res
105 ; Check using the overflow result for a branch.
106 define void @f7(i32 %dummy, i32 %a, ptr %res) {
109 ; CHECK-NEXT: alhsik %r0, %r3, 1
110 ; CHECK-NEXT: st %r0, 0(%r4)
111 ; CHECK-NEXT: jgnle foo@PLT
112 ; CHECK-NEXT: .LBB6_1: # %exit
113 ; CHECK-NEXT: br %r14
114 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 1)
115 %val = extractvalue {i32, i1} %t, 0
116 %obit = extractvalue {i32, i1} %t, 1
117 store i32 %val, ptr %res
118 br i1 %obit, label %call, label %exit
128 ; ... and the same with the inverted direction.
129 define void @f8(i32 %dummy, i32 %a, ptr %res) {
132 ; CHECK-NEXT: alhsik %r0, %r3, 1
133 ; CHECK-NEXT: st %r0, 0(%r4)
134 ; CHECK-NEXT: jgle foo@PLT
135 ; CHECK-NEXT: .LBB7_1: # %exit
136 ; CHECK-NEXT: br %r14
137 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 1)
138 %val = extractvalue {i32, i1} %t, 0
139 %obit = extractvalue {i32, i1} %t, 1
140 store i32 %val, ptr %res
141 br i1 %obit, label %exit, label %call
152 declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone