1 ; Test load-and-trap instructions (LAT/LGAT)
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s
5 declare void @llvm.trap()
7 ; Check LAT with no displacement.
8 define i32 @f1(ptr %ptr) {
10 ; CHECK: lat %r2, 0(%r2)
13 %val = load i32, ptr %ptr
14 %cmp = icmp eq i32 %val, 0
15 br i1 %cmp, label %if.then, label %if.end
17 if.then: ; preds = %entry
18 tail call void @llvm.trap()
21 if.end: ; preds = %entry
25 ; Check the high end of the LAT range.
26 define i32 @f2(ptr %src) {
28 ; CHECK: lat %r2, 524284(%r2)
30 %ptr = getelementptr i32, ptr %src, i64 131071
31 %val = load i32, ptr %ptr
32 %cmp = icmp eq i32 %val, 0
33 br i1 %cmp, label %if.then, label %if.end
35 if.then: ; preds = %entry
36 tail call void @llvm.trap()
39 if.end: ; preds = %entry
43 ; Check the next word up, which needs separate address logic.
44 ; Other sequences besides this one would be OK.
45 define i32 @f3(ptr %src) {
47 ; CHECK: agfi %r2, 524288
48 ; CHECK: lat %r2, 0(%r2)
50 %ptr = getelementptr i32, ptr %src, i64 131072
51 %val = load i32, ptr %ptr
52 %cmp = icmp eq i32 %val, 0
53 br i1 %cmp, label %if.then, label %if.end
55 if.then: ; preds = %entry
56 tail call void @llvm.trap()
59 if.end: ; preds = %entry
63 ; Check that LAT allows an index.
64 define i32 @f4(i64 %src, i64 %index) {
66 ; CHECK: lat %r2, 524287(%r3,%r2)
68 %add1 = add i64 %src, %index
69 %add2 = add i64 %add1, 524287
70 %ptr = inttoptr i64 %add2 to ptr
71 %val = load i32, ptr %ptr
72 %cmp = icmp eq i32 %val, 0
73 br i1 %cmp, label %if.then, label %if.end
75 if.then: ; preds = %entry
76 tail call void @llvm.trap()
79 if.end: ; preds = %entry
83 ; Check LGAT with no displacement.
84 define i64 @f5(ptr %ptr) {
86 ; CHECK: lgat %r2, 0(%r2)
89 %val = load i64, ptr %ptr
90 %cmp = icmp eq i64 %val, 0
91 br i1 %cmp, label %if.then, label %if.end
93 if.then: ; preds = %entry
94 tail call void @llvm.trap()
97 if.end: ; preds = %entry
101 ; Check the high end of the LGAT range.
102 define i64 @f6(ptr %src) {
104 ; CHECK: lgat %r2, 524280(%r2)
106 %ptr = getelementptr i64, ptr %src, i64 65535
107 %val = load i64, ptr %ptr
108 %cmp = icmp eq i64 %val, 0
109 br i1 %cmp, label %if.then, label %if.end
111 if.then: ; preds = %entry
112 tail call void @llvm.trap()
115 if.end: ; preds = %entry
119 ; Check the next word up, which needs separate address logic.
120 ; Other sequences besides this one would be OK.
121 define i64 @f7(ptr %src) {
123 ; CHECK: agfi %r2, 524288
124 ; CHECK: lgat %r2, 0(%r2)
126 %ptr = getelementptr i64, ptr %src, i64 65536
127 %val = load i64, ptr %ptr
128 %cmp = icmp eq i64 %val, 0
129 br i1 %cmp, label %if.then, label %if.end
131 if.then: ; preds = %entry
132 tail call void @llvm.trap()
135 if.end: ; preds = %entry
139 ; Check that LGAT allows an index.
140 define i64 @f8(i64 %src, i64 %index) {
142 ; CHECK: lgat %r2, 524287(%r3,%r2)
144 %add1 = add i64 %src, %index
145 %add2 = add i64 %add1, 524287
146 %ptr = inttoptr i64 %add2 to ptr
147 %val = load i64, ptr %ptr
148 %cmp = icmp eq i64 %val, 0
149 br i1 %cmp, label %if.then, label %if.end
151 if.then: ; preds = %entry
152 tail call void @llvm.trap()
155 if.end: ; preds = %entry